JPH06252156A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a structure of high performance semiconductor devices, such as bipolar transistors, and a method for the manufacture thereof which achieve the reduction of base transit time by the reduction of base width and the reduction of base resistance by the reduction of link base resistance, simultaneously. CONSTITUTION:A first impurity diffusion layer 21 of a first conductivity type is formed on a semiconductor substrate 1, and a first conductive film 31 is formed in contact with the diffusion layer 21. A first insulating film 4 is formed, and slits are formed in the laminated film composed of the first insulating film 4 and the first conductive film 31. A second diffusion layer 22 of the first conductivity type is formed on the semiconductor substrate within the slits. Sidewalls 42 of a second insulating film are formed inside the slits to form second slits. A third diffusion layer 23 of the first conductivity type is formed inside the second slits to obtain a semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method. The present invention can be used, for example, as a high speed bipolar transistor and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, further large scale and high performance LSIs have been demanded, and further higher performance of bipolar transistors has been demanded.

Such improvement in performance is achieved by shortening the base transit time by reducing the base width of the bipolar transistor.
This is achieved by reducing the base resistance and the parasitic capacitance represented by the capacitance between the base and the collector. However, in reality, these conflict with each other, and optimization is necessary.

For example, shortening the base running time by reducing the base width causes an increase in the intrinsic base resistance, and therefore there is an optimum point for the reduction.

The above problems will be described in detail with reference to the conventional example shown in FIGS. 5 to 7. 5 to 7 are cross-sectional views of a conventional high-speed bipolar transistor (NPN) having an emitter and a base, which are formed on an upper portion of a silicon substrate.

This structure employs a so-called double polysilicon structure in which each electrode for the emitter 24 and the base 23 is formed of two layers of polysilicon 31, 32, and a side wall 42 of an insulating film is provided between each electrode. By separating, the capacitance between the base and collector is greatly reduced (see FIG. 7).

Further, in order to shorten the base transit time, the base is formed by solid phase diffusion using the emitter electrode as a diffusion source to prevent the channeling tail at the time of ion implantation, which has been a problem in the past. The width is being reduced (see the explanation below). Further, a link base 22 for connecting the base and the base electrode is formed (FIG. 7).

The steps of the conventional example will be described below. (1) 100 to 100 on the entire surface of the substrate 1 wafer by CVD
After forming the insulating film 40 having a film thickness of 200 nm, the base electrode formation portion of the bipolar transistor is opened. Next, a P-type Pol with a film thickness of 100 to 200 nm is formed on the entire surface of the wafer by CVD.
y Si31 is formed. This Poly Si31 is
Functions as a base electrode. In addition, Poly Si31
The doping into the oxide may be performed by ion implantation.

Next, 300 to 4 are formed on the entire surface of the wafer by CVD.
The insulating film 4 having a film thickness of 00 nm is formed.

Next, the insulating film 4 / Poly Si31 laminated film corresponding to the emitter and base forming portions is removed by the existing dry etching technique to form an opening 51, and then the entire surface of the wafer is subjected to 10 to 20 nm by CVD. An insulating film 41 having a film thickness is formed. After that, a P-type diffusion layer is formed by ion implantation. The P-type diffusion layer functions as a link base 22 for connecting a base electrode to a base to be formed later, and the insulating film 41 having a film thickness of 10 to 20 nm is a channeling tail at the time of forming the link base 22 and ion implantation. Plays a role of a buffer layer for preventing

Thereafter, heat treatment is performed at 900 ° C. for about 10 to 20 minutes to form a P ⁺ contact layer 21 in the substrate from P-type Poly Si. This gives the structure of FIG.

(2) An insulating film having a film thickness of 400 to 600 nm is formed by CVD, and the entire surface of the insulating film is anisotropically etched by using the existing dry etching technique to form a sidewall of the insulating film. 43 is formed. The sidewall has a function of separating the base electrode 31 and the emitter electrode 32 which will be formed later. As a result, the structure shown in FIG. 6 is obtained.

By CVD, P with a thickness of 100 to 200 nm is formed.
The poly Si32 is formed. This Poly Si32
Functions as an emitter electrode. Next, P ⁺ ion implantation is performed and heat treatment is performed, so that N ⁺ ion implantation is performed in the base diffusion layer 23 and heat treatment is performed.
To form.

According to the above conventional method, Poly Si3
Since the base 21 is formed by solid-phase diffusion from No. 1, there is no channeling tail at the time of ion implantation, and the base width can be reduced. Then, each electrode is formed using an existing wiring technique (not shown).

However, the above conventional method has the following problems. First, the link base 2 shown in FIG.
At the time of formation, a shallow junction is required for high performance, and this can be achieved by, for example, low energy ion implantation or counter-doping with N-type impurities.

However, with the shallow junction of the link base 22, there arises a problem that the base resistance increases. This is because an attempt to increase the ion implantation amount and reduce the link base resistance causes an increase in the base width due to an increase in the junction depth due to channeling, or a decrease in Hfe due to an increase in the base Gummel number. As a result, the sheet resistance of the link base 22 is actually higher than that of the base 21.

Therefore, in order to improve the characteristics by shortening the base running time, an increase in the base resistance has been an unavoidable problem.

[0018]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the prior art and realizes a semiconductor device such as a high performance bipolar transistor in order to shorten the base travel time by reducing the base width and to reduce the link base. An object of the present invention is to provide a structure and a manufacturing method that simultaneously realize a reduction in base resistance due to a reduction in resistance.

[0019]

According to a first aspect of the present invention, there is provided a first impurity diffusion layer of a first conductivity type formed on a semiconductor substrate, and a first impurity diffusion layer connected to the first diffusion layer. An electrically conductive film, an insulating film in contact with the first electrically conductive film, and a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, A semiconductor device having a third diffusion layer of a first conductivity type connected to the second diffusion layer, which solves the above-mentioned problems.

According to a second aspect of the present invention, a first conductive type first impurity diffusion layer formed on a semiconductor substrate, a first electrically conductive film connected to the diffusion layer, and the first electrically conductive film. An insulating film in contact with the first electrically conductive film, and a second conductive type second film formed immediately below the insulating film and connected to the first diffusion layer.
Diffusion layer, a third diffusion layer of a first conductivity type connected to the second diffusion layer, and a fourth diffusion layer of a second conductivity type formed in the third diffusion layer. And a second electrically conductive film connected to the fourth diffusion layer and electrically separated from the first electrically conductive film by the insulating film. This is to solve the above problem.

A third invention of the present invention comprises a first conductivity type first impurity diffusion layer formed on a semiconductor substrate and a first electrically conductive film connected to the diffusion layer. First
An opening, an insulating film formed in the first opening, and a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, A semiconductor device including a third diffusion layer of a first conductivity type connected to the second diffusion layer, which solves the above problems.

A fourth aspect of the present invention comprises a first conductivity type first impurity diffusion layer formed on a semiconductor substrate and a first electrically conductive film connected to the diffusion layer. First
An opening, an insulating film formed in the first opening, and a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, A third diffusion layer of a first conductivity type connected to the second diffusion layer; a fourth diffusion layer of a second conductivity type formed in the third diffusion layer; And a second electrically conductive film electrically connected to the diffusion layer and electrically separated from the first electrically conductive film by the insulating film, which solves the above problems. .

According to a fifth aspect of the present invention, a step of forming a first conductivity type first impurity diffusion layer on a semiconductor substrate and a first electrically conductive film connected to the diffusion layer are formed. A step of forming a first insulating film, a step of opening a laminated film composed of the first insulating film and the first electrically conductive film, and a semiconductor substrate of the first conductivity type in the opening. Second
Forming a diffusion layer, forming a sidewall of a second insulating film inside the opening to form a second opening, and forming a second opening inside the second opening. A method of manufacturing a semiconductor device, the method including the step of forming a diffusion layer, which solves the above problems.

According to a sixth aspect of the present invention, there is provided a step of forming a first electrically conductive film on a semiconductor substrate, and impurity diffusion from the first electrically conductive film to form a first conductive type film in the semiconductor substrate. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, A method of manufacturing a semiconductor device, comprising the step of forming a third diffusion layer of a first conductivity type inside a second opening, which solves the above problems.

According to a seventh aspect of the present invention, there is provided a step of forming a first electrically conductive film on a semiconductor substrate, and a first conductivity type is formed in the semiconductor substrate by impurity diffusion from the first electrically conductive film. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, Forming a second electrically conductive film inside the second opening, and forming a third diffusion layer of the first conductivity type in the semiconductor substrate by diffusing impurities from the second electrically conductive film. Of the second conductivity type in the third diffusion layer due to impurity diffusion from the second electrically conductive film. A method of manufacturing a semiconductor device including the step of forming a fourth diffusion layer, thereby solves the above problems.

According to an eighth aspect of the present invention, a step of forming a first electrically conductive film on a semiconductor substrate, and a first conductivity type in the semiconductor substrate by impurity diffusion from the first electrically conductive film. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, A method of manufacturing a semiconductor device, comprising: a step of removing a second diffusion layer exposed inside a second opening; and a step of forming a third diffusion layer of a first conductivity type inside the second opening. This solves the above problem.

According to a ninth aspect of the present invention, there is provided a step of forming a first electrically conductive film on a semiconductor substrate, and impurity diffusion from the first electrically conductive film to form a first conductive type film in the semiconductor substrate. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, By removing the second diffusion layer exposed inside the second opening, forming a second electrically conductive film inside the second opening, and diffusing impurities from the second electrically conductive film. Forming a third diffusion layer of a first conductivity type in a semiconductor substrate; Third by impurity diffusion from Shirubemaku
And a step of forming a fourth diffusion layer of the second conductivity type in the diffusion layer, which is to solve the above-mentioned problems.

According to a tenth aspect of the present invention, there is provided a step of forming a first electrically conductive film on a semiconductor substrate, and a first conductivity type is formed in the semiconductor substrate by diffusion of impurities from the first electrically conductive film. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, Second
Removing the second diffusion layer exposed inside the opening of
Forming a side wall of a third insulating film inside the second opening to form a third opening; and forming a third diffusion layer of the first conductivity type inside the third opening. A method of manufacturing a semiconductor device, the method including the steps of:

According to an eleventh aspect of the present invention, there is provided a step of forming a first electrically conductive film on a semiconductor substrate, and impurity diffusion from the first electrically conductive film to form a first conductive type film in the semiconductor substrate. The step of forming the first diffusion layer, the step of forming the first insulating film, the step of opening the laminated film including the first insulating film and the first electrically conductive film, and the inside of the opening Forming a second diffusion layer of the first conductivity type in the semiconductor substrate, forming a sidewall of the second insulating film inside the opening to form a second opening, Second
Removing the second diffusion layer exposed inside the opening of
Forming a side wall of a third insulating film inside the second opening to form a third opening; forming a second electrically conductive film inside the third opening; Second
Forming a third diffusion layer of the first conductivity type in the semiconductor substrate by diffusing impurities from the electrically conductive film of
Forming a second diffusion type fourth diffusion layer in the third diffusion layer by diffusing an impurity from the electric conductive film. It is a thing.

The twelfth aspect of the present invention is any one of the first to fourth aspects, in which the first diffusion layer is a contact and the second diffusion layer is a connection layer between the first and third diffusion layers. The semiconductor device described above solves the above problem.

A thirteenth aspect of the present invention is a bipolar transistor in which the first diffusion layer is a base contact, the third diffusion layer is a base, and the second diffusion layer is a connection layer between the base contact and the base. The semiconductor device according to any one of claims 1 to 4, which solves the above problems.

According to a fourteenth aspect of the present invention, the first diffusion layer is the base contact, the third diffusion layer is the base, the second diffusion layer is the connection layer between the base contact and the base, and the fourth diffusion layer. The semiconductor device according to claim 1 or 4, which is a bipolar transistor using as an emitter, which solves the above problems.

According to a fifteenth aspect of the present invention, the first or second electrically conductive film is made of Poly Si or Poly.
The semiconductor device according to any one of claims 1 to 4, which is a laminated film containing Si, which solves the above problems.

The invention of claim 16 of the present invention is any one of claims 5 to 11 in which the first diffusion layer is a contact and the second diffusion layer is a connection layer of the first and third diffusion layers. A method for manufacturing a semiconductor device as described above, which solves the above problems.

According to a seventeenth aspect of the present invention, a bipolar transistor is manufactured by using the first diffusion layer as a base contact, the third diffusion layer as a base, and the second diffusion layer as a connection layer between the base contact and the base. A method for manufacturing a semiconductor device according to any one of claims 5 to 11, which is a method, for solving the above problems.

In the eighteenth aspect of the present invention, the first diffusion layer is the base contact, the third diffusion layer is the base, the second diffusion layer is the connection layer between the base contact and the base, and the fourth diffusion layer. A method for manufacturing a semiconductor device according to any one of claims 7 to 11, which is a method for manufacturing a bipolar transistor using as an emitter, which solves the above problems.

According to a nineteenth aspect of the present invention, the first or second electrically conductive film is made of Poly Si or Poly.
The method for manufacturing a semiconductor device according to any one of claims 5 to 11, which is a laminated film containing Si, which solves the above problems.

[0038]

[Operation] According to the present invention, specifically, for example, in forming a link base and a base of a bipolar transistor, the link base in the base formation region is removed by etching, thereby making it possible to increase the concentration of the link base. It is possible to reduce the base resistance and the base width at the same time. That is, according to the present invention, it is possible to form the base completely independently of the link base, and it is possible to prevent an increase in the base width and an increase in the number of base Gummel due to the high density of the link base. The reduction and the reduction of the base resistance can be realized at the same time.

[0039]

Embodiments of the present invention will now be described with reference to the drawings. Of course, the present invention is not limited to the embodiments.

Example 1 This example utilizes the present invention to provide a high performance bipolar transistor. 1 and 2
Refer to.

In this embodiment, a step of forming a first conductivity type first impurity diffusion layer 21 on the semiconductor substrate 1 and a first electrically conductive film 31 connected to the diffusion layer 21 are formed. A step, a step of forming the first insulating film 4, a step of opening a laminated film including the first insulating film 4 and the first electrically conductive film 31, and a first step in the semiconductor substrate inside the opening. Step of forming conductive type second diffusion layer 22 (FIG. 2)
(A)), a step of forming a sidewall 42 of a second insulating film inside the opening to form a second opening 52 (FIG. 2B), and a step of forming a second opening inside the second opening. A semiconductor device is manufactured including the step (FIG. 1) of forming the third diffusion layer 23 of the one conductivity type.

Through the above steps, as shown in FIG. 1, a first conductivity type first impurity diffusion layer 21 formed on the semiconductor substrate 1 and a first electric conduction layer connected to the diffusion layer 21. The film 31, the insulating film 4 in contact with the first electrically conductive film 31, and the second diffusion of the first conductivity type formed immediately below the insulating film 4 and connected to the first diffusion layer 21. Layer 22
A semiconductor device (bipolar transistor) having a third diffusion layer 23 of the first conductivity type connected to the second diffusion layer 22 was obtained.

Specific details of this embodiment will be described below with reference to FIGS. 1 and 2A and 2B. These figures are
FIG. 6 is a cross-sectional view of the upper portion of the silicon substrate of the emitter and base of the NPN transistor. In this embodiment, the following (1)-
The specific step (3) is taken.

(1) Reference is made to FIG. An insulating film 40 having a film thickness of 100 to 200 nm is formed on the entire surface of the wafer that is the substrate 1 by CVD, and then a base electrode forming portion of the bipolar transistor is opened. Next, P-type Poly Si31 having a film thickness of 100 to 200 nm is formed on the entire surface of the wafer by CVD. This Poly Si31 functions as a base electrode. The doping of Poly Si31 may be performed by ion implantation.

Next, 300 to 4 on the entire surface of the wafer for CVD.
The insulating film 4 having a film thickness of 00 nm is formed.

Next, the insulating film 4 / Poly Si31 laminated film in the emitter / base forming portion is removed by the existing dry etching technique to form the opening 51. afterwards,
An insulating film 41 having a film thickness of 10 to 20 nm is formed on the entire surface of the wafer by CVD. After that, the P-type diffusion layer 2 is formed by ion implantation.
Form 2. The P-type diffusion layer 22 functions as a link base. In this embodiment, since the link base in the base forming region is removed by etching in the next step (2),
It is possible to make the concentration higher than before.

The insulating film 41 having a film thickness of 10 to 20 nm plays the role of a buffer layer for preventing the channeling tail at the time of ion implantation when the link base 22 is formed.

Thereafter, heat treatment is performed at 900 ° C. for about 10 to 20 minutes to diffuse impurities from the P-type Poly Si 31 into the substrate to form the P ⁺ contact layer 21.
The structure of FIG. 2A is obtained by the above.

(2) An insulating film having a film thickness of 400 to 600 nm is formed by CVD, and the entire surface of the insulating film is anisotropically etched by using the existing dry etching technique. 42 is formed. The sidewall has a function of separating the electrode 23 for the base 23 and the electrode 32 for the emitter 24 to be formed later.

Next, the exposed Si substrate 1 is etched to remove the link base layer 22 in the base formation region,
The structure shown in FIG. This etching can be performed continuously with the anisotropic etching of the sidewall 42 forming insulating film. For example, the insulating film be a SiO _2, preferably performed Si etching in SiO ₂ etching and O ₂ / SF ₆ gas system at O ₂ / CHF ₃ gas system continuously. In addition, since the etching of the Si substrate 1 can be performed by self-alignment using the sidewall of the insulating film as a mask, the number of steps can be minimized.

(3) Poly Si 32 having a film thickness of 100 to 200 nm is formed by CVD. The Poly S
i32 functions as an electrode for the emitter.

Next, P ⁺ ion implantation is performed and heat treatment is performed, so that N ⁺ ion implantation is performed in the base diffusion layer and heat treatment is performed to form the emitter diffusion layer 24.

According to the method of this embodiment, Poly Si
Since the base 21 is formed by solid-phase diffusion from 31, there is no channeling tail at the time of ion implantation, and the base width can be reduced. Moreover, in forming the link base 22 and the base of the bipolar transistor, the link base 22 can be made to have a high concentration by etching away the link base 22 in the base formation region (FIG. 2B). Therefore, the reduction of the base resistance and the reduction of the base width can be realized at the same time.

After obtaining the structure of FIG. 1, each electrode is formed by using the existing wiring technique (not shown).

Embodiment 2 In Embodiment 1, there is a possibility that the emitter and the high-concentration link base come into contact with each other on the side wall of the emitter electrode, which may cause an increase in junction capacitance, a decrease in breakdown voltage, and a decrease in Hfe. . The present embodiment has solved such a fear. Please refer to FIGS. 3 and 4A and 4B.

(1) The structure of FIG. 4A is obtained in the same manner as the step (1) of the first embodiment. (2) An insulating film having a film thickness of 400 to 600 nm is formed by CVD, and the entire surface of the insulating film is anisotropically etched using the existing dry etching technique to form the sidewall 42 of the insulating film. Form. The sidewall has a function of separating the base electrode 31 and the emitter electrode 32 to be formed later.

Next, the exposed Si substrate is etched,
The link base layer 22 in the base formation region is removed. This etching can be performed continuously with the anisotropic etching of the sidewall 42 forming insulating film. For example, when the insulating film is a SiO _2, S in the SiO ₂ etching and O ₂ / SF ₆ gas system at O ₂ / CHF ₃ gas system
It is preferable to perform i etching continuously. Further, since the present Si substrate etching can be performed by self-alignment using the sidewalls of the insulating film as a mask, the number of steps can be minimized. The above process is the same as the process (2) of the first embodiment.

Next, an insulating film 43 having a film thickness of 50 to 100 nm is formed by CVD (FIG. 4B), and the entire surface of the insulating film 43 is etched by anisotropic etching using the existing dry etching technique. A sidewall 43a of the second insulating film is formed (FIG. 3).

The second side wall 43a prevents contact between the emitter and the high concentration link base on the side wall of the emitter electrode 32.

[0060]

According to the present invention, in realizing a semiconductor device such as a high-performance bipolar transistor, a structure for simultaneously reducing the base transit time by reducing the base width and reducing the base resistance by decreasing the link base resistance. And a manufacturing method can be provided.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device according to a first embodiment.

FIG. 2 shows a manufacturing process of the semiconductor device of the first embodiment.

FIG. 3 is a sectional view of a semiconductor device according to a second embodiment.

FIG. 4 shows a manufacturing process of a semiconductor device of Example 2.

FIG. 5 shows a process of a conventional example (1).

FIG. 6 shows a process of a conventional example (2).

FIG. 7 shows a process of a conventional example (3).

[Explanation of symbols]

 1 Semiconductor Substrate 21 First Impurity Diffusion Layer 22 Second Impurity Diffusion Layer (Link Base) 23 Third Impurity Diffusion Layer 31 First Conductive Film 32 Second Conductive Film 4 Insulating Film

Claims (19)

[Claims] 1. A first conductivity type first impurity diffusion layer formed on a semiconductor substrate, a first electrically conductive film connected to the diffusion layer, and a contact with the first electrically conductive film. Insulating film, a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, and a first conductivity type connected to the second diffusion layer. And a third diffusion layer of the mold. 2. A first impurity diffusion layer of a first conductivity type formed on a semiconductor substrate, a first electrically conductive film connected to the diffusion layer, and a contact with the first electrically conductive film. Insulating film, a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, and a first conductivity type connected to the second diffusion layer. Type third diffusion layer, a second conductivity type fourth diffusion layer formed in the third diffusion layer, a first diffusion layer connected to the fourth diffusion layer, and the insulating film A semiconductor device comprising an electrically conductive film and a second electrically conductive film electrically separated. 3. A first impurity diffusion layer of a first conductivity type formed on a semiconductor substrate, and a first opening formed of a first electrically conductive film connected to the diffusion layer, An insulating film formed in the first opening, a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, and the second diffusion layer A semiconductor device having a first diffusion type third diffusion layer connected to the layer. 4. A first impurity diffusion layer of a first conductivity type formed on a semiconductor substrate, and a first opening formed of a first electrically conductive film connected to the diffusion layer, An insulating film formed in the first opening, a second diffusion layer of a first conductivity type formed immediately below the insulating film and connected to the first diffusion layer, and the second diffusion layer A third diffusion layer of a first conductivity type connected to the layer, a fourth diffusion layer of a second conductivity type formed in the third diffusion layer, and connected to the fourth diffusion layer And a second electrically conductive film electrically separated from the first electrically conductive film by the insulating film. 5. A step of forming a first impurity diffusion layer of a first conductivity type on a semiconductor substrate, a step of forming a first electrically conductive film connected to the diffusion layer, and a first insulating film. A step of forming a laminated film formed of the first insulating film and the first electrically conductive film, and forming a second diffusion layer of a first conductivity type in the semiconductor substrate inside the opening. A step of forming a side wall of a second insulating film inside the opening to form a second opening, and forming a third diffusion layer of the first conductivity type inside the second opening. A method of manufacturing a semiconductor device including a step. 6. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first diffusion layer of a first conductivity type in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a second conductive diffusion layer; forming a second insulating film side wall inside the opening to form a second opening; and forming a second opening inside the second opening. And a step of forming a third conductive type diffusion layer. 7. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first conductivity type first diffusion layer in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a conductive type second diffusion layer; forming a second insulating film sidewall inside the opening to form a second opening; and forming a second opening inside the second opening. Forming a third diffusion layer of a first conductivity type in a semiconductor substrate by diffusing impurities from the second electric conduction film, and the second electric conduction film Forming a fourth diffusion layer of the second conductivity type in the third diffusion layer by impurity diffusion from The method of manufacturing a semiconductor device including the step. 8. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first diffusion layer of a first conductivity type in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a conductive second diffusion layer; forming a second opening by forming a sidewall of a second insulating film inside the opening; and exposing the inside of the second opening. A method of manufacturing a semiconductor device, comprising: a step of removing a second diffusion layer; and a step of forming a third diffusion layer of a first conductivity type inside the second opening. 9. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first conductivity type first diffusion layer in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a conductive second diffusion layer; forming a second opening by forming a sidewall of a second insulating film inside the opening; and exposing the inside of the second opening. Removing the second diffusion layer, forming a second electrically conductive film inside the second opening, and diffusing impurities from the second electrically conductive film into the first conductive layer in the semiconductor substrate. Forming a third diffusion layer of the mold, and expanding impurities from the second electrically conductive film. Method of manufacturing a semiconductor device and forming a third fourth diffusion layer of the second conductivity type diffusion layer of the. 10. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first diffusion layer of a first conductivity type in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a conductive second diffusion layer; forming a second opening by forming a sidewall of a second insulating film inside the opening; and exposing the inside of the second opening. A step of removing the second diffusion layer; a step of forming a sidewall of a third insulating film inside the second opening to form a third opening; and a step of forming a first opening inside the third opening. And a step of forming a third conductive type diffusion layer. 11. A step of forming a first electrically conductive film on a semiconductor substrate, and forming a first diffusion layer of a first conductivity type in the semiconductor substrate by diffusing impurities from the first electrically conductive film. A step of forming a first insulating film, a step of opening a laminated film including the first insulating film and a first electrically conductive film, and a first step in the semiconductor substrate inside the opening. Forming a conductive second diffusion layer; forming a second opening by forming a sidewall of a second insulating film inside the opening; and exposing the inside of the second opening. A step of removing the second diffusion layer; a step of forming a sidewall of a third insulating film inside the second opening to form a third opening; and a step of forming a second opening inside the third opening. And a step of forming an electrically conductive film of Forming a third diffusion layer of the first conductivity type in the body substrate, and diffusing impurities from the second electrically conductive film into a fourth diffusion layer of the second conductivity type in the third diffusion layer. And a step of forming a layer. 12. The semiconductor device according to claim 1, wherein the first diffusion layer is a contact and the second diffusion layer is a connection layer of the first and third diffusion layers. 13. The first diffusion layer is used as a base contact, and the third diffusion layer is used as a third contact.
5. The semiconductor device according to claim 1, wherein the diffusion layer is a base and the second diffusion layer is a connection layer between a base contact and a base. 14. The first diffusion layer is used as a base contact, and the third diffusion layer is used as a third contact.
5. The semiconductor device according to claim 1, wherein the diffusion layer is a base, the second diffusion layer is a connection layer between a base contact and a base, and the fourth diffusion layer is an emitter. 15. The first or second electrically conductive film is Pol.
The semiconductor device according to any one of claims 1 to 4, which is a laminated film containing y Si or Poly Si. 16. The method of manufacturing a semiconductor device according to claim 5, wherein the first diffusion layer is a contact and the second diffusion layer is a connection layer of the first and third diffusion layers. 17. The first diffusion layer is used as a base contact, and the third diffusion layer is used as a third contact.
12. The method of manufacturing a semiconductor device according to claim 5, wherein the diffusion layer is used as a base, and the second diffusion layer is used as a connection layer between a base contact and a base. 18. The first diffusion layer is used as a base contact, and the third diffusion layer is used as a third contact.
12. The semiconductor according to claim 7, which is a method of manufacturing a bipolar transistor, wherein the diffusion layer is used as a base, the second diffusion layer is a connection layer between a base contact and a base, and the fourth diffusion layer is an emitter. Device manufacturing method. 19. The first or second electrically conductive film is Pol.
The method of manufacturing a semiconductor device according to claim 5, wherein the laminated film contains y Si or Poly Si.