JPH06249891A - Sensor signal processing circuit - Google Patents

Abstract

PURPOSE:To remove a noise component, improve measuring precision, and prevent the erroneous operation of a system. CONSTITUTION:In a sensor signal processing circuit having a sampling circuit 1 for sampling with the integer multiple of a signal to be detected detected by a sensor; an A/D converter 2 for converting the analog value of the signal to be detected into a digital value; a delay circuit 5 for storing and delaying the sampling value several cycles ago; a subtracter 3 for subtracting the output of the delay circuit 5 from the present sampling value, the delay cycle number of the delay circuit 5 is set in such a manner that the frequency of the detected signal is the value obtained by dividing the frequency of the detected signal with the greatest common measure of the frequency of a noise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sensor signal processing circuit for removing the same frequency noise as the frequency of a detected signal detected by a sensor.

[0002]

2. Description of the Related Art A detection circuit for detecting a signal of an object to be detected such as a distribution line by a sensor samples a detection signal detected by the sensor by a sampling circuit 1 as shown in FIG. It is converted by the D converter 2 and output to the subtractor 3 and the delay circuit 4. The subtracter 3 subtracts the output sampled several cycles before and delayed by the delay circuit from the currently sampled signal, and outputs the subtracted output. Figure 4
3 is a waveform when the detection circuit of FIG. 3 is connected to the detection object and the frequency of the detection signal is 60 HZ, t (-n) indicates the waveform n cycles before, and the delay circuit delays one cycle. I have to. When no accident has occurred in the detected object, the present signals t (-3), t (-4), t (-5), t (-6) sampled by the sampling circuit 1 and a delay of one cycle each Output signal t of the delayed circuit
Since (-4), t (-5), t (-6), and t (-7) also match in amplitude and phase, when subtracted by the subtractor 3, the output becomes zero. Now, when an accident occurs in the detected object, the signal t (-
The output signal t of the delay circuit delayed by 1 cycle from 2)
When (-3) is subtracted by the subtractor, the phases are the same but the amplitudes are different, so the accident waveform is output and the accident is detected.

[0003]

However, when the power source frequency of the object to be detected, such as a distribution line, for example, the power source of 60 HZ is converted to a power source of a frequency other than 60 HZ, for example, 50 HZ by using an inverter or the like, the power to be detected is When the body signal is detected by the sensor, as shown in the output waveform of FIG.
The noise component of HZ may be mixed in, and even when no accident occurs, the phase is out of phase with 10HZ, so that the 10HZ component appears as noise in the output and causes an error in the measured value, or the system malfunctions. There was a problem. Therefore, an object of the present invention is to eliminate noise components, improve measurement accuracy, and prevent the system from malfunctioning.

[0004]

A sampling circuit for sampling at an integer multiple of a detected signal detected by a sensor,
A / which converts the analog value of the detected signal into a digital value
In a sensor signal processing circuit including a D converter, a delay circuit that stores and delays a sampling value of several cycles before, and a subtractor that subtracts the output of the delay circuit from the current sampling value, the frequency of the detected signal is changed. The number of delay cycles of the delay circuit is set so as to be a value obtained by dividing the frequency of the detected signal and the frequency of noise by the greatest common divisor.

[0005]

By the above means, the low frequency noise component is removed.

[0006]

EXAMPLES The present invention will be described below with reference to the examples shown in FIGS. The same parts as those in FIGS. 3 and 4 are designated by the same reference numerals, and detailed description thereof will be omitted. Reference numeral 5 is a delay circuit, and the number of delay cycles is set so that the frequency of the detected signal detected by the sensor is divided by the greatest common divisor of the frequency of the detected signal and the frequency of noise. By setting the number of delay cycles to a value obtained by dividing the two common frequencies by the greatest common divisor, both the detected signal and the noise can be synchronized with the output of the delay circuit and the signal that is not delayed. 2 is connected to a power source of 60HZ, and the delay circuit 5 is superimposed on 60HZ of 10H.
This is a waveform when the number of delay cycles is set to 6 so as to remove Z. Therefore, when no accident has occurred, the signal t (−6) obtained by sampling the detection signal detected by the sensor by the sampling circuit 1,
t (-5), t (-4), t (-3) and the signals t (-12), t (-11), t (-1) of the delay circuit 5, respectively.
0) and t (-9) have low-frequency noise of 10HZ superimposed on them, but since the amplitude and the phase also match, the signal becomes zero as shown in FIG. 2 when subtracted by the subtractor 3. Now, when an accident occurs, the detection signals detected by the sensor are sampled by the sampling circuit 1, and the signals t (-2) and t (-
1), t (−0) and each signal t of the delay circuit 5
Since the amplitudes of (-8), t (-7), and t (-6) are different, when the subtracter 3 subtracts, the output can obtain only the 60HZ component due to the accident, as shown in FIG. 10 in the embodiment
The removal of the HZ noise component has been described as an example. However, even if you want to remove noise having an arbitrary frequency component, the value should be divided by the greatest common divisor of the frequency of the detected signal and the frequency of the noise. Similarly, by selecting the number of delay cycles, the noise component can be removed.

[0007]

As described above, according to the present invention, since noise can be removed, the measurement accuracy is improved, and
Malfunctions can be prevented.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is an output waveform according to the present invention.

FIG. 3 is a block diagram showing a conventional example.

FIG. 4 Output waveform of a conventional example

[Explanation of symbols]

 1 Sampling circuit 2 A / D converter 3 Subtractor 5 Delay circuit

Claims (1)

[Claims] 1. A sampling circuit for sampling at an integer multiple of a detected signal detected by a sensor, an A / D converter for converting an analog value of the detected signal into a digital value, and a sampling value stored several cycles before. In a sensor signal processing circuit that includes a delay circuit that delays and a subtractor that subtracts the output of the delay circuit from the current sampling value, the frequency of the detected signal is the greatest common divisor of the frequency of the detected signal and the frequency of noise. A sensor signal processing circuit, characterized in that the number of delay cycles of the delay circuit is set so as to be a divided value.