JPH06244276A - Semiconductor light emitting device array - Google Patents

Semiconductor light emitting device array

Info

Publication number
JPH06244276A
JPH06244276A JP4747893A JP4747893A JPH06244276A JP H06244276 A JPH06244276 A JP H06244276A JP 4747893 A JP4747893 A JP 4747893A JP 4747893 A JP4747893 A JP 4747893A JP H06244276 A JPH06244276 A JP H06244276A
Authority
JP
Japan
Prior art keywords
light emitting
diffusion region
semiconductor crystal
crystal layer
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4747893A
Other languages
Japanese (ja)
Inventor
Katsuhiko Morita
克彦 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP4747893A priority Critical patent/JPH06244276A/en
Publication of JPH06244276A publication Critical patent/JPH06244276A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To provide an LED array of a certain structure wherein devices can be electrically isolated from each other even if a diffused region does not reach a PN junction by a method wherein a shallow diffusion region is formed in a short time causing less damage to a wafer when impurities are diffused for the isolation of devices. CONSTITUTION:A P-type semiconductor crystal layer 3 and an N-type semiconductor crystal layer 4 are successively laminated on a P-type semiconductor substrate 2, Zn is diffused into the semiconductor crystal layer 4 through its surface nearly half as deep as the depth of the layer 4 for the formation of P-type diffusion regions 5, a back electrode 6 is formed on all the underside of the substrate 2, light emitting device electrodes 7 are formed on the upside of the N-type semiconductor crystal layer 4, and diffusion region electrodes 8 provided separate from the light emitting device electrodes 7 are built on the P-type diffusion regions 5 respectively. A reverse voltage is applied to the diffusion region electrodes 8 to expand a depletion layer in width which is located at a boundary surface between the P-type diffusion region 5 and the N-type semiconductor crystal layer 4, whereby light emitting devices 10 can be electrically isolated from each other.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体基板上に発光電
気的に分離された複数の発光素子を有した半導体発光素
子に係わり、特にその素子分離部の構造に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device having a plurality of light emitting devices electrically separated from each other on a semiconductor substrate, and more particularly to the structure of the device separating portion.

【0002】[0002]

【従来の技術】近年、LEDアレイ(半導体発光素子ア
レイ)を光プリンタ用光源あるいは光を用いた情報用素
子に使用するために高密度に集積するための技術が提案
または開発されている。これらのLEDアレイは発光ダ
イオードをリニアに集積することでアレイ化したものを
用いているが、プリンタの小型化、高画質化によってよ
り高い集積度が求められてきている。発光素子を基板上
で高密度に分離する方法の1つとして、発光素子と発光
素子との間に不純物を拡散して発光素子間を電気的に分
離する方法がある。このようなLEDアレイは、例えば
液相成長法によって基板上にp型GaAlAs層、n型
GaAlAsを順次積層して半導体ウェーハを形成し、
このウェーハ表面にSiO2 等の絶縁膜を被着して、n
型GaAlAs層の発光領域とすべき部分に対応したと
ころの絶縁膜を残すように写真蝕刻して、この絶縁膜を
マスクとしてウェーハ表面から亜鉛を拡散してp型Ga
AlAs層に達するp型分離領域を形成してn型GaA
lAs層の分離を行うことにより、基板上で発光素子を
細かく分離するものである。
2. Description of the Related Art In recent years, a technique for integrating a LED array (semiconductor light emitting element array) at a high density for use as a light source for an optical printer or an information element using light has been proposed or developed. These LED arrays are used by linearly integrating light emitting diodes to form an array, but higher integration is required due to miniaturization of printers and higher image quality. As one of the methods for separating the light emitting elements on the substrate with high density, there is a method for diffusing impurities between the light emitting elements to electrically separate the light emitting elements. In such an LED array, a p-type GaAlAs layer and an n-type GaAlAs layer are sequentially laminated on a substrate by a liquid phase growth method to form a semiconductor wafer,
An insulating film such as SiO 2 is deposited on the surface of this wafer, and n
P-type GaAlAs layer is photoetched so as to leave an insulating film corresponding to the light emitting region of the p-type GaAlAs layer, and zinc is diffused from the wafer surface by using this insulating film as a mask.
Forming a p-type isolation region reaching the AlAs layer to form an n-type GaA
By separating the 1As layer, the light emitting element is finely separated on the substrate.

【0003】[0003]

【発明が解決しようとする課題】ところで、上述のよう
なLEDアレイによれば、発光素子を分離するためのP
N接合部にまで達するp型分離領域を形成するには、拡
散温度を高くして、拡散時間を長くしなくてはならな
い。このため高熱に弱いウエハに与えるダメージが多く
なり、LEDアレイの品質を劣化させてしまう可能性が
あった。また、深く拡散することにより、拡散領域の端
部で、濃度分布にばらつきが生じるため、LEDアレイ
の発光素子毎で、発光出力にばらつきが生じてしまう。
更に、素子分離のための拡散領域の形成のための拡散時
間が長いので、製造コストが高くなってしまうという問
題もある。また、半導体結晶中での拡散は、横方向へも
進行するため、発光素子の微細パターンの形成が難しく
なり、発光素子を高密度に形成することができなくなっ
てしまう。
By the way, according to the above-mentioned LED array, P for separating the light emitting elements is used.
In order to form the p-type isolation region reaching the N-junction, the diffusion temperature must be increased and the diffusion time must be lengthened. For this reason, there is a possibility that the wafer, which is vulnerable to high heat, is damaged much and the quality of the LED array is degraded. Further, since the light is diffused deeply, the concentration distribution varies at the end of the diffusion region, so that the light emission output varies for each light emitting element of the LED array.
Further, since the diffusion time for forming the diffusion region for element isolation is long, there is a problem that the manufacturing cost becomes high. Further, since diffusion in the semiconductor crystal also progresses in the lateral direction, it becomes difficult to form a fine pattern of the light emitting element, and it becomes impossible to form the light emitting element at a high density.

【0004】そこで、本発明は上記の点に着目してなさ
れたものであり、素子分離のための不純物の拡散を行う
際に、短時間で浅く拡散領域を形成して、ウエハのダメ
ージを低減させ、拡散領域がPN接合部にまで達してい
なくとも素子間を電気的に分離できる構造のLEDアレ
イを提供することを目的とするものである。
Therefore, the present invention has been made by paying attention to the above points, and when diffusing impurities for element isolation, a shallow diffusion region is formed in a short time to reduce damage to the wafer. It is an object of the present invention to provide an LED array having a structure in which elements can be electrically isolated from each other even if the diffusion region does not reach the PN junction.

【0005】[0005]

【課題を解決するための手段】本発明は、上記目的を達
成するための手段として、基板上で電気的に分離された
複数の発光素子を有した半導体発光素子アレイにおい
て、表面からPN接合部に達しない深さで拡散して形成
した複数の拡散領域と、この拡散領域上に設置され、前
記発光素子駆動用の電極とは別に設けた拡散領域電極と
を有し、前記拡散領域の境界面に発生する空乏層幅を制
御する電圧を前記拡散領域電極に加えることにより、空
乏層幅を広げて前記発光素子を分離することを特徴とす
る半導体発光素子アレイを提供しようとするものであ
る。
As a means for achieving the above object, the present invention provides a semiconductor light emitting device array having a plurality of light emitting devices electrically separated on a substrate, and a PN junction from the surface. A plurality of diffusion regions formed by diffusing at a depth that does not reach, and a diffusion region electrode provided on the diffusion region and provided separately from the electrode for driving the light emitting element, and a boundary of the diffusion region. It is intended to provide a semiconductor light emitting device array characterized by expanding the depletion layer width and separating the light emitting devices by applying a voltage for controlling the depletion layer width generated on the surface to the diffusion region electrode. .

【0006】[0006]

【実施例】以下、添付図面を参照して本発明の一実施例
を説明する。図1は、本発明のLEDアレイの構造を示
す側面図である。図2は、本発明のLEDアレイの上面
図である。図1に示すように、LEDアレイ1は、P−
GaAs基板2上に、P−AlGaAs半導体結晶層3
(厚さ4μm)、N−AlGaAs半導体結晶層4(厚
さ1μm)を順次積層して形成したPN接合部を有した
半導体発光素子であって、N型半導体結晶層4の表面か
らN型半導体結晶層4のほぼ半分ぐらいの深さまでZn
を拡散して形成した複数のP型拡散領域5を有してい
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a side view showing the structure of the LED array of the present invention. FIG. 2 is a top view of the LED array of the present invention. As shown in FIG. 1, the LED array 1 has a P-
A P-AlGaAs semiconductor crystal layer 3 is formed on the GaAs substrate 2.
A semiconductor light emitting device having a PN junction formed by sequentially stacking (thickness 4 μm) and N-AlGaAs semiconductor crystal layer 4 (thickness 1 μm), wherein an N-type semiconductor from the surface of the N-type semiconductor crystal layer 4 is formed. Zn up to about half the depth of the crystal layer 4
Has a plurality of P-type diffusion regions 5 formed by diffusing.

【0007】更に、基板2下面全体にはオーミック接触
された裏面電極6が、N型半導体結晶層4上面にはオー
ミック接触された発光素子電極7が、P型拡散領域5上
面には発光素子電極7とは別に設けた拡散領域電極8
が、それぞれ設置されている。ここで、発光素子電極7
と、拡散領域電極8とは、図2に示すように、光出力窓
9の部分を開口させて全てのP型拡散領域5で共通の電
極として拡散領域電極8が設置され、光出力窓9内に発
光素子電極7が設置される。上記P型拡散領域5で挟ま
れた半導体結晶が1つの発光素子10であり、この発光
素子10において、裏面電極6、発光素子電極7の間に
順方向電圧を加えると、P型拡散領域5とP型拡散領域
5との間に位置するPN接合部分が発光領域となり、こ
の発光領域で発生した光がN型半導体結晶層4上面の光
出力窓9より出力する。
Further, the back surface electrode 6 in ohmic contact with the entire bottom surface of the substrate 2, the light emitting element electrode 7 in ohmic contact with the upper surface of the N-type semiconductor crystal layer 4, and the light emitting element electrode in the upper surface of the P type diffusion region 5. Diffusion region electrode 8 provided separately from 7
But each is installed. Here, the light emitting element electrode 7
As shown in FIG. 2, the diffusion area electrode 8 is formed by opening the light output window 9 and the diffusion area electrode 8 is installed as a common electrode in all P-type diffusion areas 5. The light emitting element electrode 7 is installed therein. The semiconductor crystal sandwiched between the P-type diffusion regions 5 is one light emitting element 10. In this light emitting element 10, when a forward voltage is applied between the back electrode 6 and the light emitting element electrode 7, the P type diffusion region 5 is formed. The PN junction located between the P type diffusion region 5 and the P type diffusion region 5 becomes a light emitting region, and the light generated in this light emitting region is output from the light output window 9 on the upper surface of the N type semiconductor crystal layer 4.

【0008】このように、LEDアレイ1は、P型拡散
領域5の拡散深さがN型半導体4の半分ぐらいの深さで
あるので、従来のLEDアレイよりも拡散時間を短縮さ
せることができると共に、LEDアレイに与えるダメー
ジを低減させることができる。また、拡散時間を短縮さ
せることで、製造コストを削減させることも可能であ
る。更に、発光素子10を従来よりも高密度にパターン
化できるので、高集積度のLEDアレイとすることが可
能となる。
As described above, in the LED array 1, since the diffusion depth of the P-type diffusion region 5 is about half that of the N-type semiconductor 4, the diffusion time can be shortened as compared with the conventional LED array. At the same time, the damage given to the LED array can be reduced. Further, it is possible to reduce the manufacturing cost by shortening the diffusion time. Further, since the light emitting element 10 can be patterned with higher density than the conventional one, it is possible to form a highly integrated LED array.

【0009】次に、上記LEDアレイ1における発光素
子10間を電気的に分離する原理について説明する。P
N接合のP型半導体と、N型半導体との境界付近では、
熱平衡状態において空乏層が発生している。このPN接
合の半導体に順方向電圧を加えればキャリアの移動によ
り、半導体結晶内に電流が流れる。しかし、逆方向電圧
を加えると、キャリアが電極方向に引き寄せられ、熱平
衡状態で発生していた空乏層の幅を広げることができ
る。本発明は、PN接合の半導体結晶に逆方向電圧を加
えると空乏層幅が広がることを利用し、基板上にアレイ
化した発光素子を電気的に分離するものである。
Next, the principle of electrically separating the light emitting elements 10 in the LED array 1 will be described. P
In the vicinity of the boundary between the N-junction P-type semiconductor and the N-type semiconductor,
A depletion layer is generated in the thermal equilibrium state. If a forward voltage is applied to the semiconductor of the PN junction, the movement of carriers causes a current to flow in the semiconductor crystal. However, when a reverse voltage is applied, carriers are attracted toward the electrode, and the width of the depletion layer generated in the thermal equilibrium state can be widened. The present invention utilizes the fact that the depletion layer width widens when a reverse voltage is applied to the semiconductor crystal of the PN junction, and electrically separates the light emitting elements arrayed on the substrate.

【0010】上記のLEDアレイ1では、拡散領域電極
8にマイナス電圧を加え、P型拡散領域5とN型半導体
結晶4との間の空乏層幅を、拡散領域電極8に加える電
圧を制御してPN接合部付近に達するまで広げること
で、発光素子10を駆動したときに半導体結晶内を流れ
る電流を狭窄し、発光素子10を電気的に完全に分離す
る。
In the LED array 1 described above, a negative voltage is applied to the diffusion region electrode 8 to control the width of the depletion layer between the P-type diffusion region 5 and the N-type semiconductor crystal 4 by controlling the voltage applied to the diffusion region electrode 8. The light emitting element 10 is electrically separated completely by narrowing the current flowing in the semiconductor crystal when the light emitting element 10 is driven by expanding the light emitting element 10 until it reaches the vicinity of the PN junction.

【0011】発光素子駆動用の発光素子電極7と、素子
分離領域駆動用の拡散領域電極8とを別々に構成してい
るので、発光素子10の素子分離は、発光素子10の駆
動電流に依存しない。即ち、発光素子10を個々に駆動
させる必要がある場合でも、発光素子10の分離を確実
に行うことができて、発光素子10の発光のばらつきを
低減させている。
Since the light emitting element electrode 7 for driving the light emitting element and the diffusion area electrode 8 for driving the element isolation area are separately formed, the element isolation of the light emitting element 10 depends on the drive current of the light emitting element 10. do not do. That is, even when the light emitting elements 10 need to be individually driven, the light emitting elements 10 can be reliably separated, and variations in light emission of the light emitting elements 10 are reduced.

【0012】なお、本発明は、上述の実施例で示した構
造に限定されることはなく、例えばPN接合部の構造が
ホモ接合だけでなく、ヘテロ接合、ダブルヘテロ接合で
あっても良いし、また、その半導体結晶の材料において
もAlGaAsだけでなくGaP,InP,InGaA
lP,InGaAsP等で構成したLEDアレイについ
ても適用可能である。
The present invention is not limited to the structures shown in the above-mentioned embodiments. For example, the structure of the PN junction may be not only homojunction but also heterojunction or double heterojunction. Also, in the material of the semiconductor crystal, not only AlGaAs but also GaP, InP, InGaA
It is also applicable to an LED array composed of 1P, InGaAsP, or the like.

【0013】[0013]

【発明の効果】以上説明したように本発明の半導体発光
素子アレイによれば、拡散深さをPN接合部に達する深
さまで行わなくとも、発光素子を電気的に分離すること
ができるので、拡散領域形成のための拡散時間が従来よ
りも短くて済み、半導体発光素子の品質の劣化を低減さ
せることができる。また、発光素子分離部の拡散領域は
従来の発光素子よりも浅くて良いので、従来の半導体発
光素子アレイよりも発光素子を高密度に形成することが
可能である。 また、発光素子分離を行うための拡散領
域電極と、発光素子を駆動するための電極とを別にして
設けたので、発光素子を個々に駆動させる必要がある場
合でも、発光素子の分離を確実に行うことができる等の
効果がある。
As described above, according to the semiconductor light emitting element array of the present invention, the light emitting elements can be electrically separated without the diffusion depth reaching the PN junction portion. The diffusion time for forming the region is shorter than that in the conventional case, and the deterioration of the quality of the semiconductor light emitting device can be reduced. Further, since the diffusion region of the light emitting element separating portion may be shallower than that of the conventional light emitting element, it is possible to form the light emitting elements at a higher density than that of the conventional semiconductor light emitting element array. Further, since the diffusion area electrode for separating the light emitting elements and the electrode for driving the light emitting elements are provided separately, it is possible to ensure the separation of the light emitting elements even when the light emitting elements need to be driven individually. There is an effect that can be done to.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体発光素子の構造を示す側面図で
ある。
FIG. 1 is a side view showing a structure of a semiconductor light emitting device of the present invention.

【図2】本発明の半導体発光素子の上面図である。FIG. 2 is a top view of a semiconductor light emitting device of the present invention.

【符号の説明】[Explanation of symbols]

1 LEDアレイ(半導体発光素子アレイ) 2 P−GaAs基板 3 P−AlGaAs半導体結晶層 4 N−AlGaAs半導体結晶層 5 P型拡散領域(拡散領域) 6 裏面電極 7 発光素子電極(発光素子駆動用電極) 8 拡散領域電極 10 発光素子 1 LED array (semiconductor light emitting element array) 2 P-GaAs substrate 3 P-AlGaAs semiconductor crystal layer 4 N-AlGaAs semiconductor crystal layer 5 P type diffusion region (diffusion region) 6 Back electrode 7 Light emitting element electrode (light emitting element driving electrode) ) 8 diffusion region electrode 10 light emitting element

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】基板上で電気的に分離された複数の発光素
子を有した半導体発光素子アレイにおいて、 表面からPN接合部に達しない深さで拡散して形成した
複数の拡散領域と、この拡散領域上に設置され、前記発
光素子駆動用の電極とは別に設けた拡散領域電極とを有
し、 前記拡散領域の境界面に発生する空乏層幅を制御する電
圧を前記拡散領域電極に加えることにより、空乏層幅を
広げて前記発光素子を分離することを特徴とする半導体
発光素子アレイ。
1. A semiconductor light emitting device array having a plurality of light emitting devices electrically isolated on a substrate, and a plurality of diffusion regions formed by diffusing from a surface to a depth not reaching a PN junction, A diffusion region electrode provided on the diffusion region and provided separately from the light emitting element driving electrode, and applying a voltage to the diffusion region electrode for controlling a depletion layer width generated at a boundary surface of the diffusion region. Accordingly, the semiconductor light emitting device array is characterized in that the depletion layer is widened to separate the light emitting devices.
JP4747893A 1993-02-12 1993-02-12 Semiconductor light emitting device array Pending JPH06244276A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4747893A JPH06244276A (en) 1993-02-12 1993-02-12 Semiconductor light emitting device array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4747893A JPH06244276A (en) 1993-02-12 1993-02-12 Semiconductor light emitting device array

Publications (1)

Publication Number Publication Date
JPH06244276A true JPH06244276A (en) 1994-09-02

Family

ID=12776252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4747893A Pending JPH06244276A (en) 1993-02-12 1993-02-12 Semiconductor light emitting device array

Country Status (1)

Country Link
JP (1) JPH06244276A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020092231A (en) * 2001-06-01 2002-12-11 가부시끼가이샤 도시바 Method and apparatus for testing the quality of film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020092231A (en) * 2001-06-01 2002-12-11 가부시끼가이샤 도시바 Method and apparatus for testing the quality of film

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