JPH06241744A - Circuit pattern defect detecting device, its method, and image sensor - Google Patents

Abstract

PURPOSE:To detect a ultra-fine defect by expressing the circuit pattern of a detected picture element with image sensors having multiple light reception section arrays. CONSTITUTION:A circuit pattern defect detecting device is provided with an image sensor 4 integrated with one-dimensional image sensors 4a, 4b such as CCDs having multiple light reception section arrays to detect a pattern expanded by an objective lens 3 via a half-mirror 11. Output signals of the one-dimensional image sensors 4a, 4b are digitized by A/D converters 9a, 9b into digital signals of 8-10 bits, for example, one of the digital signals is delayed, they are mixed by a mixer 10 to form a gradation image signal having overlapped picture elements, and the image signal is stored in an image memory 5. Image signals before and after being inputted to the image memory 5 are compared, and defect judgment is made by a defect judging circuit 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is suitable for automatically detecting a defect such as a shape defect or a foreign substance in a pattern (circuit pattern) to be inspected such as an LSI wafer, a printed circuit board, a thin film transistor (TFT) substrate. The present invention relates to a circuit pattern defect detection device and method, and an image sensor.

[0002]

2. Description of the Related Art Integrated circuits such as LSIs tend to be highly integrated and miniaturized. In forming such a fine wiring pattern, the detection of defects is important in determining the quality of the formation.

Since it is no longer possible to visually detect defects by visual inspection, it is not the stage in which a large number of personnel are arranged to perform visual inspection.
There is an urgent need to automate defect detection.

Therefore, information on the semiconductor element surface or inside obtained from an optical microscope, an infrared image pickup device, an electron microscope, an X-ray image pickup device, or the like is converted into an electric signal by an image pickup tube, an image pickup device, or the like, and obtained. There is known a method and an apparatus for performing a predetermined signal (image) process on an image to detect a defect. This includes, for example, Semiconductor
World (June 1984), pages 112 to 119 (Semiconductor World (1984) pp. 112-119), or JP-A-59-192943.

An example of the components of these techniques is shown in FIG.
Will be briefly explained. In FIG. 12, the circuit pattern on the wafer 1 illuminated by the lamp 2 is enlarged and detected by the detector 4 such as a one-dimensional image sensor through the objective lens 3. Then, the grayscale image of the circuit pattern is compared with the image of the previous chip 7a (adjacent chip) stored in the image memory 5, and the defect determination circuit 6 performs defect determination processing. The detected grayscale image of the circuit pattern is simultaneously stored in the image memory 5 (stored image) and used for the next comparative inspection of the chip 7b. In the defect determination, for example, the shades of corresponding pixels in the image are compared, and a region in which the shade difference is equal to or larger than an allowable value is output as a defect.

[0006]

However, as the miniaturization of LSI progresses and the era of submicron LSI is entered, it is difficult for these conventional detection techniques to detect minute defects in a short time. It is becoming. In the future, further miniaturization, increase in area, and increase in number of layers will lead to highly reliable ultra-small defects of 0.1 to 0.3 μm in complicated and fine multilayer patterns.
Moreover, it is expected that conventional techniques alone cannot cope with detection in an extremely short time.

The object of the present invention is to solve the above-mentioned problems of the prior art, and to adjust the miniaturization, large area, and multi-layering of LSIs simply without adjusting the detection optical system, and to be inspected. The present invention provides a circuit pattern defect detection device, a method thereof, and an image sensor capable of accurately detecting ultra-small defects of 0.1 to 0.3 μm on the circuit pattern in a short time.

[0008]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention is directed to a circuit pattern to be inspected, where an image sensor having a plurality of light receiving section arrays causes detection pixels to overlap with adjacent detection pixels. Image detecting means for detecting an image signal having a region, and detecting means for comparing the image signal detected by the image detecting means with a reference image signal to detect a defect in the circuit pattern. It is a circuit pattern defect detection device that does. Further, the present invention detects an image signal having a region where a detection pixel overlaps with an adjacent detection pixel by an image sensor having a plurality of types of light receiving section arrays for each of the circuit patterns to be inspected that are originally the same, A circuit pattern defect detecting method is characterized in that a defect in a circuit pattern is detected by comparing corresponding portions of the detected image signals. In addition, the present invention is configured to allow detection pixels to have areas overlapping with adjacent detection pixels, and an image having a plurality of light receiving unit arrays so as to detect a grayscale image of a circuit pattern to be inspected. The sensor was constructed. Further, according to the present invention, it is possible to detect a grayscale image signal in which pixels are arranged so that the grid position, which is the center position of each overlapping pixel, becomes a right triangle. Further, in the present invention, in the detected image, in addition to the detected pixel, a pixel is interpolated (interpolated) to newly form a new pixel. Furthermore, the present invention is configured to perform defect determination using this image detecting means.

[0009]

With the above configuration, since an image having a region where the detection pixel overlaps with the adjacent detection pixel is detected,
The detected grayscale image becomes an image having another parameter such as the interval (pitch) of the detection pixels in addition to the conventional parameter such as the size of the detection pixel or the density value thereof.
In the conventional image, the size of the detection pixel is one processing unit, but in the image of the present invention, the size of the detection pixel and the interval between the detection pixels are mutually restricted by the image sensor having a plurality of light receiving section arrays. Can be set independently at the time of image detection without being blocked, and if the circuit pattern is expressed by this,
It is possible to perform processing suitable for detecting ultra-fine defects on a circuit pattern. In other words, it is possible to perform highly accurate image registration in a smaller unit determined by the detection pixel interval, which is the latter parameter, and comparison of shading.
It is possible to detect even a minute defect of about 0.3 μm. In addition, it is possible to detect defects at high speed. Further, the pixel obtained by the pixel interpolation has a high quality with a small smoothing effect, and a minute defect can be detected.

[0010]

EXAMPLES The present invention will be specifically described below based on examples. The present embodiment is an example applied to the defect inspection of the circuit pattern of the LSI wafer as the pattern to be inspected.
It goes without saying that the present invention can also be applied to defect inspection of circuit patterns such as TFTs, multilayer substrates and masks.

FIG. 1 is a block diagram of an LSI wafer pattern defect detecting device used for the implementation. This device
Via an XY stage 8 for scanning the wafer 1, an illumination lamp 2 for illuminating the wafer 1, an objective lens 3 (for example, 40 ×) for enlarging the illuminated wafer pattern, and a half mirror 11 having a transmittance of 50%. , One-dimensional image sensors 4a, 4b such as CCDs having a plurality of light receiving unit arrays for detecting the pattern magnified by the objective lens 3 (see FIG. 2).
Image sensor 4 integrated with each one-dimensional image sensor 4a, 4b of the integrated image sensor 4
A / D converters 9a and 9b for digitizing the output signal of the digital signal into a digital signal of 8 to 10 bits, and a mixer for delaying and mixing one of the digital signals to form a grayscale image signal having overlapping pixels. 10, an image memory 5 for storing image signals, and a defect determination circuit 6 for comparing the image signals before and after being input to the image memory and performing defect determination.

The XY stage 8 having the wafer 1 mounted thereon is scanned at a constant speed in a direction orthogonal to the internal scanning direction of the respective one-dimensional image sensors 4a and 4b of the integrated image sensor 4 to obtain each one-dimensional image. Sensor 4a,
A two-dimensional image signal can be obtained from 4b. Each one-dimensional image sensor 4a, 4b is driven at, for example, 10 MHz. Further, the illumination may be illumination other than bright field illumination as long as it is an illumination method suitable for detecting a defect, and the detection is not limited to specular reflection light, and any detection method suitable for detecting a defect may be used. Anything may be used, for example scattered light may be detected.

Each one-dimensional image sensor 4a, 4b
The image sensor is driven by the same start timing signal to move the image sensor to a different position by shifting by 1/2 pixel in the longitudinal direction on the circuit pattern of the wafer 1 and shifted in the lateral direction by several tens of μm. A delay circuit (which may be incorporated in the image sensor 4) 15 shown in FIG. 2 outputs the output of one of the image sensors for the time required for the stage to move a distance (several tens of μm) between the sensors so that the relationship shown in FIG. Delay for a certain time. This delay of the fixed time may be performed inside the image sensor 4.

The image sensor 4, as shown in FIG.
The two image sensors 4a and 4b are integrally arranged. As the two integrated one-dimensional image sensors 4a and 4b, a time delay integration type image sensor or the like can be used. These can be unidirectional or bidirectional.

These are arranged at the in-focus position of the object lens 3,
The one-dimensional image sensors 4a and 4b are configured so that there is no defocus. The detection position (detection field of view) is shown in FIG.
As shown in FIG. 3 and FIG. 3, it is assumed that the one-dimensional image sensor 4a is shifted from the one-dimensional image sensor 4b by 1/2 pixel in the longitudinal direction of the one-dimensional image sensor on the circuit pattern of the wafer 1. Further, as shown in FIG. 3, the delay circuit 15 causes the one-dimensional image sensor 4a to be perpendicular to the one-dimensional image sensor 4b by 1/2 pixel on the circuit pattern of the wafer 1 in the longitudinal direction of the one-dimensional image sensor. The XY stage 8 is shifted in the scanning direction for detection. The length of each one-dimensional image sensor is 1024 pixels, and the detection pixel size on the wafer surface is 0.24 μ.
m is 24 on the wafer surface as shown in FIG.
The detection visual field of 6 μm × 0.24 μm has a visual field positional relationship that is shifted in the XY directions by 0.12 μm. Further, in order to eliminate the influence of the illuminance fluctuation of the illumination lamp, each one-dimensional image sensor 4a, 4b is driven by the same clock and the same start timing signal. Further, in order to eliminate image distortion due to speed fluctuations of the XY stage 8, the image sensors 4a and 4b are driven in synchronization with the output of a position detection scale (not shown) mounted on the stage 8. In addition,
A focusing mechanism is necessary for stable image detection, but it is omitted here.

This integrated one-dimensional image sensor 4
The images shown in FIG. 4 are detected by the a, 4b, the A / D converters 9a, 9b, and the mixer 10. That is, the mixer 10
Thus, the image signal A detected by the one-dimensional image sensor 4a and the image signal B detected by the one-dimensional image sensor 4b are selected and detected in parallel, and as a result, they are detected as the combined image signal C. The feature of this image signal is that the center position (lattice position) of each pixel of the image signals A and B in FIG. Four
The center position (lattice position) of each pixel of the composite image signal C selected from each of b and output in parallel forms a right triangle. FIG. 5 (a) shows an image representation by a conventional square lattice (image signal output from one one-dimensional image sensor), and FIG. 5 (b) shows a right triangle lattice of the present invention (two one-dimensional image sensors). Image representations by image signals selected from 4a and 4b and output in parallel are shown for comparison. However, in FIG. 5B, it should be noted that each pixel overlaps with an adjacent pixel by ½ pixel. In the mixer 10, as shown in FIG. 6, offset and gain of output amplifiers (not shown) of the one-dimensional image sensors 4a and 4b are stored in a look-up table (correction data measured in advance in a RAM or the like) and input. Converted data and output) 10-1
a and 10-1b are used for compensation, and the inconsistency due to the difference in sensitivity between the one-dimensional image sensors 4a and 4b is corrected to obtain an extremely accurate grayscale image signal having no error in the density value. The obtained grayscale image signal is alternately switched by a switcher (selection circuit) 10-2 as shown in FIG. 5B and output as an 8-bit image signal, or an 8-bit × 2-channel image signal. Output as image signals at the same time. Then, at the same time as being transferred to the image memory 5, the defect determination circuit 6 compares it with the image of the immediately preceding adjacent chip stored in the image memory 5 and detects a difference in shading or a difference in shape as a defect. To be done.

Here, the defect detection performance is not uniquely determined by the pixel size at the time of detecting an image, except for the defect determination algorithm, but is the pixel pitch (lattice interval) at the time of processing the image. The applicant thinks that it depends on This is, for example, as shown in FIG. J72-D-II, No.
12 (1989) pp. In the comparison diagrams of the defect detection ability described in 2041 to 2050, after the image detected with the pixel size of 0.12 μm and the pixel size of 0.24 μm,
A new pixel is interpolated at a pixel pitch of 0.12 μm, and the image formed additionally has almost the same defect detection performance, that is, 0.3.
Due to the ability to detect μm defects. That is, 0.24μ
For an image with a pixel size of m, 0.12μ
Although m pitch pixels are obtained, the density value of this pixel is an average smoothed pixel made from surrounding pixels, and the pixel size itself is twice or three times that of the original pixel.
It can be said that the size is doubled (4 times or 9 times in area). Therefore, the quality of the interpolated pixels is low. Even if such averaged density values are compared, the defect detection performance is not deteriorated by 0.12 μm.
It is nothing but because it processes images at the pitch of. If the distance between adjacent nearest pixels (lattice distance) is defined as “distance”, both images have the same distance, that is, 0.12 μm.
Therefore, this distance determines the defect detection performance. However, in the method of interpolating pixels and processing the image at this pitch, the amount of information at the time of image detection cannot be further increased by the interpolation, and therefore 0.1 μ
It is expected that it is impossible in principle to detect ultrafine defects such as m defects. Generally, if the pixel size at the time of detection is reduced, the possibility that even minute defects can be detected increases, but the detection time increases in proportion to the square thereof. Therefore, the pixel size is restricted by the inspection time or the like and cannot be unnecessarily reduced.

Therefore, as shown in FIGS. 4 and 5B, the one-dimensional image sensor 4b is operated by the apparatus shown in FIG.
The image signal B output from the one-dimensional image sensor 4b and output from the one-dimensional image sensor 4b with a shift of 1/2 pixel in each of the xy direction is superimposed on the image signal A output from the one-dimensional image sensor 4b in the mixer 10, and the combined image signal Simultaneously detected in the form of C. In this case, the pixel size of each of the image signals A and B before combination is, for example, α (for example, α = 0.2
4 μm), the interval between adjacent pixels in each image before combining is α in the xy direction and α × √2 (= 0.3 in the licking direction).
4 μm). On the other hand, the interval between adjacent pixels of the combined image signal C is α in the xy direction and α / √2 in the licking direction.
(= 0.17 μm), and in the concept of the distance representing the distance between the nearest adjacent pixels, the lattice distance of the image is reduced by 1 / √2. Therefore, the mixer 10
It is expected that if the defect determination is performed using the image C synthesized in step 1, even a finer defect, that is, a defect having a size approximately 1 / √2 times that of the conventional defect can be detected. In other words, an image in which the central position (lattice position) of each pixel forms a right triangle is extremely advantageous in defect determination as compared with an image arranged on a square lattice.

If the pixel size of each of the images A and B is enlarged and detected by √2 times (0.34 μm), the distance in the combined image C does not change (0.24 μm),
Therefore, if the combined image C is used, it has almost the same defect detection performance. However, in this case, the detection time is half that of the conventional one, and the inspection speed can be dramatically improved. That is, expressing the pattern to-be-inspected with an image in which the grid positions form a right-angled triangle has denser information than that in an image arranged on a conventional square grid, and the compression of the image is difficult. It is also becoming.

As described above, the image representation with the right-angled triangle lattice is higher than the conventional image representation such as the square lattice or the hexagonal lattice (see the textbook on computer image processing, Tamura, Soken Publishing, etc.). Have the ability.

In the above embodiment, the two image sensors 4
Although an image is detected with a positional relationship (field-of-view relationship) that is deviated by 1/2 pixel using a and 4b, an image is detected at a position that is deviated by 1/3 pixel using three image sensors. Image sensor, the amount of deviation (1
/ N pixel shift) can be set. However,
When three or more image sensors are used, the grid position is not always a right triangle.

Next, an example of defect determination using the above-mentioned composite image will be described. A configuration example of the defect determination circuit 6 is shown in FIG.
The defect determination circuit 6 includes a pixel interpolation circuit 12 that interpolates one of the composite images input from the mixer 10, a registration circuit 13 that aligns the images, and a mismatch detection circuit 14 that detects a mismatch between the aligned images. Become. As shown in FIG. 9A, the pixel interpolating circuit 12 causes the central position (lattice position) of each pixel in which a right triangle is formed to form a square as shown in FIG. 9B. A pixel is newly interpolated between the pixels of the composite image. Note that in FIG. 9, pixels are arranged on the grid points to represent the image. The pixel interpolation is given by, for example, the following equations (Equation 1) (Equation 2) (Equation 3).

E = (a + c) / 2 (Equation 1) or e = (b + d) / 2 (Equation 2) or e = (a + b + c + d) / 4 (Equation 3) where e is the density value of the interpolated pixel , A, c are density values of pixels detected by the image sensor 4a, and b, d are density values of pixels detected by the image sensor 4b. The interpolation does not have to be linear interpolation as in the above equations (Equation 1) (Equation 2) (Equation 3), and any conventionally proposed nonlinear method or the like can be applied. As a result, α / 2 (0.12
It is possible to obtain a highly accurate gray-scale image of a grid position having an interval of (μm). Although the pixel at the center (1/2 position) is newly formed by the above interpolation, the pixel may be formed at any position such as 1/3 and 2/3 positions.

In FIG. 8, in order to further improve the defect detection performance, the alignment circuit 13 and the mismatch detection circuit 14 are provided with
The method proposed by the applicant in Japanese Patent Application No. 2-3587 can be used. For the alignment, if a composite image of A and B is used, highly precise alignment with an interval of α / 2 (0.12 μm) can be performed. Note that this alignment may use only the original image A or the image B, or may use the image before pixel interpolation. The mismatch detection circuit 14 compares the aligned and interpolated composite images with each other between the chips, and outputs the difference in shade and the difference in shape as a mismatch. At that time, in the corresponding pixel of the other image corresponding to the pixel of interest of one image, the neighboring pixel is located closer to the neighboring pixel of the conventional image. Compared with the method, detailed analysis can be performed in smaller units, and highly accurate mismatch detection can be performed. As a result, ultrafine defects can be detected.

In the above embodiment, the detection pixel size is 0.24.
Although described as μm, of course, this dimension may be an arbitrary value and is determined by the inspection target, inspection time, and the like.

Finally, a specific method of manufacturing the image sensor 4 according to the present invention will be described. FIG. 10 shows a method of manufacturing the image sensor. Pattern formation and etching can be realized by a method similar to that of a normal image sensor, but for exposure, the one-dimensional image sensor 4a and the one-dimensional image sensor 4b are provided at different timings as shown in FIG. Expose. By repeating this, a large number of image sensor pairs 4a / 4b are formed on the wafer. There is also a method of exposing 4a and 4b formed on one reticle as shown in FIG. In this case, it is not much different from the conventional manufacturing. However, the reticle is slightly larger. The image sensors 4a and 4b formed on the wafer are then die-bonded as shown in FIG. Then, the two cut out one-dimensional image sensors 4a and 4b are molded / bonded into one. As described above, the image sensor 4 according to the present invention can be sufficiently realized by the existing technology.

The method of detecting an image and the defect determination using the detected image have been described with reference to the embodiments. According to the above configuration, the image sensor 4 has a high-precision image alignment in smaller units, which is a detection pixel interval corresponding to the arrangement interval of the two one-dimensional image sensors 4a and 4b,
It is possible to compare light and shade. Therefore, even smaller defects can be detected. Further, although the optical microscope has been described as an example here, the concept of the image described above is widely applicable and extremely versatile. That is, information on the surface or inside of a semiconductor element or the like obtained from an electron microscope or an X-ray imaging device or the like is converted into an electric signal by an image pickup tube, an image pickup element, or the like, and a predetermined signal (image ) It can also be applied to the case where treatment is performed. It can also be used for purposes other than inspection, such as pattern recognition, positional deviation detection using it, or positioning.

In this embodiment, an example using two one-dimensional image sensors 4a and 4b will be described, but a large number of one-dimensional image sensors such as a TV camera may be integrally arranged in parallel. . In this case, the XY stage 8 performs step and repeat movement to detect a two-dimensional image signal. However, in this case, it is necessary to provide a large number of delay circuits.

[0029]

According to the present invention, it is possible to detect an image having a region where a detection pixel overlaps with an adjacent detection pixel.
This image is an image having another parameter such as the interval (pitch) of the detection pixels in addition to the parameters such as the size of the detection pixel and the density value, and is suitable for defect detection. That is, in this image, the size of the detection pixel and the interval of the detection pixel can be independently set at the time of image detection without being restricted by each other.
It is possible to perform highly accurate image alignment in a unit smaller than that determined by the detection pixel interval, which is the latter parameter, and to compare light and shade. Therefore, it becomes possible to detect ultra-small defects in the pattern to be inspected with high accuracy in a short time, sufficiently corresponding to miniaturization, large area, and multi-layering of the LSI. as a result,
It is possible to provide a circuit pattern defect detection device capable of detecting even a minute defect of 0.1 to 0.3 μm. Also,
The detected image has a new concept of image and can be widely applied to other than inspection.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of a circuit pattern image detection method and apparatus according to the present invention.

FIG. 2 is a diagram showing a detection visual field.

FIG. 3 is a diagram showing an image sensor according to the present invention.

FIG. 4 is a diagram showing a configuration of a detected image.

FIG. 5 is a diagram showing an image by a conventional square grid and an image by a right triangle grid of the present invention.

FIG. 6 is a diagram showing a configuration of a mixer that synthesizes outputs of two image sensors.

FIG. 7 is a comparative diagram (known example) of defect detection performance in different detection pixel sizes.

FIG. 8 is a configuration block diagram of a defect determination circuit.

FIG. 9 is a diagram (pixels are expressed on lattice points) showing additional pixel formation by pixel interpolation.

FIG. 10 is a diagram for explaining an inner exposure method of the method of manufacturing the image sensor.

FIG. 11 is a dicing process in the image sensor manufacturing method;
It is a figure for demonstrating a mold / bonding method.

FIG. 12 is a diagram for explaining a conventional technique.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Wafer, 2 ... Lamp, 3 ... Objective lens 4 ... Image sensor, 5 ... Image memory, 6 ... Defect determination circuit 7 ... Chip, 8 ... XY stage, 9 ... A
/ D converter 10 ... Mixer, 10-1 ... Lookup table 10-2 ... Switcher, 11 ... Half mirror, 12 ...
Pixel interpolation circuit 13 ... Alignment circuit, 14 ... Mismatch detection circuit

Continuation of front page (51) Int.Cl. ⁵ Identification number Office reference number FI technical display location H01L 21/027 21/66 J 7630-4M (72) Inventor Takashi Hiroi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd., Production Engineering Laboratory

Claims (7)

[Claims] 1. An image detecting unit for detecting an image signal having an area in which a detection pixel overlaps with an adjacent detection pixel by an image sensor having a plurality of light receiving unit arrays for a circuit pattern to be inspected, and the image. A circuit pattern defect detection device comprising: a detection unit that detects a defect in a circuit pattern by comparing an image signal detected by the detection unit with a reference image signal. 2. The circuit pattern defect detection device according to claim 1, wherein the image sensor is of a time delay integration type. 3. The circuit pattern defect detection device according to claim 1, wherein the image sensor is formed by arranging a plurality of light receiving section arrays of a plurality of types and shifting them by a half pitch. 4. The circuit pattern defect detecting device according to claim 2, wherein the image detecting means is configured to obtain an image signal by selecting an image signal from a plurality of arrays of light receiving portions of the image sensor. . 5. An image signal having a region in which a detection pixel overlaps with an adjacent detection pixel is detected by an image sensor having a plurality of light receiving section arrays for each of the circuit patterns to be inspected which are originally the same, A circuit pattern defect detecting method comprising detecting a defect of a circuit pattern by comparing corresponding portions of the detected image signals. 6. The circuit pattern defect detecting method according to claim 5, wherein the respective image signals are detected in a form arranged in a right-angled triangular lattice. 7. An image sensor having a plurality of light receiving section arrays.