JPH06236994A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent an impurity in polysilicon from diffusing into a silicide part in a thermal treatment step for forming a polycide structure. CONSTITUTION:An insulating film (b) and a gate insulating film (c) are formed on a semiconductor substrate (a). The gate insulating film (c) is coated with an amorphous silicon film (d'), and the surface of this amorphous silicon film (d') is nitrified by electron resonance in a cyclotron so that a silicon nitride layer (g) is formed thereon. Moreover, the silicon nitride layer (g) is coated with a tungsten silicide film (e). In this laminated structure, the amorphous silicon film (d), silicon nitride layer (g), and tungsten silicide film (e) constitute a tungsten polyscide electrode (i). Consequently, in this structure, the amorphous silicon film (d') is connected through the silicon nitride layer (g) to the tungsten silicide film (e).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a polycide electrode or a polycide wiring, and more particularly to suppressing diffusion of impurities in a lower silicon semiconductor film forming polycide into an upper refractory metal silicide film. The present invention relates to a semiconductor device having such a structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, in semiconductor devices typified by LSI's, miniaturization is rapidly progressing to a minimum pattern size of about 0.5 μm or less in order to improve the degree of integration and the device operating speed. In order to realize a high-speed operation as designed in such an ultrafine LSI, the high-speed operation of the active element such as a transistor is accurately performed, and at the same time, the resistance of the electrode of the active element and the wiring between the elements are sufficiently low. This is very important.

In the formation of wiring, the size thereof is reduced and the wiring resistance is increased. Therefore, measures are taken to minimize the increase in resistance. In particular, in the MOSLSI, which has been remarkably advanced in miniaturization, from the above-mentioned viewpoint, improvement from a conventional polysilicon electrode as a gate electrode to a lower resistance polycide electrode made of a laminated body of refractory metal silicide and polysilicon is required. Has been planned.

FIG. 6 (e) is a cross-sectional view for explaining an essential part of a conventional semiconductor device using a polycide gate electrode by taking a MOS transistor as an example. In FIG. 6E, a is a semiconductor substrate, b is an insulating film, c is a gate insulating film, and on this gate insulating film c, a polysilicon film d as a silicon semiconductor film and a tungsten silicide as a refractory metal silicide film are formed. A tungsten polycide electrode i'having a laminated structure with the film e is formed, and the polysilicon film d has a structure in direct contact with the tungsten silicide film e.

In FIG. 6 (e), h is a silicon oxide film, j is a thermal oxide film on the gate side surface, k is an n ^- diffusion layer, l
Is a gate side CVD silicon oxide film, m is an n ⁺ diffusion layer,
q is an interlayer insulating film, r is a contact hole, and s is an aluminum electrode.

FIGS. 6A to 6D are cross-sectional views showing the manufacturing process of the semiconductor device shown in FIG. 6E, and the manufacturing process of the semiconductor device using the conventional polycide gate electrode structure will be described. To do. First, as shown in FIG. 6A, for example, a thick insulating film b made of a silicon oxide film is formed on the surface of a semiconductor substrate a having a p-type conductivity to form an element isolation region, and the thick insulating film b is connected. Then, a thin silicon oxide film having a thickness of about 100 Å is formed as a gate insulating film c.

Next, as shown in FIG. 6B, a polysilicon film d is formed on the insulating film b and the gate insulating film c by the CVD method.
After being formed to a thickness of about 0.15 μm, phosphorus, for example, is added as an impurity into the polysilicon film d by an ion implantation method. Amorphous silicon may be used in place of the polysilicon film d, and impurities may be added during the formation of the CVD silicon film instead of the ion implantation method as an impurity addition method. The amount of impurities added is required to be 2 × 10 ²⁰ cm ⁻² or more for the polysilicon film d to be in a degenerated state and to have a sufficiently low resistance.

Then, a polysilicon film d is formed by etching with dilute hydrofluoric acid.
After removing the upper natural oxide film, a tungsten silicide film e is formed to a thickness of about 0.15 μm by, for example, a sputtering method. At this stage, the polysilicon film d and the tungsten silicide film e form a tungsten polycide structure f ′. Next, the tungsten silicide film e
A silicon oxide film h is formed on top. This silicon oxide film h is necessary to prevent impurities contained in the lower polysilicon film d from passing through the upper tungsten silicide film e and outwardly diffusing when the tungsten polycide is heat-treated in a later step. Is.

Next, although not shown, a gate electrode resist pattern is formed on the silicon oxide film h by the photolithography method, and the silicon oxide film h is etched by using the resist pattern as a mask by the RIE method to form the gate electrode pattern as the silicon oxide film. After transferring to h, the resist pattern described above is removed by oxygen plasma treatment.

Next, as shown in FIG. 6C, the tungsten silicide film e and the polysilicon film d are dry-etched in this order using the silicon oxide film h as a mask to form a tungsten polycide electrode i '. Next, as shown in FIG. 6 (d), an oxide film j is formed on the side surface of the tungsten polycide electrode i'by thermal oxidation, and then, for example, phosphorus is shallowly introduced into the semiconductor substrate a as an impurity by an ion implantation method to obtain about 80
A heat treatment is performed at 0 ° C. for 30 minutes to form the n ⁻ diffusion layer k.

Then, after depositing a silicon oxide film by the CVD method, the entire surface is dry-etched by the RIE method to form a silicon oxide film 1 on the side surface of the gate electrode,
For example, phosphorus is introduced as an impurity into the semiconductor substrate a by an ion implantation method, and heat treatment is performed at 850 ° C. to 900 ° C. to remove n ^+.
The diffusion layer m is formed. The heat treatment process for forming these diffusion layers is performed by polycrystallizing the tungsten silicide film e of the tungsten polycide electrode i ′ and the polysilicon film d.
It also serves as a polycide heat treatment for activating the impurities inside. By this heat treatment, the tungsten polycide electrode i'becomes a gate electrode having a sufficiently low resistance.

Next, as shown in FIG. 6 (e), after forming an interlayer insulating film q by a CVD method, a contact hole r is opened by a photolithography process and an RIE process, and then aluminum is deposited, followed by a photolithography process. RIE
Through the steps, the aluminum electrode s is formed to complete the MOS transistor.

[0013]

However, in the above-described conventional method of manufacturing a semiconductor device, the phosphorus contained in the polysilicon film d is tungsten silicide in the polycide heat treatment step described with reference to FIG. Membrane e
As a result of diffusing into, the phosphorus concentration in the polysilicon film d was lowered.

In such a MOS structure using a polycide electrode as a gate electrode, the MOS interface has characteristics that deteriorate as shown in the low frequency capacitance-voltage characteristics of the MOS diode in FIG. The obtained regular characteristics showed a larger result.
This is because the degenerated state of the polysilicon film d cannot be maintained because the phosphorus concentration in the polysilicon film d is lowered, and the polysilicon film d restores its property as a semiconductor. Therefore, when a voltage is applied to the polycide electrode, Polysilicon film d
This is because a depletion layer is generated in the vicinity of the gate insulating film and the interface state in the polysilicon becomes apparent. This appears as a change in the threshold voltage that is important for the on / off control of the MOS transistor, and has been a serious problem that deteriorates the MOS transistor characteristics.

In addition, a p-type MOS transistor and an n-type MO
LS represented by CMOS equipped with S transistor
In I, in order to maintain the high performance of MOS transistors along with the miniaturization of elements in recent years, the gate electrode of a p-type MOS transistor is made of n-type polysilicon doped with a high concentration of impurities imparting p-type conductivity. As the gate electrode of the MOS transistor, a heteropolar gate electrode into which polysilicon doped with a high concentration of an impurity imparting n-type conductivity is introduced is used.

FIG. 7 shows a conventional example in which this heteropolar gate electrode is formed with a polycide structure.
Is a plan view, and FIG. 7B is a cross-sectional view taken along the line BB ′ of FIG. In the figure, m'is a p ⁺ diffusion layer and i "is a p ⁺ diffusion layer.
⁺ Tungsten polycide electrode. Also in the heteropolar polycide electrode having such a structure, diffusion of impurities occurs from the polysilicon film d to the silicide film e as shown by an arrow in the polycide heat treatment step. By the way, it is known that the diffusion coefficient of phosphorus in silicide is about three orders of magnitude higher than that in silicon.
This is, for example, in the literature (CBCooperIII et.al.:Dopant re
distribution in silicides "J.Vac.Sci.Technol.B, Vol.
2, No. 4, 1984, pp. 718).

Therefore, in the heteropolar polycide electrode, not only the impurity concentration in the polysilicon is lowered due to the diffusion of impurities from polysilicon into the silicide, but also high-speed interdiffusion of p-type and n-type impurities in the silicide is caused. As a result, the impurities in the heteropolar polysilicon are canceled out, resulting in an extremely low impurity concentration in the polysilicon, which is described in, for example, the literature (H. Hayashida et.al .: "Dopant redistr
ibution in dual gate w-polycide CMOS and its impro
vement by RTA "Proc. VLSI Symp., p.29, 1989), the threshold voltage of the MOS transistor fluctuates greatly, which is a major obstacle to the normal operation of the LSI.

As is apparent from the above-mentioned conventional example, the problem is that the impurities in the polysilicon diffuse into the silicide during the polycide heat treatment. Therefore, in order to solve the problem, it is necessary to apply a method for preventing the diffusion of impurities from polysilicon to silicide. In order to use the polycide structure as an electrode and a wiring as an additional condition at this time, it is necessary to maintain the electrically conductive state between the polysilicon film and the silicide film, which are the films of the polycide structure. Further, if possible, a simple and low-temperature method is desired so that the influence on the steps before and after the polycide step is reduced.

Therefore, the present invention has been made to solve the above-mentioned conventional problems, and an object thereof is to satisfy the above-mentioned incidental conditions and to diffuse impurities in polysilicon into silicide during polycide heat treatment. It is to provide a semiconductor device and a method for manufacturing the same that are prevented from doing so.

[0020]

The inventors of the present invention have conducted extensive studies in order to achieve such an object. As a result, polysilicon containing impurities in a nitrogen-based plasma formed by electron cyclotron resonance, which is a low temperature process, has been found. It has been discovered that, by nitriding the silicon nitride and then forming a silicide on the nitrided polysilicon, diffusion of impurities from the polysilicon into the silicide can be suppressed even when exposed to a high temperature heat treatment for polyciding.

As an example showing this effect, an amorphous silicon film containing, for example, phosphorus of 4 × 10 ²⁰ cm ^-2 is used as a silicon semiconductor film, and a tungsten silicide film is used as a silicide film for about 900 ° C. for 1 hour. FIG. 3 shows the result of examining the phosphorus concentration distribution in the tungsten polycide after the high temperature heat treatment by SIMS analysis.

In the conventional example, the phosphorus concentration in the amorphous silicon is greatly reduced as a result of phosphorus diffusion into the tungsten silicide as shown in FIG. 3, whereas in the application example of the present invention, as shown in FIG. As shown, in a tungsten polycide film in which a silicon nitride layer of about 50 Å is formed on the surface of amorphous silicon by nitrogen plasma formed by electron cyclotron resonance, the diffusion of phosphorus from amorphous silicon to tungsten silicide is suppressed. No decrease in phosphorus concentration was observed.

Electron cyclotron resonance conditions for forming this silicon nitride layer are, for example, microwave power of about 900 W, N ₂ gas pressure of 0.5 mTorr, RF power density of 0.5 W / cm ² , and nitriding time of 10 minutes. Good.
Alternatively, a gas obtained by adding H ₂ to N ₂ may be used as the gas.
_{3 is} also good. Further, no RF power is required and the nitriding target may be polysilicon.

As shown in FIG. 4, an XPS analysis result of the amorphous silicon surface treated under the electron cyclotron resonance plasma condition described above shows a peak near the binding energy of the silicon nitride film of 101.5 eV. It was confirmed that a silicon nitride film was formed. In addition, as a result of conducting the conductivity evaluation of the silicon nitride layer using one electrode as a tungsten silicide film and the other as a film in which amorphous silicon is changed to polysilicon by heat treatment as an electrode, as shown in FIG. It was confirmed that the resistance was increased several times as compared with the above, and it was confirmed that the tungsten silicide film and the polysilicon film were connected to each other in a state where they were sufficiently conductive.

As described above, the present invention provides a semiconductor device having an electrode or a wiring portion formed of a laminated body of a refractory metal silicide film and a silicon semiconductor film on an insulating film formed on a semiconductor substrate. A silicon nitride layer formed by nitriding treatment is provided on the surface layer of a silicon semiconductor film. Further, in the step of forming the polycide film, the impurity-containing silicon semiconductor film is subjected to nitriding treatment with nitrogen-based plasma formed by electron cyclotron resonance in advance before forming silicide.

[0026]

According to the present invention, in the MOS transistor manufacturing process, the silicon semiconductor film is simply nitrided by nitrogen-based plasma by electron cyclotron resonance, which is a low temperature process, to easily convert the impurities in the polysilicon into silicide during the polycide heat treatment. Can be prevented from spreading. As a result, in the polycide electrode of the MOS transistor,
It is possible to prevent impurities from being reduced in the polysilicon film, prevent the threshold voltage from varying in the MOS transistor, and perform the transistor operation as designed. Further, in the process of manufacturing an LSI represented by CMOS having a heteropolar polycide gate MOS transistor mounted thereon, mutual diffusion of impurities between heteropolar gate electrodes can be suppressed, so that p-type and n-type M
The high-performance operation of the OS transistor can be ensured, and the high-speed LSI can operate as designed.

[0027]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 (e) is a cross-sectional view of essential parts showing a configuration according to an embodiment of the semiconductor device of the present invention. Figure 1 (e)
A is a semiconductor substrate, b is an insulating film, and c is a gate insulating film. An amorphous silicon film d ′ as a silicon semiconductor film and a surface of the amorphous silicon film d ′ are formed on the gate insulating film c by an electron cyclotron. A silicon nitride layer g nitrided by plasma due to resonance is formed, and a tungsten silicide film e is formed as a refractory metal silicide film on the silicon nitride layer g. A layered tungsten polycide electrode i is formed by the layer g and the tungsten silicide film e. Therefore, the amorphous silicon film d'has a structure connected to the tungsten silicide film e via the silicon nitride layer g.

FIGS. 1A to 1D are sectional views of steps for explaining the method of manufacturing the semiconductor device shown in FIG.
In this embodiment, an n-type MO using a polycide gate electrode is used.
The manufacturing process of the S transistor will be described. First, Fig. 1
As shown in (a), for example, a semiconductor substrate a whose conductivity type is p-type
A thick insulating film b made of a silicon oxide film is formed on the surface of the element to form an element isolation region, and a thin silicon oxide film having a thickness of about 110 Å is formed by connecting to the thick insulating film b to form a gate insulating film c. To do.

Next, as shown in FIG. 1B, 2 × 10 ²⁰ c of phosphorus is deposited on the insulating film b and the gate insulating film c by the CVD method.
About m ⁻² doped amorphous silicon film d ′
It is formed to a thickness of 5 μm. Up to this point, the process is the same as the conventional one.

Next, the native oxide film on the amorphous silicon film d'is removed by dilute hydrofluoric acid etching, and then the amorphous silicon film d'is nitrided in the nitrogen plasma formed by electron cyclotron resonance to form the silicon nitride layer g. Form. Next, a tungsten silicide film e is formed to a thickness of about 0.15 μm by the sputtering method. At this stage, a tungsten polycide structure f is formed by the amorphous silicon film d ′, the silicon nitride layer g, and the tungsten silicide film e. Next, a silicon oxide film h is formed on the tungsten silicide film e by the CVD method.

In the silicon nitriding step shown in FIG. 1B, for example, microwave power 900 W, N ₂ gas pressure 0.5.
By forming a silicon nitride layer g of about 50 Å with mTorr, RF power density of 0.5 W / cm ² , and nitriding time of 10 minutes, the amorphous silicon film d ′ to the tungsten silicide film e are formed in the subsequent polycide heat treatment.
The diffusion of phosphorus into the amorphous silicon film d ′ can be prevented, and the increment of the connection resistance between the polysilicon film grown from the amorphous silicon film d ′ and the tungsten silicide film e is as small as several times, and the upper silicide film and the lower polysilicon film are A conductive polycide electrode can be formed.

The subsequent steps are the same as those in the conventional method, and although not shown in the drawing, a gate electrode resist pattern is formed on the silicon oxide film h by a photolithography method, and R
The silicon oxide film h is etched by the IE method using this resist pattern as a mask to transfer the gate electrode pattern to the silicon oxide film h, and then the resist pattern is removed by oxygen plasma treatment. Next, as shown in FIG. 1C, the tungsten silicide film e, the silicon nitride layer g, and the amorphous silicon film d ′ are dry-etched in this order using the silicon oxide film h as a mask to form a tungsten polycide electrode i. The n-type MOS transistor can be completed if the manufacturing process after FIG. 1D is performed by the same method as the process shown in FIG.

MO manufactured along the above manufacturing process
As for the low frequency capacitance-voltage characteristic of the S diode, as shown in FIG. 2, the MOS interface showed a clean and normal characteristic. Therefore, in the method for manufacturing a semiconductor device to which the present invention is applied, in the polycide structure, since diffusion of impurities from the silicon semiconductor film to the refractory metal silicide film does not occur as in the conventional case, variation in the threshold voltage of the MOS transistor does not occur, It is possible to easily manufacture a MOS transistor having a high operating speed and a heteropolar polycide gate CMOS LSI.

In the above-described embodiments, the case where an amorphous silicon film is used as the silicon semiconductor film forming the polycide structure has been described, but a polysilicon film may be used, and a tungsten silicide film is used as the silicide film. Although the case has been described, it is not limited to the tungsten silicide film, and may be a silicide film of a metal belonging to group IVA, VA, or VIA in the periodic table such as a molybdenum silicide film, a titanium silicide film, or a cobalt silicide film.

Further, in the above-described embodiments, the method of doping impurities into the silicon semiconductor film has been described as a method of doping at the time of forming the silicon semiconductor film. However, after forming the silicon semiconductor film, an ion implantation method or a CVD film is used. A method of doping by a thermal diffusion method or the like may be used, and phosphorus has been used as an impurity to be introduced into the silicon semiconductor film. However, impurities such as arsenic and antimony for making n-type conductivity, boron, gallium, indium, etc. Impurities for making the p-type conductivity type may be used. In addition, the conductivity type of the semiconductor substrate is p
Although the case of the n-type has been described, the case of the n-type may be used.

[0036]

As described above, according to the present invention,
In the polycide structure, the impurity in the silicon semiconductor film is prevented from diffusing into the silicide film, so that a threshold voltage fluctuation does not occur in the polycide gate MOS transistor, and a transistor that can operate as designed can be obtained. Further, according to the present invention, a CMOS or BiCMO equipped with a heteropolar polycide gate MOS transistor is mounted.
In the manufacturing process of SLSI, the mutual diffusion of impurities between different polarity polycide gate wirings is prevented,
CMOS LSI and BiCMOS LSI with excellent operating speed
Such an extremely excellent effect that a semiconductor device can be easily manufactured is obtained.

[Brief description of drawings]

FIG. 1 is a sectional view of a manufacturing process illustrating an embodiment of a semiconductor device and a manufacturing method thereof according to the present invention.

FIG. 2 is a diagram illustrating a low frequency capacitance-voltage characteristic of a polycide gate MOS diode.

FIG. 3 is a diagram illustrating an impurity concentration distribution after heat treatment in a polycide structure formed according to the present invention.

FIG. 4 is a diagram illustrating an XPS analysis result of a silicon nitride layer formed by plasma nitriding of electron cyclotron resonance.

FIG. 5 is a diagram for explaining the conductivity between a polysilicon film surface-nitrided according to the present invention and a tungsten silicide film.

FIG. 6 is a cross-sectional view of a manufacturing process illustrating a conventional semiconductor device and a manufacturing method thereof.

FIG. 7 is a diagram illustrating mutual diffusion of impurities when a heteropolar gate electrode is formed of polycide.

[Explanation of symbols]

a semiconductor substrate b insulating film c gate insulating film d polysilicon film d ′ amorphous silicon film e refractory metal silicide film f tungsten polycide structure g silicon nitride layer h silicon oxide film i tungsten polycide electrode j gate side thermal oxide film k n ^- diffusion layer l Gate side surface CVD silicon oxide film m n ⁺ diffusion layer q interlayer insulating film r contact hole s aluminum electrode

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Eisuke Arai 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation

Claims (2)

[Claims] 1. A semiconductor device comprising an insulating film formed on a semiconductor substrate, and an electrode or wiring portion formed of a laminated body of a refractory metal silicide film and a silicon semiconductor film, the surface layer of the silicon semiconductor film. Is provided with a silicon nitride layer formed by nitriding treatment. 2. A method of manufacturing a semiconductor device, comprising: an insulating film formed on a semiconductor substrate; and an electrode or wiring portion formed of a laminated body of a refractory metal silicide film and a silicon semiconductor film. A step of depositing a silicon semiconductor film containing an impurity imparting n-type or p-type conductivity on the insulating film, and a step of nitriding a surface layer of the silicon semiconductor film in a nitrogen-based plasma formed by electron cyclotron resonance. Depositing a refractory metal silicide film on the surface silicon nitride semiconductor film, depositing a silicon oxide film on the refractory metal silicide film, and then sequentially depositing a silicon oxide film, a refractory metal silicide film, and a silicon An etching step of processing the semiconductor film into a pattern shape corresponding to an electrode or a wiring part. Method of manufacturing a conductor arrangement.