JPH06224177A - Semiconductor manufacturing apparatus - Google Patents

Semiconductor manufacturing apparatus

Info

Publication number
JPH06224177A
JPH06224177A JP874493A JP874493A JPH06224177A JP H06224177 A JPH06224177 A JP H06224177A JP 874493 A JP874493 A JP 874493A JP 874493 A JP874493 A JP 874493A JP H06224177 A JPH06224177 A JP H06224177A
Authority
JP
Japan
Prior art keywords
etching
tank
semiconductor wafer
manufacturing apparatus
heating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP874493A
Other languages
Japanese (ja)
Inventor
Tatsuo Matsuura
龍夫 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Original Assignee
Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Manufacturing Co Ltd, Kansai Nippon Electric Co Ltd filed Critical Renesas Semiconductor Manufacturing Co Ltd
Priority to JP874493A priority Critical patent/JPH06224177A/en
Publication of JPH06224177A publication Critical patent/JPH06224177A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Weting (AREA)

Abstract

PURPOSE:To provide a semiconductor manufacturing apparatus wherein a semiconductor wafer is anisotropically etched excellent in uniformity throughout its surface. CONSTITUTION:A semiconductor manufacturing apparatus is composed of an etching tank 7 filled with alkaline solution 11, a heating tank 10 covering the base and all the side face of the etching tank 7, a heater 13 which heats heating fluid 12 filled into the heating tank 10, and chuck means 20 which are provided inside the etching tank 7 in a freely detachable manner and where a semiconductor wafer 1 is horizontally placed respectively.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、誘電体分離を行った
高耐圧用IC等の製造に際して、半導体ウェーハに異方
性エッチングを行って、素子領域分離用V溝を形成する
半導体製造装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus for anisotropically etching a semiconductor wafer to form V-grooves for element region separation when manufacturing a high withstand voltage IC or the like with dielectric isolation. It is a thing.

【0002】[0002]

【従来の技術】高耐圧が要求されるIC等では素子領域
を完全に分離する誘電体分離が行われている。この誘電
体分離とは、図3に示す様に、(a)半導体ウェーハ
(1)の裏面に酸化膜(2)をマスクとして異方性エッ
チングを行って、素子領域(3)を取囲むようにV溝
(4)を形成し、(b)続いて形成したV溝(4)に酸
化膜(5)を形成した後、ポリシリコン(6)を堆積さ
せ、(c)その後、半導体ウェーハ(1)の表面をV溝
(4)の先端が出現するまで研磨を行い、ポリシリコン
(6)を支持体として絶縁分離した素子領域(3)を多
数形成する方法である。
2. Description of the Related Art In an IC or the like which is required to have a high breakdown voltage, a dielectric isolation for completely isolating an element region is performed. As shown in FIG. 3, this dielectric isolation means that (a) the back surface of the semiconductor wafer (1) is anisotropically etched using the oxide film (2) as a mask so as to surround the element region (3). After forming a V-groove (4) on the substrate, (b) forming an oxide film (5) on the subsequently formed V-groove (4), polysilicon (6) is deposited, and (c) after that, a semiconductor wafer ( This is a method in which the surface of 1) is polished until the tips of the V-grooves (4) appear, and a large number of element regions (3) are formed by insulation separation using polysilicon (6) as a support.

【0003】上記素子領域分離用V溝(4)は、異方性
エッチングを行って形成している。異方性エッチングを
行う装置は、図4に示す様に、エッチング槽(7)と加
熱槽(10)とからなる2層構造となっており、内側の
エッチング槽(7)にエッチング用アルカリ溶液(1
1)を入れ、外側の加熱槽(10)に加熱流体(12)
を入れ、加熱流体(12)をヒータ(13)にて加熱
し、加熱した加熱流体(12)にてアルカリ溶液(1
1)を加熱している。そして、エッチングは、マスキン
グした半導体ウェーハ(1)を立てて並べてキャリヤ
(14)に多数収納させ、キャリヤ(14)ごと半導体
ウェーハ(1)をエッチング槽(7)へ沈めて行ってい
る。
The element region separating V groove (4) is formed by anisotropic etching. As shown in FIG. 4, the apparatus for anisotropic etching has a two-layer structure consisting of an etching tank (7) and a heating tank (10). (1
1) is put and the heating fluid (12) is placed in the outer heating tank (10).
The heating fluid (12) is heated by the heater (13), and the alkaline solution (1
1) is being heated. Then, the etching is performed by arranging the masked semiconductor wafers 1 side by side and accommodating them in a large number in a carrier (14) and submerging the semiconductor wafers (1) together with the carrier (14) into an etching tank (7).

【0004】[0004]

【発明が解決しようとする課題】半導体ウェーハ(1)
に異方性エッチングを行う場合、図5に示す様に、所望
の素子領域の形状に合致したマスク(15)を形成して
いると、(111)方向(サイドエッチ方向)へのエッ
チング速度が速いため、図6に示す様に、素子領域
(3)のコーナ部分(16)が多くエッチングされてし
まい、絶縁層までの距離が短くなって耐圧性が低下す
る。そこで通常は図7に示す様にマスク(15)のコー
ナ部(15a)を大きく形成して、エッチング時に所望
の形状になるようにしている。
[Problems to be Solved by the Invention] Semiconductor wafer (1)
When anisotropic etching is performed on the substrate, as shown in FIG. 5, if a mask (15) that matches the shape of a desired element region is formed, the etching rate in the (111) direction (side etching direction) is increased. Because of the high speed, as shown in FIG. 6, a large amount of the corner portion (16) of the element region (3) is etched, the distance to the insulating layer is shortened, and the pressure resistance is lowered. Therefore, usually, as shown in FIG. 7, the corner portion (15a) of the mask (15) is formed large so as to have a desired shape at the time of etching.

【0005】しかし、従来のエッチング装置は、加熱流
体(12)にてアルカリ溶液(11)全体を加熱して、
アルカリ溶液(11)に対流を生じさせないで、全体を
均一に加熱するようにしているが、どうしても上部側の
温度が下部側より高くなっている。このようなアルカリ
溶液(11)内へ半導体ウェーハ(1)を立てて並べて
沈めているので、各半導体ウェーハ(1)の上部と下部
とで温度差を生じてエッチング速度が異なってしまい、
半導体ウェーハ(1)の面内で素子領域(3)のサイド
エッチ量にバラツキを生じていた。またエッチング時に
反応ガスの気泡が発生するが、その発生量が反応量に応
じて面内で異なり、泡きれも半導体ウェーハ(1)の上
下で異なり、この気泡がエッチングの妨げとなるので、
このこともサイドエッチ量のバラツキを助長していた。
However, the conventional etching apparatus heats the entire alkaline solution (11) with the heating fluid (12),
Although the whole of the alkaline solution (11) is heated uniformly without causing convection, the temperature on the upper side is inevitably higher than that on the lower side. Since the semiconductor wafers (1) are erected side by side in such an alkaline solution (11), the temperature difference between the upper and lower portions of each semiconductor wafer (1) causes a difference in etching rate,
The amount of side etching of the element region (3) varied within the plane of the semiconductor wafer (1). Further, bubbles of the reaction gas are generated during etching, but the generated amount varies in the plane depending on the reaction amount, and the bubble break also differs between the upper and lower sides of the semiconductor wafer (1), and the bubbles hinder the etching.
This also contributed to the variation in the side etch amount.

【0006】この発明は、エッチング時に半導体ウェー
ハの面内でのアルカリ溶液の温度差をなくし、かつ気泡
のきれ易さを同じ条件にしてエッチングを行える半導体
製造装置を提供しようとするものである。
An object of the present invention is to provide a semiconductor manufacturing apparatus which eliminates a temperature difference of an alkaline solution in a plane of a semiconductor wafer during etching and can perform etching under the same condition that bubbles are easily broken.

【0007】[0007]

【課題を解決するための手段】この発明は、エッチング
溶液を入れるエッチング槽と、前記エッチング槽の底部
及び側部を覆う加熱槽と、前記加熱槽内に入れられた加
熱流体を加熱するヒータと、前記エッチング槽内に出入
り可能に設けられ、上面に半導体ウェーハを横向きに載
せて保持する複数のチャック手段とで構成したものであ
る。
According to the present invention, there is provided an etching tank for containing an etching solution, a heating tank for covering a bottom portion and a side portion of the etching tank, and a heater for heating a heating fluid contained in the heating tank. , A plurality of chuck means that are provided so as to be able to move in and out of the etching tank and horizontally hold and hold a semiconductor wafer on the upper surface thereof.

【0008】また他にエッチング槽を超音波発生器にて
振動させるようにしたものもある。
In addition, there is also one in which the etching tank is vibrated by an ultrasonic wave generator.

【0009】[0009]

【作用】上記半導体製造装置は、半導体ウェーハを横向
きに並べた状態でエッチング用アルカリ溶液に浸けてエ
ッチングを行うので、半導体ウェーハの面内は同じ高さ
に保たれ、面内で温度差を生じない。また反応に伴う気
泡の発生量もウェーハ面内で同じとなり、エッチングの
バラツキを生じない。
In the semiconductor manufacturing apparatus described above, the semiconductor wafers are laterally arranged and immersed in an alkaline solution for etching, so that the semiconductor wafers are kept at the same height in the plane and a temperature difference occurs in the planes. Absent. In addition, the amount of bubbles generated by the reaction is the same on the wafer surface, and variations in etching do not occur.

【0010】さらに超音波発生器でエッチング槽を振動
させれば、半導体ウェーハの表面の泡ぎれがよくなり、
反応が促進される。
Further, if the etching bath is vibrated by the ultrasonic generator, the bubbles on the surface of the semiconductor wafer are improved,
The reaction is accelerated.

【0011】[0011]

【実施例】以下、この発明の実施例を図1及び図2を参
照して説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIGS.

【0012】半導体製造装置は、図1に示す様に、底の
浅いエッチング槽(7)とエッチング槽(7)を取囲む
加熱槽(10)とで2槽構造となっており、エッチング
槽(7)にエッチング用アルカリ溶液(11)を入れ、
加熱槽(10)に加熱流体(12)を入れる。また加熱
槽(10)にはヒータ(13)を設け、加熱流体(1
2)を加熱するようになっている。またエッチング槽
(7)には半導体ウェーハ(1)を横向きに保持するチ
ャック手段(20)を複数設けてある。チャック手段
(20)は例えば真空吸着を行うタイプものを使用し、
吸着面(21)をエッチング槽(7)から出入りするよ
うに適宜の昇降手段(図示せず)にて昇降させる。
As shown in FIG. 1, the semiconductor manufacturing apparatus has a two-chamber structure including an etching bath (7) having a shallow bottom and a heating bath (10) surrounding the etching bath (7). Put the alkaline solution (11) for etching into 7),
The heating fluid (12) is put into the heating tank (10). Further, the heating tank (10) is provided with a heater (13), and the heating fluid (1
2) is designed to be heated. Further, the etching tank (7) is provided with a plurality of chuck means (20) for holding the semiconductor wafer (1) sideways. The chuck means (20) is of a type that performs vacuum suction, for example,
The suction surface (21) is moved up and down by an appropriate lifting means (not shown) so as to move in and out of the etching tank (7).

【0013】上記半導体製造装置は、各チャック手段
(20)の吸着面(21)をエッチング槽(7)より上
方へ持上げておき、吸着面(21)に半導体ウェーハ
(1)が載せられると、これを真空吸着し、その後、下
降して吸着した半導体ウェーハ(1)をエッチング槽
(7)のアルカリ溶液(11)中に沈めて、エッチング
を行う。エッチングが終わると、チャック手段(20)
を上昇させて、純水をかけてエッチストップさせ、半導
体ウェーハ(1)をエッチング槽(7)から取り出す。
In the above semiconductor manufacturing apparatus, when the suction surface (21) of each chuck means (20) is lifted above the etching tank (7) and the semiconductor wafer (1) is placed on the suction surface (21), This is vacuum-adsorbed, and then, the semiconductor wafer (1) which is descended and adsorbed is immersed in an alkaline solution (11) in an etching tank (7) to perform etching. After etching, chuck means (20)
Is raised and pure water is applied to stop the etching, and the semiconductor wafer (1) is taken out from the etching tank (7).

【0014】また図2に示す様に加熱槽(10)に超音
波発生器(22)を設け、この超音波発生器(22)に
てエッチング処理時、エッチング槽(7)を振動させる
ようにしたものもある。これであれば、半導体ウェーハ
(1)を振動させるので反応によって発生した気泡をす
ばやく半導体ウェーハ(1)の表面から離すことがで
き、反応が促進される。
Further, as shown in FIG. 2, an ultrasonic wave generator (22) is provided in the heating tank (10), and the etching tank (7) is vibrated during the etching process by the ultrasonic wave generator (22). Some have been done. In this case, since the semiconductor wafer (1) is vibrated, the bubbles generated by the reaction can be quickly separated from the surface of the semiconductor wafer (1), and the reaction is accelerated.

【0015】[0015]

【発明の効果】この発明によれば、エッチング槽内のエ
ッチング用アルカリ溶液が上下で温度差を生じておって
も、半導体ウェーハを横向きにしてエッチング槽内のア
ルカリ溶液に沈めてエッチングを行うので、半導体ウェ
ーハの面内は全体が同じ温度で反応することになる。そ
のため、半導体ウェーハ全体が均等にエッチングされ、
しかも気泡の発生量も全体で均一になり、反応にバラツ
キを生じず、エッチング後の素子領域のサイドエッチの
バラツキがなくなる。
According to the present invention, even if the etching alkaline solution in the etching tank has a temperature difference between the upper and lower sides, the semiconductor wafer is laid sideways and immersed in the alkaline solution in the etching tank for etching. The entire surface of the semiconductor wafer will react at the same temperature. Therefore, the entire semiconductor wafer is uniformly etched,
Moreover, the amount of bubbles generated is uniform over the entire surface, the reaction does not fluctuate, and the side-etch fluctuation in the element region after etching is eliminated.

【0016】また、超音波発生器にてエッチング槽を振
動させれば、半導体ウェーハの表面で発生する気泡のき
れがよくなるので、反応が促進され、より安定したエッ
チングを行える。
Further, if the etching bath is vibrated by the ultrasonic generator, the breakage of bubbles generated on the surface of the semiconductor wafer is improved, so that the reaction is promoted and more stable etching can be performed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る半導体製造装置の一実施例を示す
概略断面図
FIG. 1 is a schematic sectional view showing an embodiment of a semiconductor manufacturing apparatus according to the present invention.

【図2】本発明に係る半導体製造装置の他の実施例を示
す概略断面図
FIG. 2 is a schematic sectional view showing another embodiment of the semiconductor manufacturing apparatus according to the present invention.

【図3】誘電体分離により素子領域を形成する工程を示
す図面で、a〜cは各工程での半導体ウェーハの断面図
FIG. 3 is a view showing a process of forming an element region by dielectric isolation, and a to c are cross-sectional views of a semiconductor wafer in each process.

【図4】従来の半導体製造装置を示す概略断面図FIG. 4 is a schematic sectional view showing a conventional semiconductor manufacturing apparatus.

【図5】エッチング時のマスクの形状を示す平面図FIG. 5 is a plan view showing the shape of a mask during etching.

【図6】不良品を示す半導体ウェーハの平面図FIG. 6 is a plan view of a semiconductor wafer showing a defective product.

【図7】エッチングに用いるマスクの形状を示す平面図FIG. 7 is a plan view showing the shape of a mask used for etching.

【符号の説明】[Explanation of symbols]

1 半導体ウェーハ 7 エッチング槽 10 加熱槽 11 アルカリ溶液 12 加熱流体 13 ヒータ 20 チャック手段 22 超音波発生器 1 Semiconductor Wafer 7 Etching Tank 10 Heating Tank 11 Alkaline Solution 12 Heating Fluid 13 Heater 20 Chuck Means 22 Ultrasonic Generator

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】エッチング溶液を入れるエッチング槽と、
前記エッチング槽の底部及び側部を覆う加熱槽と、前記
加熱槽内に入れられた加熱流体を加熱するヒータと、前
記エッチング槽内に出入り可能に設けられ、上面に半導
体ウェーハを横向きに載せて保持する複数のチャック手
段とで構成したことを特徴とする半導体製造装置。
1. An etching bath containing an etching solution,
A heating tank that covers the bottom and sides of the etching tank, a heater that heats the heating fluid contained in the heating tank, and a heater that can be moved in and out of the etching tank. A semiconductor manufacturing apparatus comprising a plurality of chucking means for holding.
【請求項2】エッチング溶液を入れるエッチング槽と、
前記エッチング槽の底部及び側部を覆う加熱槽と、前記
加熱槽内に入れられた加熱流体を加熱するヒータと、前
記エッチング槽内に出入り可能に設けられ、上面に半導
体ウェーハを横向きに載せて保持する複数のチャック手
段と、前記エッチング槽を振動させる超音波発生器とで
構成したことを特徴とする半導体製造装置。
2. An etching bath containing an etching solution,
A heating tank that covers the bottom and sides of the etching tank, a heater that heats the heating fluid contained in the heating tank, and a heater that can be moved in and out of the etching tank. A semiconductor manufacturing apparatus comprising: a plurality of chucking means for holding the ultrasonic wave; and an ultrasonic wave generator for vibrating the etching bath.
JP874493A 1993-01-22 1993-01-22 Semiconductor manufacturing apparatus Withdrawn JPH06224177A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP874493A JPH06224177A (en) 1993-01-22 1993-01-22 Semiconductor manufacturing apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP874493A JPH06224177A (en) 1993-01-22 1993-01-22 Semiconductor manufacturing apparatus

Publications (1)

Publication Number Publication Date
JPH06224177A true JPH06224177A (en) 1994-08-12

Family

ID=11701449

Family Applications (1)

Application Number Title Priority Date Filing Date
JP874493A Withdrawn JPH06224177A (en) 1993-01-22 1993-01-22 Semiconductor manufacturing apparatus

Country Status (1)

Country Link
JP (1) JPH06224177A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007500431A (en) * 2003-07-24 2007-01-11 ケムトレース プレシジョン クリーニング, インコーポレイテッド Ultrasonic assisted etching using corrosive liquid

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007500431A (en) * 2003-07-24 2007-01-11 ケムトレース プレシジョン クリーニング, インコーポレイテッド Ultrasonic assisted etching using corrosive liquid

Similar Documents

Publication Publication Date Title
JP5705990B2 (en) Method for manufacturing a memory element having a three-dimensional structure
EP0223694B1 (en) Submerged wall isolation of silicon islands
JPH0799241A (en) Method for forming insulating trench in substrate for smart power chip
JPH08316215A (en) Gas heat transfer plasma treating device
US4096619A (en) Semiconductor scribing method
US4554059A (en) Electrochemical dielectric isolation technique
US6642128B1 (en) Method for high temperature oxidations to prevent oxide edge peeling
US4802842A (en) Apparatus for manufacturing semiconductor device
JPH06224177A (en) Semiconductor manufacturing apparatus
US3902936A (en) Germanium bonded silicon substrate and method of manufacture
JP2000068172A (en) Apparatus and method of separating sample
JP5352777B2 (en) Quartz device manufacturing method
CN114420621A (en) Bonding method and semiconductor structure
JPWO2005024916A1 (en) Manufacturing method of SOI wafer
JP3472171B2 (en) Semiconductor substrate etching method and etching apparatus, and semiconductor substrate manufacturing method using the same
US20040124494A1 (en) Process for forming trenches with oblique profile and rounded top corners
JP3814431B2 (en) Manufacturing method of semiconductor device
KR100223276B1 (en) Process for fabricating semicondcutor device
JP2586422B2 (en) Method of manufacturing dielectric integrated composite integrated circuit device
JPH0555358A (en) Manufacture of semiconductor device
JP4651172B2 (en) Manufacturing method of semiconductor device
JPS6094738A (en) Semiconductor substrate
JP3177349B2 (en) Method of lifting wafer from pure water tank and drying apparatus using the same
JPH1197654A (en) Manufacture of semiconductor board
JP2002270529A (en) Substrate treating apparatus

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000404