JPH06216999A - Memory fault retrieval method in electronic exchange - Google Patents

Abstract

PURPOSE:To specify one package relating to a fault address in a very short time by retrieving a package to which a fault memory address of a main memory belongs by a 1st table on the occurrence of a memory error and retrieving mount information relating to the retrieved package with a 2nd table. CONSTITUTION:An upper column of a table is a 1st table 21 and a lower column is a 2nd table 22. When either CPU 12 diagnoses either main memory 11, suppose that a memory error is detected. An alarm is raised through the detection and a fault memory address AD is accessed by a specific block of the table 21 and the table 22 is retrieved. Mount location information of a package including a fault memory address is extracted in the table 22. As a result, the fault location is specified in a very short time and the fault recovery time is considerably reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory fault searching method for an electronic exchange. Generally, in order to improve the reliability of the information communication network, a dual configuration of a master system and a slave system is adopted. Therefore, the electronic exchange, which is one of the important components in the information communication network, also has a dual structure, and the main memory therein is also composed of a master main memory and a slave main memory. To be done. The same contents are always held in both main memories, and when a failure occurs in the main memory in use, the main memory is immediately switched to the spare main memory to maintain communication.

In this case, if the main memory of the spare system that has been switched is not normal, the failure cannot be remedied, so that the diagnostic operation for both main memories is always performed. When a memory failure is detected during this diagnosis, it is necessary to quickly identify that part and replace the corresponding hardware.

[0003]

2. Description of the Related Art FIG. 4 is a diagram showing a general structure of a duplicated electronic exchange. In the figure, reference numeral 10 is an electronic exchange, which is duplicated in a master system and a slave system, and a duplicated central control unit (CC) 12;
A duplexed speech path system (SP) 13 controlled by the central controller 12, and a duplicated main memory (MM) connected under the central controller 12 to control the speech path system 13. ) 11 and at least. The central controller 12 also executes the above-mentioned diagnosis for the main memory 11.

In the figure, the other components are a typewriter TYP, which is also used for the channel controller CHC, the file memory FM, the magnetic tape MT, the console, and the like. FIG. 5 is a flowchart showing a conventional memory search method. In this figure, first in step S1,
Suppose a memory error is detected. When a memory error is detected, the failure occurrence address is known, but it is not immediately known where the failure location actually hits the hardware. Therefore, work such as replacement with a new product cannot be started immediately.

Therefore, in step S2, a full-face read / write test is executed. In this full-face read / write test, predetermined known data is first written into each of all the memory packages constituting the main memory, and then the read operation is performed. If the data read here matches the known data, it is recognized that there is no abnormality. If they do not match, it can be estimated that the memory package under test has a failure.

Thus, in step S3, the faulty memory package is specified, and the relevant package can be cut out from all the memory packages.

[0007]

As mentioned above, the elimination of memory faults must be done quickly. However, there is a problem that particularly step S2 in the above-mentioned flowchart takes a very long time because it accesses all the addresses of the whole main memory. Therefore, in view of the above problems, it is an object of the present invention to provide a memory failure search method in an electronic exchange that can quickly isolate a memory failure location.

[0008]

FIG. 1 is a flowchart showing a memory fault search according to the present invention. As shown in this figure, the present invention comprises the following steps. Electronic exchange 10
A first table (for example, a first table 21 formed in the main memory 11 of FIG. 4) formed in a memory area (FIG. 4) (the main memory 11 may be diverted or may be newly provided) In advance, the correspondence relationship between the memory address obtained by dividing the memory address on the main memory 11 into a plurality of packages for each package and each package to which each of these divided memory addresses belongs is written in advance, and is written in the memory area. In the formed second table (for example, the second table 22 formed in the main memory 11 of FIG. 4),
The correspondence relationship between each package and each mounting position where each package is arranged in the above-mentioned rack is written in advance. Step S1: When an error is detected in the main memory 11, the faulty memory address Is used as an index to identify the corresponding package from the first table 21.

Step S2: Further, the mounting position of the package is calculated from the second table 22 by using the specified package as an index. Step S3: Output the faulty package information in order to inform the maintenance person of the faulty package. The output destination may be the typewriter TYP of FIG. 4 or the display of a personal computer.

[0010]

In the present invention, the entire surface lead /
Instead of the light test, a table search operation is adopted. That is, when a memory error occurs, the package to which the faulty memory address on the main memory belongs is searched first in the first table, and then the mounting information regarding the searched package is searched in the second table. Thus, in the two-step search, one package corresponding to the faulty memory address can be identified within a very short time.

[0011]

FIG. 2 is a diagram showing a specific example of a table structure according to the present invention. In this figure, the upper column is the first table 2
1 and the lower column is the second table. It is assumed that a memory error is detected when either one of the main memories 11 is diagnosed by the one central controller 12. This detection causes an alarm together with the faulty memory address. This faulty memory address is shown as AD in FIG. On the other hand, in the first table 21, the addresses of the second table are registered for each package, and two main memories 11 are temporarily stored.
However, if it is assembled from four 1M packages, the first table 21 is composed of the four blocks shown. Note that (h) indicates that the address of the main memory is displayed in hexadecimal.

If the faulty memory address AD is "12",
If it is "3400", the second block of the first table 21 is accessed using this "123400" as an index. Therefore, using the address of the second table 22 shown here (indicating the package including the faulty memory address) as an index, the second table 22
To access (search). In this case, the central control unit 12 has already recognized whether the main memory 11 having the fault now is the 0-system or the 1-system, and therefore further accesses one of these. This figure shows an example of accessing the 1st system.

The second table 22 describes the mounting position of each package in the rack in detail, and the mounting position information of the package including the faulty memory address can be retrieved here. According to the diagram, the device type, shelf type, frame number, frame type, slot number, and stage number are clarified as the mounting position information. In addition, "I" in the figure is a flag of logic "1" and "0" indicating whether the package is not mounted or mounted. The above mounting position information will be further described with reference to the drawings.

FIG. 3 is a perspective view showing a concrete example of the structure of the rack. In the figure, reference numeral 30 indicates the entire rack, and in the figure, three frames (100.101.102) 31
Each frame 31 includes four shelves 32, and each shelf 32 includes a package 33 inserted into a large number of slots. Assuming that the faulty memory is included in the package 33 marked with a circle in the figure, the frame number is 100, the stage number is 2, and the slot number is 5. Other device types, shelf types, and frame types are useful information for maintenance personnel, and if the device type is 3, this means that the package has an IC having only main memory. If the shelf type is, for example, 55, this means that the ICs around the I / O are mainly mounted, and if the frame type is 10, for example, this means that the ICs around the central control unit are mounted. It means doing.

[0015]

As described above, according to the present invention, the location of a fault can be specified in an extremely short time as compared with the prior art, and the fault recovery time is greatly shortened, so that the reliability of communication is further improved. .

[Brief description of drawings]

FIG. 1 is a flowchart showing a memory fault search according to the present invention.

FIG. 2 is a diagram showing a specific example of a table configuration based on the present invention.

FIG. 3 is a perspective view showing a specific configuration example of a rack.

FIG. 4 is a diagram showing a general configuration of a duplicated electronic exchange.

FIG. 5 is a flowchart showing a conventional memory search method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Electronic exchange 11 ... Main memory 12 ... Central control device 13 ... Communication path system 21 ... First table 22 ... Second table 30 ... Rack 31 ... Frame 32 ... Shelf 33 ... Package

Claims (1)

[Claims] 1. A central control unit (12) which is duplicated,
A dual channel system (13) controlled by the central controller, and a dual main memory (11) connected under the central controller to control the channel system. And an electronic exchange in which the central control unit, the communication path system and the main memory are respectively assembled in a package (33) unit and mounted on a rack (30), when an error occurs in one of the main memories. A memory failure search method for specifying the failure location, wherein a memory address on the main memory is divided into a plurality of pieces for each package in a first table (21) formed in a memory area in the electronic exchange. The corresponding relationship between each memory package and each package to which each of the divided memory addresses belongs, A second table formed (22),
The correspondence between each package and each mounting position where each package is arranged in the rack is written in advance, and when an error is detected in the main memory, the faulty memory address is used as an index. A method for searching for a memory failure in an electronic exchange, characterized in that the corresponding package is specified from the first table, and the mounting position of the package is calculated from the second table using the specified package as an index.