JPH06216064A - Al contact structure and manufacture thereof - Google Patents

Al contact structure and manufacture thereof

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Publication number
JPH06216064A
JPH06216064A JP2164493A JP2164493A JPH06216064A JP H06216064 A JPH06216064 A JP H06216064A JP 2164493 A JP2164493 A JP 2164493A JP 2164493 A JP2164493 A JP 2164493A JP H06216064 A JPH06216064 A JP H06216064A
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JP
Japan
Prior art keywords
interface
contact
substrate
contact structure
annealing
Prior art date
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Granted
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JP2164493A
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Japanese (ja)
Other versions
JP2727902B2 (en
Inventor
Yoshinao Miura
喜直 三浦
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NEC Corp
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NEC Corp
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Publication of JPH06216064A publication Critical patent/JPH06216064A/en
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Abstract

PURPOSE:To provide an Al contact structure which is excellent in reliability and low in resistivity without barrier metal and can be easily manufactured for an Si device. CONSTITUTION:In a contact structure wherein Al is brought into direct contact with an Si substrate, an interface fluctuation is limited to four atomic layers per 10nm in a direction parallel with the interface. Or, an Al crystal is made to grow so as to make an orientation relation between an Si substrate and an Al contact satisfy a formula, Al<220>//Si<220>, in a plane parallel to an interface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、Si基板を用いたデバ
イスのAlコンタクト構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an Al contact structure of a device using a Si substrate.

【0002】[0002]

【従来の技術および発明が解決しようとする課題】近年
のデバイスの集積化に伴い、素子間をつなぐ配線技術の
重要性がますます増大している。特に配線のコンタクト
では、信頼性を維持しながら抵抗を低減することが緊急
の課題である。また配線に用いる材料が増え、構造の複
雑化やプロセス工程の増加が起こっているが、材料本来
の性質を生かして単純な製造工程を実現することも大き
な課題である。Alを配線材料とするSiデバイスのオ
ーミックコンタクトでは、AlとSiの間にTiやWな
どの高融点金属やその化合物を挟んだバリアメタル構造
が用いられている。この構造では、コンタクトの熱的安
定性は得られるものの、材料の抵抗が高い、あるいは製
造工程が複雑でコストがかかるという問題点があった。
本発明の目的は、配線構造の高信頼性、単純性、高性能
を同時に備えたAlコンタクト構造を実現することにあ
る。
2. Description of the Related Art With the recent integration of devices, wiring technology for connecting elements has become more important. Particularly for wiring contacts, reducing resistance while maintaining reliability is an urgent issue. Further, the amount of material used for wiring has increased, and the structure has become complicated and the number of process steps has increased. However, it is also a big problem to realize a simple manufacturing process by utilizing the original property of the material. In the ohmic contact of a Si device using Al as a wiring material, a barrier metal structure in which a refractory metal such as Ti or W or a compound thereof is sandwiched between Al and Si is used. In this structure, although the thermal stability of the contact can be obtained, there is a problem that the resistance of the material is high or the manufacturing process is complicated and costly.
An object of the present invention is to realize an Al contact structure that simultaneously has high reliability, simplicity, and high performance of a wiring structure.

【0003】[0003]

【課題を解決するための手段】本発明の第1は、Si基
板に直接Alを接触させた構造を持つAlコンタクト構
造において、Si/Al界面のゆらぎが、界面に平行な
方向に10nmあたり4原子層未満であるような平坦な
界面を持つことを特徴とするAlコンタクト構造であ
る。
According to a first aspect of the present invention, in an Al contact structure having a structure in which Al is directly contacted with a Si substrate, the fluctuation of the Si / Al interface is 4 per 10 nm in the direction parallel to the interface. It is an Al contact structure characterized by having a flat interface that is less than an atomic layer.

【0004】また、本発明の第2は、Si基板に直接A
lを接触させた構造を持つAlコンタクト構造におい
て、Si基板とAlの方位関係が、界面に平行な面内で
Al<220>//Si<220>であることを特徴とするAl
コンタクト構造である。上記のようなAlとSiの関係
は、例えば、Si(100)基板に対してAl(110)//S
i(100)かつAl<220>//Si<220>を満たす関
係、Si(111)基板に対してAl(111)//Si(11
1)かつAl<220>//Si<220>またはAl(100)//
Si(111)かつAl<220>//Si<220>を満たす関
係などによって実現される。
The second aspect of the present invention is to directly apply A to the Si substrate.
In an Al contact structure having a structure in which 1 is in contact with Al, the azimuth relationship between the Si substrate and Al is Al <220> // Si <220> in a plane parallel to the interface.
It is a contact structure. The relationship between Al and Si as described above is, for example, Al (110) // S for a Si (100) substrate.
i (100) and Al <220> // Si <220> are satisfied. For an Si (111) substrate, Al (111) // Si (11
1) and Al <220> // Si <220> or Al (100) //
It is realized by a relationship such that Si (111) and Al <220> // Si <220> are satisfied.

【0005】また、これらのAlコンタクト構造の製造
方法は、Si基板の表面をpH値が4〜8のフッ酸系水
溶液に浸して該Si表面の平坦性を10nmあたり4原
子層未満とし、次いでこのSi平坦面にAlを堆積させ
ることを特徴とする。ここでAlコンタクトとはAlを
主成分とするコンタクトのことであって、Si、Cu、
Pdなどの材料を含んでもかまわない。
Further, in these Al contact structure manufacturing methods, the surface of the Si substrate is immersed in a hydrofluoric acid-based aqueous solution having a pH value of 4 to 8 so that the flatness of the Si surface is less than 4 atomic layers per 10 nm, and then It is characterized in that Al is deposited on this Si flat surface. Here, the Al contact is a contact containing Al as a main component, and includes Si, Cu,
A material such as Pd may be included.

【0006】[0006]

【作用】 請求項1の作用 従来用いられていたスパッタ法などで堆積したAlコン
タクトでは、400℃以上の熱処理によって、SiがA
l中に大量に拡散するために、基板側にAlスパイクが
できて短絡の原因になったり、コンタクト界面に再析出
Si層ができてコンタクト抵抗が高くなるという問題が
あった。ところが本発明者は、pHをコントロールした
フッ酸溶液処理によって表面を原子レベルで平坦化した
Si基板上に、表面へのダメージの小さい真空蒸着法を
用いてAlコンタクトを形成したところ、450℃,1
時間の熱処理に対しても、スパイクが観測されず電気特
性にも全く劣化が起こらないことを見い出した。
In the Al contact deposited by the sputtering method or the like which has been conventionally used, Si is converted into A by the heat treatment at 400 ° C. or higher.
Since a large amount of Al diffuses in 1 l, there is a problem that an Al spike is formed on the substrate side to cause a short circuit, and a re-precipitated Si layer is formed on the contact interface to increase the contact resistance. However, the present inventor has formed an Al contact on a Si substrate whose surface is flattened at an atomic level by a hydrofluoric acid solution treatment with controlled pH, using an vacuum deposition method that causes less damage to the surface. 1
It was found that no spikes were observed even after heat treatment for a long time and no deterioration in electrical characteristics occurred.

【0007】そこで本発明者は、界面の熱的安定性は、
Al/Si界面の平坦性に密接な関係があり、ある程度
以上平坦な界面を実現することにより、バリアメタルな
しでも十分な信頼性のあるコンタクトが実現できるとの
仮説をたてた。
Therefore, the present inventors have found that the thermal stability of the interface is
It was hypothesized that the Al / Si interface has a close relationship with the flatness, and that a contact with sufficient reliability can be realized without a barrier metal by realizing a flatness above a certain level.

【0008】この仮説を検証するために、界面ゆらぎを
コントロールしたAl/Si界面を用意し、ゆらぎの程
度と熱的安定性との相関を調べる実験を行った。まずp
Hをコントロールしたフッ酸溶液で表面を平坦化したS
i(100)基板を用意し、超高真空中でArイオンビー
ムの照射量によってダメージの程度を変えた基板および
ダメージを与えない基板上に、それぞれ基板温度を室温
に保ったまま、Alを蒸着した。このようにして作製し
た多結晶Alコンタクトの界面を高分解能断面電子顕微
鏡で観察し、ダメージの度合いによって、界面ゆらぎの
大きさが変わることを確認した。このコンタクトの熱的
安定性を調べた結果、界面ゆらぎが4原子層未満のサン
プルでは、450℃,1時間までの窒素雰囲気中アニー
ルに対しアロイピットは観測されず、I−V法やC−V
法で評価した電気特性も理想的振る舞いを示したのに対
し、それ以外のサンプルでは、400℃,1時間のアニ
ールですでに表面モホロジーの劣化と電気特性の劣化が
認められた。これらの事実から、Al/Si界面の熱的
安定性が界面平坦性に密接な関係があるという前記仮説
が証明され、界面ゆらぎは界面に平行な方向に10nm
あたり4原子層未満であることが望ましいことが判明し
た。
In order to verify this hypothesis, an Al / Si interface whose interface fluctuation was controlled was prepared, and an experiment was conducted to examine the correlation between the degree of fluctuation and thermal stability. First p
S whose surface is flattened with a hydrofluoric acid solution in which H is controlled
i (100) substrate was prepared, and Al was vapor-deposited on the substrate whose damage degree was changed by the irradiation amount of Ar ion beam in the ultra-high vacuum and the substrate which was not damaged, while keeping the substrate temperature at room temperature. did. The interface of the polycrystalline Al contact thus manufactured was observed with a high-resolution cross-sectional electron microscope, and it was confirmed that the size of the interface fluctuation varied depending on the degree of damage. As a result of investigating the thermal stability of this contact, alloy pits were not observed in the sample with interface fluctuation of less than 4 atomic layers in annealing in a nitrogen atmosphere at 450 ° C. for up to 1 hour.
The electrical characteristics evaluated by the method also showed ideal behavior, whereas in the other samples, deterioration of the surface morphology and deterioration of the electrical characteristics were already observed after annealing at 400 ° C. for 1 hour. From these facts, the above hypothesis that the thermal stability of the Al / Si interface is closely related to the interface flatness is proved, and the interface fluctuation is 10 nm in the direction parallel to the interface.
It has been found that a thickness of less than 4 atomic layers is desirable.

【0009】請求項2の作用 スパッタ法などで形成されたAlコンタクトでは、nタ
イプ基板に対してオーミックコンタクトをとるために、
400℃程度のアニールを必要とする。これは、400
℃程度のアニールによって、コンタクトのショットキー
障壁高さが、0.1eV近くも減少することが原因とな
っている。一方、Si(111)基板上に形成したAl(1
11)エピタキシャル単結晶コンタクトでは、アニールを
行わなくても0.7eVの低いショットキー障壁高さを
示し、しかもアニールによってその値が変化しないこと
が報告されている[アイトリプルイー・トランスアクシ
ョン・オン・エレクトロン・デバイス(IEEE Transactio
n on Electron Devices)1987年、34巻、1018頁]。こ
の単結晶Alをオーミックコンタクトに用いれば、アニ
ールなしに良好な電気特性が得られるはずである。しか
し、単結晶のAlは作製が難しいという問題がある。
In the Al contact formed by the sputtering method or the like, in order to make an ohmic contact with the n-type substrate,
Annealing at about 400 ° C. is required. This is 400
The cause is that the Schottky barrier height of the contact is reduced by about 0.1 eV by annealing at about ° C. On the other hand, Al (1
11) It has been reported that the epitaxial single crystal contact shows a low Schottky barrier height of 0.7 eV without annealing, and that the value does not change due to annealing [I Triple E Transaction On・ Electron device (IEEE Transactio
n on Electron Devices), 1987, 34, 1018]. If this single crystal Al is used for ohmic contact, good electrical characteristics should be obtained without annealing. However, there is a problem that it is difficult to produce single crystal Al.

【0010】そこで本発明者は、この障壁高さの減少が
Al/Si界面構造の安定化に起因していると考え、た
とえAlが多結晶であっても構造的に安定な特定のエピ
タキシャル関係をもつコンタクトであれば、アニールな
しで、0.7eVの低いショットキー障壁高さを示し、
しかもアニールに対してこの値は変化しないという仮説
をたてた。
Therefore, the present inventor considers that the decrease in the barrier height is due to the stabilization of the Al / Si interface structure, and even if Al is polycrystalline, it has a structurally stable specific epitaxial relationship. A contact having a low Schottky barrier height of 0.7 eV without annealing,
Moreover, we hypothesized that this value does not change with annealing.

【0011】この仮説を検証するために、Si(100)
およびSi(111)表面上に超高真空中での蒸着法で形
成したAl膜で上記エピタキシャル関係を持つ多結晶コ
ンタクト構造の探索を行った。その結果、基板の表面状
態に応じて、上記エピタキシャル関係を持つAl膜と持
たないAl膜が得られることが、平面電子顕微鏡観察に
よりわかった。Si(100)基板では、2×1の表面超
構造上にAl(110)//Si(100)かつAl<220>//
Si<220>と等価なエピタキシャル関係を持つグレイ
ンからなる多結晶(bicrystal)が得られるのに対し、
水素終端表面上には(110)配向ではあるが基板に対し
て垂直な軸を中心にランダムに回転したグレインからな
る多結晶が得られた。Si(111)基板では、7×7の
表面超構造上にAl(111)//Si(111)かつAl<22
0>//Si<220>のエピタキシャル関係を持つ単結晶
が、水素終端表面上には、Al(111)//Si(111)か
つAl<220>//Si<220>、あるいはAl(100)//
Si(111)かつAl<220>//Si<220>と等価なエ
ピタキシャル関係を持つグレインからなる多結晶(bicr
ystal)が得られた。それに対し、表面再構成の不完全
な清浄表面上では、(111)配向ではあるが基板に対し
て垂直な軸を中心にランダムに回転したグレインからな
る多結晶が得られた。これら5種類の結晶方位関係を持
つAlコンタクトに対し、450℃,1時間までの窒素
雰囲気中アニールによるショットキー障壁高さの変化を
調べたところ、界面に平行な面内でAl<220>//Si
<220>のエピタキシャル関係を持つ全てのサンプル
で、アニール温度と無関係に約0.7eVの障壁高さを
示したのに対し、前記エピタキシャル関係を持たない全
てのサンプルで、アニール温度の上昇と共に障壁高さ
が、約0.8eVから約0.7eVに減少した。以上の
結果から、エピタキシャル関係が界面に平行な面内で、
Al<220>//Si<220>である場合に、前記仮説が正
しいことが検証された。
In order to verify this hypothesis, Si (100)
We have searched for a polycrystalline contact structure having the above-mentioned epitaxial relationship with an Al film formed on a Si (111) surface by an evaporation method in an ultrahigh vacuum. As a result, it was found by a plane electron microscope observation that an Al film having the above-mentioned epitaxial relationship and an Al film having no such epitaxial relationship can be obtained depending on the surface condition of the substrate. For Si (100) substrate, Al (110) // Si (100) and Al <220> // on a 2 × 1 surface superstructure
While a polycrystal composed of grains having an epitaxial relationship equivalent to Si <220> can be obtained,
On the hydrogen-terminated surface, polycrystals consisting of (110) -oriented grains, which were randomly rotated around an axis perpendicular to the substrate, were obtained. In Si (111) substrate, Al (111) // Si (111) and Al <22 on 7 × 7 surface superstructure
A single crystal having an epitaxial relationship of 0> // Si <220> has Al (111) // Si (111) and Al <220> // Si <220> or Al (100 ) //
Polycrystal composed of grains of Si (111) and grains having an epitaxial relationship equivalent to Al <220> // Si <220> (bicr
ystal) was obtained. On the other hand, on a clean surface with incomplete surface reconstruction, polycrystals of (111) -oriented grains, which were randomly rotated about an axis perpendicular to the substrate, were obtained. We investigated the change of the Schottky barrier height by annealing in a nitrogen atmosphere for up to 1 hour at 450 ° C for Al contacts having these five crystal orientation relationships, and found that Al <220> / in the plane parallel to the interface. / Si
All the samples having the <220> epitaxial relationship showed a barrier height of about 0.7 eV regardless of the annealing temperature, whereas all the samples having no epitaxial relationship showed the barrier height as the annealing temperature increased. The height was reduced from about 0.8 eV to about 0.7 eV. From the above results, in the plane where the epitaxial relationship is parallel to the interface,
The above hypothesis was verified to be correct when Al <220> // Si <220>.

【0012】[0012]

【実施例】次に、本発明の実施例について説明する。 実施例1 p−タイプSi(100)基板(抵抗率10〜20Ωc
m,4インチφ)を用い、以下の要領でコンタクト抵抗
測定用のケルビン法テストパターンを作製し、Al/S
i微細オーミックコンタクトの評価を行った。まず厚さ
0.5μmのフィールド酸化膜を形成し、通常のフォト
リソグラフィーで活性化領域の酸化膜を除去し、防護用
熱酸化膜20nmを成長した後、Asイオンの打ち込み
を行った。打ち込み条件は、ドーズ量5×1015
-2、エネルギー80keVである。窒素中で1000
℃,45分間のアニールで活性化し、さらに低圧CVD
法で0.5μmのSiO2層を形成した。2回目のフォ
トリソグラフィーでコンタクト部分の酸化膜を完全に除
去し、続いてSi表面を水素終端化すると同時に原子オ
ーダーで平坦化するために、バッファードフッ酸(pH
〜4)に1分間浸す。超純水でリンスした後、即座にバ
ックプレッシャー10-10TorrのMBE真空槽に導
入し、コンタクト部に2×1の超構造を形成するために
RTA法で700℃,10分間のアニールを行った。基
板温度を100℃まで冷した後、エフュージョンセルお
よびスパッタをソースに用いて、Al膜を形成した。は
じめの20nmはエフュージョンセルを用いて0.05
nm/secのレートで蒸着を行い、続いてスパッタで
0.8μmのAl層を堆積した。3回目のフォトリソグ
ラフィーでメタルパターンを形成した。
EXAMPLES Next, examples of the present invention will be described. Example 1 p-type Si (100) substrate (resistivity 10 to 20 Ωc
m, 4 inch φ), a Kelvin method test pattern for contact resistance measurement was prepared in the following manner, and Al / S
i The fine ohmic contact was evaluated. First, a field oxide film having a thickness of 0.5 μm was formed, the oxide film in the activated region was removed by ordinary photolithography, and a thermal oxide film for protection of 20 nm was grown, after which As ions were implanted. The implantation condition is a dose amount of 5 × 10 15 c
m −2 , energy is 80 keV. 1000 in nitrogen
Activated by annealing at ℃ for 45 minutes, and further low pressure CVD
Method was used to form a 0.5 μm SiO 2 layer. In order to completely remove the oxide film at the contact part by the second photolithography and subsequently to terminate the Si surface with hydrogen and at the same time planarize it in atomic order, buffered hydrofluoric acid (pH
Soak in ~ 4) for 1 minute. Immediately after rinsing with ultrapure water, the wafer was introduced into an MBE vacuum chamber with a back pressure of 10 -10 Torr and annealed at 700 ° C. for 10 minutes by the RTA method to form a 2 × 1 superstructure at the contact portion. It was After cooling the substrate temperature to 100 ° C., an Al film was formed using an effusion cell and sputtering as a source. The first 20 nm is 0.05 using an effusion cell.
Vapor deposition was performed at a rate of nm / sec, and subsequently a 0.8 μm Al layer was deposited by sputtering. A metal pattern was formed by the third photolithography.

【0013】上記テストパターンのAl/Si界面を高
分解能断面TEM法を用いて観察したところ、界面は原
子層オーダーで急峻であり、平均の界面ゆらぎは10n
mあたり1原子層のステップが2個以下と極めて小さか
った。またAlとSiの方位関係は、Al(110)//S
i(100)かつAl<220>//Si<220>であり、これ
を満たす等価な2種類のグレインから成っていることが
明らかになった。電気特性の評価は、コンタクトサイズ
1×1μmのものに対して、I−V法を用いて行った。
100個のコンタクトの平均比抵抗値は、1×10-7Ω
cm2以下であり、アニールを行わなくても極めて低い
値が得られた。また同じサンプルに対し、水素雰囲気中
で、450℃,60分間のアニールを行った後、同様の
電気特性評価を行ったところ、平均比抵抗値はほとんど
劣化しなかった。以上の結果から、請求項1、2の特徴
を持つAl/Siオーミックコンタクトでは、アニール
なしでも低いコンタクト抵抗が得られ、しかも高温アニ
ールに対しても特性が安定であることが証明された。
When the Al / Si interface of the above test pattern was observed using a high-resolution cross-sectional TEM method, the interface was steep on the atomic layer order, and the average interface fluctuation was 10 n.
The number of steps per atomic layer per m was extremely small, which was 2 or less. The orientation relationship between Al and Si is Al (110) // S
It was i (100) and Al <220> // Si <220>, and it was revealed that the grains consisted of two kinds of equivalent grains satisfying this. The electrical characteristics were evaluated by the IV method for the contact size of 1 × 1 μm.
Average specific resistance value of 100 contacts is 1 × 10 -7 Ω
cm 2 or less, and an extremely low value was obtained without annealing. Further, when the same sample was annealed at 450 ° C. for 60 minutes in a hydrogen atmosphere and then the same electrical characteristics were evaluated, the average specific resistance value was hardly deteriorated. From the above results, it was proved that the Al / Si ohmic contact having the features of claims 1 and 2 has a low contact resistance even without annealing and has stable characteristics even at high temperature annealing.

【0014】実施例2 p−タイプSi(111)基板(抵抗率10〜20Ωc
m,4インチφ)を用い、以下の要領でコンタクト抵抗
測定用のケルビン法テストパターンを作製し、Al/S
i微細オーミックコンタクトの評価を行った。まず厚さ
0.5μmのフィールド酸化膜を形成し、通常のフォト
リソグラフィーで活性化領域の酸化膜を除去し、防護用
熱酸化膜20nmを成長した後、Asイオンの打ち込み
を行った。打ち込み条件は、ドーズ量5×1015
-2、エネルギー80keVである。窒素中で1000
℃,45分間のアニールで活性化し、さらに低温CVD
法で0.5μmのSiO2層を形成した。2回目のフォ
トリソグラフィーでコンタクト部分の酸化膜を完全に除
去し、続いてSi表面を水素終端化すると同時に原子オ
ーダーで平坦化するために、フッ酸系水溶液(フッ化ア
ンモン水溶液,pH〜8)に1分間浸す。超純水でリン
スした後、即座にバックプレッシャー10-7Torrの
真空槽に導入し、表面終端水素以外の不純物ガスを脱離
させるため、RTA法で400℃,10分間のアニール
を行った。基板温度を100℃まで冷した後、エフュー
ジョンセルおよびスパッタをソースとして、コリメート
法を用いてAl膜を形成した。はじめの20nmはエフ
ュージョンセルを用いて0.05nm/secのレート
で蒸着を行い、続いてスパッタで0.8μmのAl層を
堆積した。3回目のフォトリソグラフィーでメタルパタ
ーンを形成した。
Example 2 p-type Si (111) substrate (resistivity 10 to 20 Ωc
m, 4 inch φ), a Kelvin method test pattern for contact resistance measurement was prepared in the following manner, and Al / S
i The fine ohmic contact was evaluated. First, a field oxide film having a thickness of 0.5 μm was formed, the oxide film in the activated region was removed by ordinary photolithography, and a thermal oxide film for protection of 20 nm was grown, after which As ions were implanted. The implantation condition is a dose amount of 5 × 10 15 c
m −2 , energy is 80 keV. 1000 in nitrogen
Activated by annealing at 45 ℃ for 45 minutes, and further low temperature CVD
Method was used to form a 0.5 μm SiO 2 layer. In order to completely remove the oxide film at the contact portion by the second photolithography and subsequently to terminate the Si surface with hydrogen and at the same time planarize it on the atomic order, an aqueous solution of hydrofluoric acid (ammonium fluoride aqueous solution, pH ~ 8) Soak for 1 minute. After rinsing with ultrapure water, it was immediately introduced into a vacuum chamber with a back pressure of 10 −7 Torr, and annealing was carried out at 400 ° C. for 10 minutes by the RTA method in order to desorb impurity gases other than surface-terminated hydrogen. After cooling the substrate temperature to 100 ° C., an Al film was formed by a collimating method using an effusion cell and a sputter as a source. The first 20 nm was vapor-deposited at a rate of 0.05 nm / sec using an effusion cell, and subsequently an Al layer of 0.8 μm was deposited by sputtering. A metal pattern was formed by the third photolithography.

【0015】上記テストパターンのAl/Si界面を高
分解能断面TEM法を用いて観察したところ、界面は原
子層オーダーで急峻であり、平均の界面ゆらぎは10n
mあたり1原子層のステップが2個以下と極めて小さか
った。またAl膜は、Si基板に対してAl(111)//
Si(111)かつAl<220>//Si<220>の関係を持
つグレイン、またはAl(100)//Si(111)かつAl
<220>//Si<220>と等価な3種類のグレインとから
成っていることが明らかになった。電気特性の評価は、
コンタクトサイズ0.5×0.5μmのものに対して、
I−V法を用いて行った。100個のコンタクトの平均
比抵抗値は、1×10-7Ωcm2以下であり、アニール
を行わなくても極めて低い値が得られた。また同じサン
プルに対し、水素雰囲気中で、500℃,60分間のア
ニールを行った後、同様の電気特性評価を行ったとこ
ろ、平均比抵抗値はほとんど劣化しなかった。以上の結
果から、請求項1、2の特徴を持つAl/Siオーミッ
クコンタクトでは、アニールなしでも低いコンタクト抵
抗が得られ、しかも高温アニールに対しても特性が安定
であることが証明された。
When the Al / Si interface of the above test pattern was observed using a high-resolution cross-sectional TEM method, the interface was steep on the atomic layer order, and the average interface fluctuation was 10 n.
The number of steps per atomic layer per m was extremely small, which was 2 or less. The Al film is Al (111) /// with respect to the Si substrate.
Grain having a relation of Si (111) and Al <220> // Si <220>, or Al (100) // Si (111) and Al
It became clear that it consists of three types of grains equivalent to <220> // Si <220>. Evaluation of electrical characteristics
For contact size 0.5 × 0.5μm,
It was carried out using the IV method. The average specific resistance value of 100 contacts was 1 × 10 −7 Ωcm 2 or less, and an extremely low value was obtained without annealing. Further, when the same sample was annealed in a hydrogen atmosphere at 500 ° C. for 60 minutes and then the same electrical characteristics were evaluated, the average specific resistance value was hardly deteriorated. From the above results, it was proved that the Al / Si ohmic contact having the features of claims 1 and 2 has a low contact resistance even without annealing and has stable characteristics even at high temperature annealing.

【0016】[0016]

【発明の効果】以上説明したように、本発明によれば、
バリアメタルを用いないAlコンタクト構造によって、
アニールなしにオーミック性が確保でき、しかもプロセ
スに用いられる程度の熱処理に対しては特性が変化しな
いような優れたコンタクトを実現できる。これは従来の
Alコンタクトでは不可能であった。また従来のバリア
メタル構造に比べても、材料自体の抵抗が低い、製造工
程が容易であるためにコストが安い、という工業的に多
くの利点を有するものである。
As described above, according to the present invention,
By the Al contact structure that does not use barrier metal,
An ohmic contact can be secured without annealing, and an excellent contact whose characteristics do not change with heat treatment to the extent used in the process can be realized. This was not possible with conventional Al contacts. Further, compared with the conventional barrier metal structure, it has many industrial advantages that the resistance of the material itself is low and the cost is low because the manufacturing process is easy.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 Si基板に直接Alを接触させた構造を
持つAlコンタクト構造において、Si/Al界面のゆ
らぎが、界面に平行な方向に10nmあたり4原子層未
満であるような平坦な界面を持つことを特徴とするAl
コンタクト構造。
1. In an Al contact structure having a structure in which Al is directly contacted with a Si substrate, a flat interface having a fluctuation of the Si / Al interface of less than 4 atomic layers per 10 nm in a direction parallel to the interface is formed. Al characterized by having
Contact structure.
【請求項2】 Si基板に直接Alを接触させた構造を
持つAlコンタクト構造において、Si基板とAlの方
位関係が界面に平行な面内でAl<220>//Si<220>
であることを特徴とするAlコンタクト構造。
2. In an Al contact structure having a structure in which Al is directly contacted with a Si substrate, Al <220> // Si <220> in a plane in which the orientation relationship between the Si substrate and Al is parallel to the interface.
The Al contact structure is characterized by:
【請求項3】 Si基板の表面をpH値が4〜8のフッ
酸系水溶液に浸して該Si表面の平坦性を10nmあた
り4原子層未満とし、次いでこのSi平坦面にAlを堆
積させることを特徴とするAlコンタクト構造の製造方
法。
3. The surface of a Si substrate is immersed in an aqueous solution of hydrofluoric acid having a pH value of 4 to 8 so that the flatness of the Si surface is less than 4 atomic layers per 10 nm, and then Al is deposited on the Si flat surface. And a method for manufacturing an Al contact structure.
JP5021644A 1993-01-18 1993-01-18 Al contact structure Expired - Fee Related JP2727902B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7129174B2 (en) 2003-03-24 2006-10-31 Samsung Electronics Co., Ltd. Methods of fabricating a semiconductor substrate for reducing wafer warpage
WO2012026428A1 (en) * 2010-08-24 2012-03-01 三洋電機株式会社 Method for producing solar cell

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6092614A (en) * 1983-10-27 1985-05-24 Toshiba Corp Manufacture of semiconductor device
JPS61281523A (en) * 1985-06-07 1986-12-11 Nippon Gakki Seizo Kk Formation of contact
JPS6333569A (en) * 1986-07-25 1988-02-13 Nippon Telegr & Teleph Corp <Ntt> Production of thin metallic film
JPH02307224A (en) * 1989-05-23 1990-12-20 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH03286524A (en) * 1990-04-03 1991-12-17 Kawasaki Steel Corp Manufacture of semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6092614A (en) * 1983-10-27 1985-05-24 Toshiba Corp Manufacture of semiconductor device
JPS61281523A (en) * 1985-06-07 1986-12-11 Nippon Gakki Seizo Kk Formation of contact
JPS6333569A (en) * 1986-07-25 1988-02-13 Nippon Telegr & Teleph Corp <Ntt> Production of thin metallic film
JPH02307224A (en) * 1989-05-23 1990-12-20 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH03286524A (en) * 1990-04-03 1991-12-17 Kawasaki Steel Corp Manufacture of semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7129174B2 (en) 2003-03-24 2006-10-31 Samsung Electronics Co., Ltd. Methods of fabricating a semiconductor substrate for reducing wafer warpage
US7498213B2 (en) 2003-03-24 2009-03-03 Samsung Electronics Co., Ltd. Methods of fabricating a semiconductor substrate for reducing wafer warpage
WO2012026428A1 (en) * 2010-08-24 2012-03-01 三洋電機株式会社 Method for producing solar cell
JP2012049193A (en) * 2010-08-24 2012-03-08 Sanyo Electric Co Ltd Method of manufacturing solar cell

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