JPH06205225A - Still picture transmission/storage device - Google Patents

Abstract

PURPOSE:To reduce a hardware scale by storing data by plural lines, realizing the reading and the recording of a picture at a high speed and using a conver sion transfer path for transfer data as an exclusive bus. CONSTITUTION:Two lines of a read picture are stored in a line memory 2, from which a coding object symbol series 101 is read based on a read clock 104, the series 101 is subjected to an arithmetic coding at every unit of one line and a coding output 102 is stored in a code memory 4. A decoded input 107 is subjected to an arithmetic decoding at every unit of one line at a decoding section 7 and a 2-line decoding symbol series 108 is stored in a line memory 8 based on a write clock 110 and a recording section 9 records the decoded picture. Data selectors 16, 19 are used for selecting transmission/reception and either of conversion use arithmetic coding sections and decoding sections 13, 13a and 10, 10a, conversion use MH/MR/MMR coding section and decoding section 14, 17, format conversion sections 11, 11a, picture synthesis sections 12, 12a, and system selectors 15, 18 is selected to obtain the required coding/ decoding system.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a still image transmitting / accumulating device which improves information compression performance of pseudo-halftone images and realizes high-speed image reading and recording.

[0002]

2. Description of the Related Art In a conventional still image transmission / accumulation device shown in, for example, the G3 facsimile system, as shown in FIG. 4, an image reading unit 1 photoelectrically converts a target image (a document image, a pseudo halftone image, or the like). For example, a CCD system) and AD conversion (binarization processing) are performed to generate a binary image signal. The reading frame memory 2a temporarily stores the binary image signal of the bit image for one page from the image reading unit 1. M
The MR encoding unit 3a modifies the encoding target symbol sequence 101 from the read frame memory 2a.
Modified read (MMR) coding is performed to generate a coded output 102a. The code memory 4 stores the coded output 102a from the MMR coding unit 3a for recording or transmission. Also, the received data from the communication control unit 5 is stored for recording. The communication control unit 5 passes the transmission / reception data between the code memory 4 and the conversion / network control unit 6, confirms the function of the partner device, and controls the communication procedure. The conversion / network control unit 6 modulates / demodulates or code-converts the transmission / reception data to control the line connection with the partner device. The MH / MR / MMR decoding unit 7a receives the modified input Huffman (MH) decoding, the modified read (MR) decoding, or the modified modified modified (MMR) from the code memory 4 to the decoding input 106.
Decoding is performed to restore the decoded symbol sequence 107a. The recording frame memory 8a temporarily stores the decoded symbol sequence 107a of the bit image for one page from the MH / MR / MMR decoding unit 7a. The image recording unit 9 performs DA conversion and electro-optical conversion (for example, an electrophotographic method) on the binary image signal from the recording frame memory 8a and records it. Conversion MH / MR / MMR decoding unit 10b, format conversion unit 11b, and conversion MH / MR / MMR encoding unit 14a
Is the format (pixel density, paper size, etc.) and encoding method (MH, MR or MMR method) suitable for the partner device.
In order to convert the data into a binary image signal of a bit image by performing MH, MR or MMR decoding on the transmission data from the code memory 4, format conversion is performed again, and MH, MR or MMR encoding is performed again to encode the code. Return to memory 4. The code memory 4 is connected to the coding units 3a and 1 via a system bus (shared signal bus, plural data transfer paths).
4a, the decoding units 7a and 10b, and the communication control unit 5 are combined.

The conventional still image transmission / accumulation device described above is
A method of temporarily storing in a frame memory of a binary image signal of a bit image for one page, and connecting a data transfer path for converting transmission data with a shared bus (frame memory /
Use a shared bus system).

In the above system, when reading a plurality of images,
Encoding is started when the reading of the previous page is completed, and reading of the next page is restarted when the encoding is completed. When recording a plurality of images, the decoding is started when the recording of the previous page is completed, and the recording of the next page is restarted when the decoding is completed. At the time of image transmission, the code memory 4, the encoding unit 3a, and the decoding unit 10
b, the encoding unit 14a, and the communication control unit 5 The data is transmitted four times via the system bus between the respective components, and the encoded data is transmitted after being converted into the format and the encoding method suitable for the partner device.

Frame memories 2a and 8a for reading and recording
Is a buffer for reading and recording any image at 1.5 to 3 seconds / page (set in consideration of user convenience), and cannot perform encoding and decoding processing within this required time. The encoding unit 3a and the decoding unit 7a are complemented with each other.

The conversion decoding unit 10b, the format conversion unit 11b, and the conversion encoding unit 14a execute the conversion of the transmission data in real time because the data signal speed of the data transmission line is about 9.6 kbit to 14.6 kbit.

The encoding units 3a and 14a and the decoding units 7a and 10b are replaced with the MH / MR / MMR system, for example, as shown in FIG. 5, for example, a Markov model arithmetic encoding unit and arithmetic unit shown in Japanese Patent Application No. 3-311910. A decoding unit can be applied. As compared with the conventional MMR system, for example, it is possible to increase the information compression performance by 20 to 30% for binary images such as characters and figures and 3 to 30 times for the pseudo halftone image by the dither method. As shown in FIG. 5A, the Markov model arithmetic encoding unit first reads from the reading frame memory 2a the encoding target symbol sequence 10
The reference symbol (pre-encoded symbol) pattern generated by the reference symbol generator 31 for 1 generates the order of the encoding target symbol (identifier for identifying the predictive matching rate) and the predicted value in the order / predicted value memory 32. To do. Next, the area width on the number line is generated by the area width table 33 from the order,
The prediction converter 34 predicts the prediction value and the encoding target symbol sequence 10
An exclusive OR operation with 1 is performed to generate a prediction error symbol (prediction error signal to be encoded) sequence. Further, the arithmetic encoder 34 performs arithmetic operation on the prediction error symbol sequence on the number line based on the region width to generate the encoded output 102a. In addition, the order / prediction value controller 36 applies a continuous dominant symbol (More Probable Symbol) to the prediction error symbol sequence from the prediction converter 34.
l: MPS) and inferior symbol (Less Probe)
le Symbol: LPS) number is counted, the value of the order corresponding to the reference symbol from the order / predicted value memory 32 is adaptively adjusted, and the order / predicted value table is updated in accordance with the nature of the information source. Control. As shown in FIG. 5B, the Markov model arithmetic decoding unit first uses the decoding input 107 from the code memory 4 and the arithmetic decoder 75 in the area width table 33.
The arithmetic operation is performed on the number line based on the region width from, and the prediction inverse converter 74 performs an exclusive OR operation of the restored prediction error symbol sequence and the prediction value from the order / prediction value memory 32, and decodes the result. The symbol sequence 108a is restored. The reference symbol generator 31, the order / predicted value memory 32, the area width table 33, and the order / predicted value controller 36 correspond to FIG. 5A of the Markov model arithmetic encoding unit.

[0008]

In the conventional still image transmission / accumulation device as described above, the MMR encoding unit 3a or the Markov model arithmetic encoding unit uses the encoding target symbol sequence 101 from the reading frame memory 2a. Since there is no function for temporarily stopping the reading, a binary image signal of a bit image for one page is transferred between the image reading unit 1 and the encoding unit 3a in a frame memory (for example, A3 with a maximum resolution of 16 × 15.4 pixels / mm ² ). It requires a capacity of about 4 Mbytes). Also MH / MR / MM
The R decoding unit 7a or the Markov model arithmetic decoding unit also does not have a function of temporarily stopping the writing of the decoded symbol sequence 107a to the recording frame memory 8a, and thus requires the same frame memory. On the other hand, a method is adopted in which the data transfer paths for converting the transmission data are connected by a shared bus. Therefore, the capacity of the frame memory for one page of bit image is increased,
There is also a problem that the hardware scale for avoiding a bus neck by expanding the bus width and increasing the speed of transfer of bus data (especially necessary for a device supporting multiple lines) increases.

The problem to be solved by the present invention is to temporarily store a binary image signal of a plurality of lines of bit images in a line memory and to read a high-speed image in order to reduce the hardware scale in a still image transmission / accumulation device. It is to provide a method (line memory / dedicated bus method) in which data can be recorded and a data transfer path for changing transmission / reception data is coupled by a dedicated bus.

[0010]

A still image transmission / accumulation device of the present invention is provided with the following means in order to solve the above problems and is characterized by adopting a line memory / dedicated bus system.

The image reading unit performs photoelectric conversion and AD conversion on the target image to generate a binary image signal.

The reading line memory temporarily stores the binary image signals of the bit images for a plurality of lines from the image reading unit in units of one line. The read enable signal is output each time image reading is completed in units of one line, and is canceled each time arithmetic coding is completed. It is read as a symbol sequence to be encoded with a read clock from the arithmetic encoding unit.

The arithmetic coding unit monitors a read enable signal from the read line memory, generates a read clock at a readable time point, and outputs a read clock from the read line memory in units of one line. The arithmetic output is performed for each of the two, and the encoded output is generated.

The code memory stores the coded output from the arithmetic coding unit for recording and transmission, and stores the received data from the communication control unit for recording.

The communication control unit passes the transmission / reception data between the code memory and the conversion / network control unit, confirms the function of the partner device, and controls the communication procedure.

The conversion / network control unit performs modulation / demodulation or code conversion on the transmission / reception data and controls the line connection with the partner device.

The arithmetic decoding unit monitors the write enable signal from the recording line memory, generates a write clock at a writable time point, and performs arithmetic decoding for each line on the decoded input from the code memory, Restore the decoded symbol sequence.

The line memory for recording is written as a binary image signal of a bit image for a plurality of lines from the arithmetic decoding unit with a write clock from the arithmetic coding unit, and temporarily stores the decoding symbol sequence in units of one line. Write enable signal 1
It is output each time image recording is completed line by line, and is canceled each time arithmetic decoding is completed.

The image recording section performs DA conversion and electro-optical conversion on the binary image signal from the recording line memory and records a restored image.

The conversion arithmetic decoding unit performs arithmetic decoding on the transmission or reception data from the code memory or the communication control unit, and temporarily restores the binary image signal of the bit image.

The format conversion unit is a partner or an own device with respect to the converted bit image information from the conversion arithmetic decoding unit or the conversion MH / MR / MMR decoding unit, if necessary, to the combined bit image information from the image combining unit. Perform format conversion that matches the function of the device.

The image synthesizing unit synthesizes the header information with the changed or previous bit image information from the format converting unit or the decoding system selector.

The conversion arithmetic coding unit performs arithmetic coding again on the converted bit image information from the format conversion unit, and if necessary, the combined bit image information from the image combining unit.

The conversion MH / MR / MMR encoding unit again performs MH / MR / MMR encoding on the converted bit image information from the format conversion unit, and if necessary, the combined bit image information from the image combining unit. Give.

The coding system selector selects one of the conversion arithmetic coding unit and the MH / MR / MMR coding unit, which is suitable for the received data coding system of the partner device.

The transmission data selector selects either the post-conversion transmission data from the encoding method selector or the pre-conversion transmission data from the code memory and couples it to the communication control section.

The conversion MH / MR / MMR decoding unit performs MH / MR / MMR decoding on the data received from the communication control unit, and temporarily restores a binary image signal of a bit image.

The decoding system selector comprises a conversion arithmetic decoding unit and an M decoding unit.
One of the H / MR / MMR decoding units selects a decoding method suitable for the received data coding method of the own device.

The reception data selector selects either the conversion reception data from the conversion arithmetic encoding unit or the encoding method selector or the pre-conversion reception data from the communication control unit.

The transmission / reception data selector selects either transmission data from the code memory or reception data from the communication control section.

[0031]

With the above-mentioned means, the still image transmission / accumulation device of the present invention reads the target image first, and then reads from the line filter for reading, which temporarily stores the binary image signals for a plurality of lines, every time the image reading is completed line by line. Coding that monitors the read enable signal that is released each time the arithmetic coding is completed and performs arithmetic coding on a line-by-line basis for the coding target symbol series that is read by the read clock generated at the readable time Accumulate output. Next, the recording line filter monitors a write enable signal that is output each time image recording is completed in 1-line units and is released each time arithmetic decoding is completed. Arithmetic decoding is performed for each unit and restored, decoded symbol sequences for a plurality of lines to be written are temporarily stored, and a restored image is recorded. Further, the transmission / reception data is directly or converted into a format or a composite image suitable for the function of the partner or the self-device, or a coding method suitable for the reception data coding method of the partner or the self-device and delivered.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION A still image transmission apparatus / accumulation apparatus according to an embodiment of the present invention has an image reading section 1, a code memory 4, a communication control section 5, a conversion / network control section 6 and an image recording section as shown in FIG. 9
Corresponds to FIG. 4 of the above-mentioned conventional example. The reading line memory 2 temporarily stores the binary image signal of the bit image of two lines from the image reading unit 1 alternately in the first and second areas as a toggle buffer. The read enable signal 103
Is output each time the image reading for one line is completed, and is canceled each time the arithmetic coding is completed. Markov model arithmetic coding unit 3
The data is read as the encoding target symbol sequence 101 by the read clock 104 from. Markov model arithmetic coding unit 3
Is a read enable signal 10 from the read line memory 2.
3 is monitored, and the read clock 104 is generated at the time when the image reading for one line becomes readable, and
The coding target symbol sequence 101 read from the reading line memory 2 is subjected to Markov model arithmetic coding line by line, and a coded output 102 is generated. The Markov model arithmetic decoding unit 7 monitors the write permission signal 109 from the recording line memory 8 and becomes writable 1
The write clock 110 is generated at the time of completion of recording of lines, and the Markov model arithmetic decoding is performed on the decoding input 107 from the code memory 4 for each line,
The decoded symbol sequence 108 is restored. The recording line memory 8 writes from the Markov model arithmetic decoding unit 7 as a binary image signal of a bit image of two lines by the write clock from the Markov model arithmetic decoding unit 7, and alternately decodes the decoded symbol sequence 108 as a toggle buffer. 1st and 2nd
It is temporarily stored in the area. In addition, the write enable signal 109 is set to 1
It is output each time the image recording for the line is completed, and it is canceled each time the arithmetic decoding is completed. The conversion Markov model arithmetic decoding unit 10, the format conversion unit 11, and the image synthesizing unit 12 perform Markov model arithmetic decoding on the transmission data from the code memory 4 and once restore the binary image signal of the bit image to obtain the pixel density. Header information (source information, time information, etc.) is combined with the bit image information that has undergone format conversion suitable for the function of the partner device, such as paper size and paper size. Transform Markov model arithmetic coding unit 13 and transform MH / MR /
The MMR encoding unit 14 and the encoding method selector 15 again perform Markov model arithmetic encoding and MH / MR / on the bit image information obtained by combining the header information from the image combining unit 12.
MMR encoding is performed, and an encoding method suitable for the reception data encoding method of the partner device is selected. Transmission data selector 16
Selects either the pre-conversion transmission data from the code memory 4 or the post-conversion transmission data from the encoding method selector 15,
It is connected to the communication control unit 5. The conversion Markov model arithmetic decoding unit 10a, the conversion MH / MR / MMR decoding unit 17, and the decoding method selector 18 perform the Markov model arithmetic decoding and the MH / MR / MMR decoding on the received data from the communication control unit 5. Then, the decoding method suitable for the received data encoding method of the own device is selected. Image synthesizer 12a, format conversion unit 11a, conversion Markov model arithmetic coding unit 13a
Includes header information (reception source information, time information, etc.) with the binary image signal of the bit image decoded and selected by the decoding method selector 18, and has a function of its own device such as pixel density and paper size. The Markov model arithmetic coding is applied to the bit image information subjected to the format conversion. The reception data selector 19 selects either the pre-conversion reception data from the communication control unit 5 or the post-conversion reception data from the conversion Markov model arithmetic encoding unit 13 a, and the code memory 4
Bind to. The code memory 4 is connected to the encoder 3, the communication controller 5, and the decoder 7 via the system bus. In addition, it is coupled to the encoding unit 13a via the decoding unit 10, the selectors 15 and 16 and the encoding units 13 and 14 and the selector 19 via a dedicated bus, respectively.

The still image transmission / accumulation device of the above embodiment is
A method of temporarily storing a binary image signal of two lines of bit images in a line memory, realizing high-speed image reading and recording, and connecting a data transfer path for converting transmitted / received data with a dedicated bus (line memory / dedicated bus method). ).

In the above method, when an image is read, arithmetic coding is started at the time when the reading of the previous line is completed, and the arithmetic coding operation is temporarily stopped at the time when the arithmetic coding is completed. When the reading of the next line is completed, the arithmetic coding is restarted, and the same process is repeated. During image recording, arithmetic decoding is started when recording of the previous line is completed, and arithmetic decoding operation is temporarily stopped when arithmetic decoding is completed. Arithmetic decoding is restarted for the next line when the recording is completed, and the same process is repeated. Code memory 4 during image transmission / reception
2 via the system bus between the encoder 3 and the communication controller 5
By transmitting the data only once, the transmission data is converted to the counterpart device and the reception data is converted into a format, a composite image, and an encoding method that are in the respective device, and the encoded data is transmitted and received.

The image reading section and the recording sections 1 and 9 have a resolution of 8 × 7.7 pixels / mm ² and a recording time of 0.
The target image is read and the restored image is recorded at 5 msec / line.

The reading and recording line memories 2 and 8 are provided with up / down counters, and are incremented by 1 at the completion of image reading and recording for one line, and are incremented by 1 at the completion of arithmetic coding and decoding for one line. Subtract. When the counter value is 1 or more, the read and write permission signals 103 and 109 are output. If the size of the document to be read and recorded is A3, the Markov model arithmetic coding unit and the decoding units 3 and 7 can process at about 5 Mpixels / sec at worst (about 9 Mpixels / sec on average). In the case of, the nth-line image reading and recording time TSn and TRn (0.5 msec / line), the arithmetic coding and decoding time TCn and TDn are 2432 /
5M≈0.49msec, and TSn> TCn-1 and T
Rn-1> TDn. Therefore, when the image reading of the next line and the image recording of the previous line are completed, the arithmetic coding of the previous line and the arithmetic decoding of the next line are completed, and the image of the next line is completed when the arithmetic coding of the previous line and the arithmetic decoding of the next line are completed. This means that reading and image recording of the previous line have not been completed.

As shown in FIG. 2, the Markov model arithmetic coding unit and the decoding units 3 and 7 have a reference symbol generator 31, an order / prediction value memory 32, a region width table 33, and a prediction converter 34.
The arithmetic encoder 35, the order / prediction value controller 36, the predictive inverse converter 74, and the arithmetic decoder 75 correspond to those of the conventional example shown in FIG. The encoding and decoding control means 37 and 77 are composed of a micro programmable controller. An arithmetic operation end timing signal 105 is input from the arithmetic encoder / decoders 35 and 75, and an update end timing signal 106 is input from the order / predicted value controller 36. At the time of completion of arithmetic coding and decoding for one line, the reading and writing permission signals 103 and 109 from the reading and recording line memories 2 and 8 are monitored,
At the time of completion of image reading and recording for one line that can be read and written, read and write clocks 104 and 110 are generated, the operations of the arithmetic encoders and decoders 35 and 75 are restarted, and the timing of the next processing Take control. Reference symbol pattern creation Degree and prediction value reading, region width creation, predictive conversion Arithmetic operation (including code generation and restoration), predictive inverse conversion If necessary, update of order and predicted value data

In the above embodiment, the conversion Markov model arithmetic decoding unit 10, the format conversion unit 11a, the image synthesizing unit 12a and the conversion Markov model arithmetic encoding unit 13a are deleted, and the transmission / reception data is converted as shown in FIG. A selector 20 is provided to select either the transmission data from the code memory 4 or the reception data from the communication control unit 5, and the conversion Markov model arithmetic decoding unit 10a and the MH / MR / MMR decoding unit 17,
Decoding method selector 18, format conversion unit 11, image synthesis unit 12, conversion Markov model arithmetic coding unit 13 and M
The H / MR / MMR coding unit 14 and the coding method selector 15 may be connected to either the transmission and reception data selectors 16 and 19 in the order path.

In the above embodiment, the reading and recording line memories 2 and 8 have been described as temporarily storing binary image signals of bit images for two lines, but arithmetic coding and decoding times TC and TD per line are described. Is longer than the image reading and recording time TS and TR per line, | (TCmax-
TS) × Nline / TS | and | (TDmax-TR) × Nli
A binary image signal of a 1-bit image for ne / TR | lines may be temporarily stored so that the number of bits of the up / down counter can be increased and counted. The target image can be continuously read and recorded in the same manner as in the above embodiment. Where TCmax and TDmax are the maximum time for arithmetic coding and decoding per line, N
line represents the number of lines in one page, and | * | represents the rounded up value. When using a small capacity line memory,
Means may be provided for increasing / decreasing the scanning speed stepwise in accordance with the binary image signal amount to be stored. It is possible to realize an arithmetic coding and decoding method without noise and image quality deterioration due to switching of scanning speed.

It goes without saying that the conversion / network control unit 6 in the above embodiment can be connected not only to the public telephone line but also to the integrated service digital communication network (ISDN) as a communication network.

[0041]

EFFECT OF THE INVENTION Still image transmission of the present invention as described above /
In the storage device, a line memory for temporarily storing a plurality of lines of a target image and a restored image signal, an arithmetic encoding unit and a decoding unit capable of temporarily stopping arithmetic encoding and decoding operations in line units are provided, and line unit control is performed. It realizes high-speed image reading and recording without the need of frame memory with bit images for pages. In addition, a method is adopted in which a dedicated bus is used to combine the data transfer path for converting the transmission / reception data into a format or composite image that matches the function of the other party and its own device, and an encoding method that matches the received data encoding method of the other party and its own device. Avoid the bus neck. Therefore, the line memory / dedicated bus system of the present invention is effective in reducing the hardware scale as compared with the conventional frame memory / shared bus system.

[Brief description of drawings]

FIG. 1 is a functional block diagram of a still image transmission / accumulation device according to an embodiment of the present invention.

FIG. 2 is a functional block diagram of a Markov model arithmetic encoding unit and a decoding unit shown in FIG.

FIG. 3 is a functional block diagram of another embodiment showing the present invention.

FIG. 4 is a functional block diagram of a conventional still image transmission / storage device.

5 is an MMR encoder and MH / MR / MM shown in FIG.
The functional block diagram of the Markov model arithmetic coding part and decoding part instead of the R decoding part.

[Explanation of symbols]

 1 image reading unit 2 reading line memory 3 Markov model arithmetic coding unit 4 code memory 5 communication control unit 6 conversion / network control unit 7 Markov model arithmetic decoding unit 8 recording line memory 9 image recording unit 10, 10a conversion Markov Model arithmetic decoding unit 11, 11a Format conversion unit 12, 12a Image synthesis unit 13, 13a Conversion Markov model arithmetic coding unit 14 Conversion MH / MR / MMR coding unit 15 Coding method selector 16 Transmission data selector 17 MH / MR / MMR decoding unit for conversion 18 Decoding method selector 19 Received data selector 20 Transmitted / received data selector 101 Encoding target symbol sequence 102 Encoding output 103 Read permission signal 104 Read clock 107 Decoding input 108 Decoding symbol sequence 109 Write enable signal 110 Write black In the drawings, the same reference numerals indicate the same or corresponding parts.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshifumi Imanaka 5-1-1, Ofuna, Kamakura-shi Mitsubishi Electric Corporation

Claims (5)

[Claims] 1. An image reading unit that performs a photoelectric conversion and an AD conversion on a target image to generate a binary image signal, and the binary image signal of a bit image for a plurality of lines from the image reading unit is temporarily set for each line. A read line memory which stores and outputs a read enable signal each time image reading is completed in units of one line, cancels each completion of arithmetic coding, and reads as a symbol sequence to be coded by a read clock from the arithmetic coding unit; The read enable signal from the read line memory is monitored, the read clock is generated at a readable time, and the encoding target symbol sequence read from the read line memory is arithmetically encoded line by line. Stationary including an arithmetic coding unit for applying the above to generate a coded output, and a code memory for accumulating the coded output from the arithmetic coding unit. Image transmission / storage device. 2. A code memory for storing coded data,
Arithmetic decoding for monitoring a write enable signal from a recording line memory, generating a write clock at a writable time, and performing arithmetic decoding for each line on a decoding input from the code memory to restore a decoded symbol sequence. And a write clock from the arithmetic decoding unit, the binary decoding unit writes data as a binary image signal of a bit image of a plurality of lines from the arithmetic decoding unit, temporarily stores the decoded symbol sequence in units of one line, and writes a write enable signal in units of one line. A recording line memory that outputs each time image recording is completed and cancels it each time arithmetic decoding is completed, and an image recording unit that records a restored image by performing DA conversion and electro-optical conversion on a binary image signal from the recording line memory. Still image transmission / storage device provided. 3. A code memory for storing transmission / reception data,
The transmission / reception data is passed between the code memory and the conversion / network control unit, and the communication control unit that confirms the function of the partner device and controls the communication procedure, and the line connection with the partner device by modulating / demodulating or converting the transmission / reception data is controlled. A conversion / network control unit, a conversion arithmetic decoding unit that performs arithmetic decoding on the transmission data from the code memory to temporarily restore a binary image signal of a bit image, and the bit image information from the conversion arithmetic decoding unit. On the other hand, a format conversion unit that performs format conversion suitable for the function of the partner device, an image composition unit that combines the header information with the converted bit image information from the format conversion unit, and a format conversion unit or an image composition unit, if necessary. For conversion of the above-mentioned converted or combined bit image information from the above-mentioned arithmetic coding and MH / MR / MMR coding again Operative coder and conversion MH / MR
/ MMR encoding unit, conversion arithmetic encoding unit and MH / MR
/ MMR encoding unit, an encoding method selector for selecting an encoding method that matches the reception data encoding method of the partner device, the converted transmission data from the encoding method selector, and the code memory A still image transmission / accumulation device comprising: a transmission data selector that selects any of the transmission data before conversion and is coupled to the communication control unit. 4. The code memory, the communication control unit, and the conversion / network control unit according to claim 3, and the received data from the communication control unit is subjected to arithmetic decoding and MH / MR / MMR decoding, and is temporarily converted into a bit image 2 A conversion arithmetic decoding unit and a conversion MH / MR / MMR decoding unit for restoring the value image signal;
A decoding method selector for selecting one of the conversion arithmetic decoding section and the MH / MR / MMR decoding section, which is suitable for the received data encoding method of the apparatus itself, and if necessary, the decoding method selector from the decoding method selector. An image synthesizing unit for synthesizing header information with bit image information, and a format conversion suitable for the function of the device for the bit image information from the decoding method selector or the synthesized bit image information from the image synthesizing unit. A format conversion unit, a conversion arithmetic coding unit that performs arithmetic coding again on the converted bit image information from the format conversion unit, and post-conversion received data from the conversion arithmetic coding unit and the communication control unit. A still image transmission / accumulation device comprising: a reception data selector that selects any of the pre-conversion reception data and is coupled to the code memory. 5. The code memory according to claim 3, a communication control unit, a conversion / network control unit, a format conversion unit, if necessary, an image composition unit, a conversion arithmetic coding unit, and a conversion MH / MR / M.
An MR coding unit, a coding system selector and a transmission data selector, and a conversion arithmetic decoding unit and a conversion MH /
An MR / MMR decoding unit, a decoding method selector and a reception data selector, and a transmission / reception data selector that selects either transmission data from the code memory or reception data from the communication control unit, The transmission or reception data selected by the transmission / reception data selector is converted into the arithmetic decoding unit and the MH / MR / MMR decoding unit, the decoding method selector, the format conversion unit, if necessary, the image synthesizer, and the arithmetic encoding for conversion. Still image transmission / accumulation device, characterized in that it is connected to either a transmission or reception data selector in the order path of the section, the MH / MR / MMR encoding section and the encoding method selector.