JPH06196630A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor integrated circuit device, which can prevent the erroneous operations caused by mutual interference and noises and is suitable for use in driving devices of power converters and the like. CONSTITUTION:A power converter is constituted by forming an upper-arm driving circuit, a lower-arm driving circuit and the like in each phase in the respective semiconductor islands of a dielectric separating semiconductor substrate. A metal wiring 24 and a contact 25 are provided at a polysilicon exposed part, which is to becomes the supporting body for the dielectric separating substrate at the boundary part between the islands. The potential of the polysilicon is fixed at GND or a constant potential. The noises generated by the voltage fluctuation caused by the operation of the device are absorbed with the GND or the constant potential of the polysilicon. Thus, the erroneous operations caused by the mutual interference and the noises between the upper and lower arm-driving circuits and between the upper-arm driving circuits are prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device suitable for use as a driving device for a device using switching elements for upper and lower arms of an inverter or the like, and more particularly to a large voltage fluctuation in the inverter driving device or the like. The present invention relates to a semiconductor integrated circuit device which is suitable for use in preventing mutual interference between upper and lower arms to which a load is applied, mutual interference between phases of upper arms, and malfunction due to noise.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing a configuration of a three-phase inverter using an IGBT as a switching element for explaining the conventional technique. In FIG. 6, 1 is a main power source, 2
Are upper arm switching elements, 3 to 5 are lower arm switching elements, 6 to 8 are upper arm drive circuits, 9 to 11 are output stage elements, 12 is a level shift circuit, and 13 is a lower arm drive circuit.

Generally, an inverter is, for example, as shown in FIG. 6, a main power supply 1 obtained by rectifying AC200V of a commercial power supply, and a high voltage side arm (hereinafter referred to as a series connection) totem pole connection (series connection) between its terminals. , The upper arm) and the low voltage side arm (hereinafter, referred to as the lower arm) power switching elements 3 to 5 for switching the power, and the upper arm drive circuits 6 to 8 for driving these. The output stage elements 9 to 11, the level shift circuit 12, and the lower arm drive circuit 13 are provided.

In the above description, an IGBT, a MOSFET or the like is used as the power switching element, and the drive circuit 6
Driven by ~ 8,13. The power switching element unit includes a power switching element 2 that constitutes an upper arm for three phases of U, V, and W and a U that constitutes a lower arm between the terminals of the main power source 1 in which the commercial power source AC200V is rectified. , V,
The power switching elements 5, 4, and 3 for three phases of W are connected to the totem poles, respectively.

The lower arm drive circuit 13 drives and controls the switching elements 3 to 5 constituting the lower arm. In addition, the switching element 2 that constitutes the upper arm
Is driven in a floating state with respect to the reference potential, and is therefore a high-voltage side circuit U, V, to which a drive signal is transmitted from the lower arm drive circuit 13 which is a low-voltage side circuit via the level shift circuit 12. It is driven by drive circuits 6 to 8 and output stage elements 9 to 11 for three phases of W.

In the above-mentioned inverter device, the upper and lower arm drive circuits 6 to 8 and 13, the level shift circuit 12 and the output stage element 9 are provided in order to reduce the area and speed up signal transmission.
11 to 11 are integrated into a monolithic integrated circuit.

As a conventional technique relating to this type of inverter device, for example, "The 4-th International Sympo
sium on Power Semiconductor Devices & ICs 1992 ”, '500V Three Phase Inverter ICs Based
on a New Dielectric Isolation Technique 'A. Nakaga
wa Toshiba R & D Center and (*) Semiconductor Grou
p), etc. are known.

In the above-mentioned conventional inverter,
When the inverter operates with the main power source 1 that rectifies 200 V AC, the monolithic inverter drive device includes upper arm drive circuits 6 to 8 and output stage elements 9 to 11 and lower arm drive circuit 13 corresponding to these drive circuits. And between each phase of the upper arm drive circuits 6-8, a maximum of 400-
Since a voltage difference of 600 V is generated, the upper arm drive circuit and the lower arm drive circuit are provided on different dielectric isolation semiconductor islands.
Similarly, the drive circuits for the respective phases of the upper arm are formed on different dielectric isolation semiconductor islands.

However, in the conventional technology thus constructed, noise may be generated between the semiconductor islands due to the voltage change dv / dt at the time of switching. However, this noise is generated in the lower arm drive circuit system. logic,
The effects on the phases of other upper arm drive circuits have not been sufficiently considered.

[0010]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
When using a power source that rectifies a commercial 200V AC power source,
A voltage fluctuation of 280V to max600V may be applied to the inverter driving device operating in the inverter module due to ripples of the power source, regenerative voltage of the power source, and jumping voltage due to the inductance of the wiring in the module. is there.

When the drive circuit is constructed by a driver IC constructed by one chip and used, the drive circuit of the upper arm is driven by a signal through the level shift circuit to drive an output element such as an IGBT. This is the operation.

FIG. 7 is a sectional view of a dielectric isolation substrate showing a part of the structure of a driver IC in which a driving circuit is composed of one chip.

Now, for example, from the state in which the U-phase lower arm switching element 5 is in the ON state and the V-phase lower arm switching element 4 is in the ON state, only the V-phase lower arm switching element 4 is in the OFF state. And In this case, in FIG. 7, the potential of the semiconductor island 15 forming the V-phase upper arm drive circuit is GND because the V-phase lower arm switching element 4 is in the OFF state and the V-phase upper arm switching element is in the ON state. Or power supply potential (15V)
May rapidly rise from 280V to max600V.

At this time, due to the parasitic capacitance C of the semiconductor island isolation oxide film 16 and the increase dv / dt of this potential, Cd
A noise current of v / dt is generated. When this noise is taken in by the single crystal islands other than the V-phase upper arm drive circuit single crystal islands 15, it affects the drive circuits in these islands.

That is, in the above-mentioned prior art, the potential of the single crystal islands forming the drive circuits fluctuates rapidly due to the operation of the switching elements forming the arms, and as a result, the drive circuits interfere with each other and malfunction. Has the problem of causing

An object of the present invention is to solve the problems of the prior art described above, and is suitable for use in an inverter drive device or the like which can prevent the above-mentioned mutual interference and malfunction due to noise with a minimum chip size. It is to provide a semiconductor integrated circuit device.

[0017]

According to the present invention, the above object is a base material holding a dielectric isolation semiconductor island in which a driving circuit or the like is formed, and a potential between the dielectric isolation semiconductor islands. This is achieved by fixing the electric potential of the polysilicon portion in which is floating and absorbing noise by this electric potential.

That is, the above-mentioned object is to provide a dielectric isolation semiconductor island in which a driving circuit for each phase of different upper arms is formed between the dielectric isolation semiconductor islands in which the driving circuits of the switching elements forming the upper and lower arms are formed. At least one contact portion for polysilicon is provided between the islands, and the polysilicon substrate portion is fixed at a constant potential, or the island intervals between the islands are increased by a constant interval, and Metal wiring on at least one contact, and the polysilicon substrate is GND,
Alternatively, it is achieved by wiring so that the potential becomes constant and fixing the potential.

[0019]

By providing a contact between the dielectric isolation semiconductor islands and fixing the potential to GND or a constant potential, noise generated by a large voltage fluctuation is transmitted through the island isolation oxide film and the polysilicon substrate portion. This noise can be absorbed when trying to flow to another semiconductor island.

Thus, when the semiconductor integrated circuit device according to the present invention is used to drive the inverter, mutual interference between the upper and lower arms and between the upper arm phases and malfunction due to noise can be prevented.

[0021]

Embodiments of a semiconductor integrated circuit device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing a functional arrangement of an inverter drive device having a monolithic structure according to an embodiment of the present invention. This embodiment of the present invention is an example in which the drive device portion of the conventional inverter described with reference to FIG. 6 is monolithically constructed according to the present invention. FIG. 2 is a diagram for explaining the first embodiment of the present invention in which the portion A of FIG. 1 is enlarged, and FIG.
FIG. 3 is a sectional view taken along line BB of FIG. 1 to 3, 1
8 to 20 are semiconductor islands in which the drive circuits 6 to 8 for the three phases of the upper arm and the output stage elements 9 to 11 thereof are formed,
Reference numeral 21 is an output stage element of the lower arm drive circuit, 22 is a space between the dielectric isolation semiconductor islands constituting the upper arm drive circuit and the lower arm drive circuit, and a drive circuit and an output stage element of each phase of the upper arm. Exposed parts of the polysilicon substrate such as between the dielectric isolation semiconductor islands, 24 are metal wirings, 25 are contacts, 26 is a high-concentration impurity semiconductor layer, 27 is a polysilicon substrate, and 16 and 17 are oxide films. is there.

The inverter drive device according to the embodiment of the present invention shown in FIG. 1 is formed on a dielectric isolation semiconductor substrate, and each of the drive circuits 6 to 8 and the output stage elements 9 to 11 for the three phases of the upper arm. Are formed in the semiconductor islands 18 to 20 for each phase, and the level shift circuit 12, the lower arm drive circuit 13, and the lower arm output stage element 21 are respectively formed in the other semiconductor islands.

Between the semiconductor islands in which the drive circuits for the upper arm switching elements are formed, and between these semiconductor islands and the semiconductor islands in which the drive circuits for the lower arm switching elements are formed. The exposed portion 22 of the polysilicon substrate, which is exposed to the first side, is wider than the exposed portion of the polysilicon substrate in the other isolation portion and has a strip shape so as to provide a contact according to the present invention.

At the exposed portion 22 of the polysilicon substrate,
As shown in the enlarged views and cross-sectional views of FIGS. 2 and 3, a metal wiring 24 connected to GND or a constant potential is provided, and a contact 25 is provided at least at one position thereof, so that the potential of the polysilicon substrate 27 is increased. Is fixed to GND or a constant potential. The contact 25 electrically connects the metal wiring 24 on the contact 25 to the polysilicon substrate 27 through the n-type or p-type high-concentration semiconductor layer 26 provided on the polysilicon substrate. Further, the contact 25 is formed by providing a step in the protective oxide film 17 provided on the surface of the substrate and forming a metal wiring 24 in that portion in order to reduce the coverage of the contact wiring.

When the first embodiment of the present invention configured as described above is applied to an inverter drive device operating in an inverter module having a main power source obtained by rectifying a commercial 200V AC power source, as already described. In addition, due to the ripple of the power supply, the voltage of the regenerative power of the power supply, the jumping voltage due to the inductance of the wiring in the module, etc., the semiconductor island in which each drive circuit and the like are formed has a maximum of 400 to 600.
A voltage fluctuation of V may be added.

For example, in FIG. 6, when the U-phase lower arm switching element 5 is in the ON state and the V-phase lower arm switching element 4 is in the ON state, only the V-phase lower arm switching element 4 is in the OFF state. In 3, U
The potential of the semiconductor island 18 in which the phase upper arm drive circuit is formed is GND or the power supply potential (15 V), and the potential of the semiconductor island in which the V phase lower arm drive circuit is formed is GND.
Alternatively, from the state of the power supply potential, the potential of the semiconductor island 19 on which the V-phase upper arm drive circuit is formed rapidly increases from 280V to max.
May rise to 600V. At this time, a noise current of Cdv / dt is generated due to the parasitic capacitance C of the oxide film 16 separating each semiconductor island and the voltage increase dv / dt, and a semiconductor in which the V-phase upper arm drive circuit is formed. It flows out from the island 19 to the polysilicon substrate 27.

However, according to the above-described embodiment of the present invention, since the potential of the polysilicon substrate 27 is fixed at GND or a constant potential, the noise current is absorbed by this potential and the U-phase upper arm drive circuit is absorbed. Therefore, it is possible to prevent mutual interference and malfunction from being taken in by the semiconductor island 18 in which is formed.

Similarly, it is possible to prevent the noise current from affecting the circuits in other semiconductor islands.

FIG. 4 is a diagram for explaining the second embodiment of the present invention, and the reference numerals in the figure are the same as those in FIG.

The second embodiment of the present invention is an example in which a metal wiring 24 is provided along the exposed portion 22 of the polysilicon substrate separating the respective semiconductor islands.

In this embodiment, the wiring between each phase of the upper arm drive circuit which causes a high potential difference and the wiring of the upper arm drive circuit and the lower arm drive circuit generate a parasitic capacitance through the oxide film 17 on the polysilicon substrate. Therefore, in order to reduce the parasitic capacitance between the wirings having a high potential difference, the metal wiring 24 is provided along the exposed portion 22 of the polysilicon substrate, and the contact 25 is provided at at least one position thereof. It is a thing.

FIG. 5 is a diagram for explaining the third embodiment of the present invention, which is an example in which the contacts 25 are provided at the corners of four semiconductor islands.

By providing the contacts 25 at the corners of the four semiconductor islands in this manner, the width of the polysilicon substrate between the semiconductor islands, which is widely used for installing the contacts 25, can be reduced, and the chip area can be reduced. Can be reduced.

Further, the contact 25 is provided with a step 28 in the oxide film such that the step shape is within the corner of the dielectric isolation island, and the metal wiring 24 is applied to the isolation oxide film of the semiconductor island. It is designed so that the dielectric strength does not drop.

In each of the above-described embodiments of the present invention, a plurality of contacts 25 can be provided as needed. Further, in the above-described embodiment of the present invention, the driving circuit is configured monolithically within one semiconductor island, but the present invention defines the inside of the semiconductor island as a semiconductor island group having a plurality of semiconductor islands. Alternatively, the driving circuit may be configured.

Although the above-described embodiments of the present invention have been described as those in which the present invention is applied to a circuit for driving a switching element of an inverter, the present invention can be applied to various devices including power switching elements in upper and lower arms. It can also be applied to a drive circuit of a switching element and the like.

[0038]

As described above, according to the present invention, it is used in a drive circuit of a switching element such as a power converter having a power switching element in the upper and lower arms, and the elements between the drive circuits and in the upper arm. It is possible to provide a semiconductor integrated circuit device capable of preventing a mutual operation between each phase of the drive circuit and a malfunction due to noise and performing a stable operation.

[Brief description of drawings]

FIG. 1 is a diagram showing a functional layout of an inverter drive device having a monolithic structure according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a first embodiment of the present invention in which an A portion of FIG. 1 is enlarged.

FIG. 3 is a sectional view taken along line BB of FIG.

FIG. 4 is a diagram illustrating a second embodiment of the present invention.

FIG. 5 is a diagram illustrating a third embodiment of the present invention.

FIG. 6 shows I as a switching element for explaining a conventional technique.
It is a block diagram which shows the structure of the three-phase inverter which uses GBT.

FIG. 7 is a cross-sectional view of a dielectric isolation substrate showing a part of the configuration of a conventional driver IC in which a drive circuit is configured by one chip.

[Explanation of symbols]

 1 Main Power Supply 2 Upper Arm Switching Element 3-5 Lower Arm Switching Element 6-8 Upper Arm Drive Circuit 9-11, 21 Output Stage Element 12 Level Shift Circuit 13 Lower Arm Drive Circuit 16, 17 Oxide Film 18-20 Semiconductor Island 22 Exposed part of polysilicon substrate 24 Metal wiring 25 Contact 26 High concentration semiconductor layer 27 Polysilicon substrate

Claims (5)

[Claims] 1. A semiconductor integrated circuit device comprising a plurality of semiconductor islands in a dielectric isolation substrate, each of which is provided with a drive circuit for driving a switching element forming an upper arm and a lower arm. A semiconductor integrated circuit device characterized in that a contact is provided at at least one portion of an exposed portion of polysilicon which is a support of a semiconductor island exposed at the above, and thereby the potential of the polysilicon is fixed to GND or a constant potential. 2. The contact connects polysilicon to GND or a metal wiring connected to a constant potential through an n-type or p-type high-concentration impurity semiconductor layer provided on the surface of polysilicon. 2. The semiconductor integrated circuit device according to claim 1, wherein 3. A semiconductor integrated circuit device in which a drive circuit for driving a switching element forming an upper arm and a lower arm is formed on a plurality of semiconductor islands in a dielectric isolation substrate. A contact is provided on at least one of exposed portions of polysilicon, which is a support of the semiconductor island exposed on the substrate, and the exposed portion on which the contact is provided has a band shape wider than other exposed portions. A semiconductor integrated circuit device in which the potential of silicon is fixed to GND or a constant potential. 4. A semiconductor integrated circuit device in which a drive circuit for driving a switching element forming an upper arm and a lower arm is formed on a plurality of semiconductor islands in a dielectric isolation substrate. It is characterized in that the metal wiring is provided on the exposed portion of the polysilicon which is the support of the semiconductor island exposed on the surface and the contact is provided at at least one place, thereby fixing the potential of the polysilicon to GND or a constant potential. Semiconductor integrated circuit device. 5. The semiconductor integrated circuit device according to claim 1, wherein the contacts are provided at corners of four semiconductor islands.