JPH06191989A - Production of semiconductor crystal thin film - Google Patents

Production of semiconductor crystal thin film

Info

Publication number
JPH06191989A
JPH06191989A JP34766592A JP34766592A JPH06191989A JP H06191989 A JPH06191989 A JP H06191989A JP 34766592 A JP34766592 A JP 34766592A JP 34766592 A JP34766592 A JP 34766592A JP H06191989 A JPH06191989 A JP H06191989A
Authority
JP
Japan
Prior art keywords
thin film
substrate
growth
semiconductor crystal
raw material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34766592A
Other languages
Japanese (ja)
Inventor
Tomohiro Shibata
知尋 柴田
Yasuyuki Nanishi
▲やす▼之 名西
Masatomo Fujimoto
正友 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP34766592A priority Critical patent/JPH06191989A/en
Publication of JPH06191989A publication Critical patent/JPH06191989A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide the single crystal thin film laminate structure having steep heterogeneous interfaces even at low temperatures by controlling the growth temperature of the thin film to <= a specific value and specifying both the feeding of raw material substances and the irradiation of atomic hydrogen, etc., or the feeding of the raw material substances, when an Sb,As-containing compound semiconductor crystal thin film-heterogeneous structure is produced on a substrate. CONSTITUTION:An InAs/GaSb heterogeneous thin film layer structure is produced by the use of e.g. an MBE device equipped with a tungsten heater 3. A GaSb wafer is used as a substrate 6, and after a high vacuum evacuation, the substrate 6 is held at a prescribed temperature lower than 400 deg.C. Raw material substances containing elements constituting the thin film are fed in prescribed feeding amounts, respectively. During the growth of the thin film, a prescribed flow volume of hydrogen gas is heated with a heater 3, and the generated atomic hydrogen 4 is irradiated on a substrate. Or, hydrogen plasma is irradiated on the substrate for the growth of the thin film. Or, the substrate 6 is held at a prescribed temperature below 400 deg.C, and prescribed amounts of the raw material substances containing the thin film-constituting elements are intermittently and alternately fed at preset time intervals for the growth of the thin film.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、異種の化合物半導体結
晶薄膜を積層したヘテロ構造に係り、さらに詳しくは急
峻な界面を有するヘテロ構造の作製方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a heterostructure in which different kinds of compound semiconductor crystal thin films are laminated, and more particularly to a method for producing a heterostructure having a steep interface.

【0002】[0002]

【従来の技術】InAs/GaSbに代表される、アン
チモンを構成元素として含む化合物半導体結晶薄膜と、
ヒ素を構成元素として含む化合物半導体結晶薄膜とを交
互に積層して作られる超格子構造(いわゆる type II
超格子)は、電子と正孔が空間的に分離して存在すると
いう特徴を持ち、量子効果応用デバイスなど新しい機能
を有するデバイスを実現させる材料系として有望視され
ている。この超格子構造を用いて作製したデバイスが所
期の性能を発揮するためには、超格子を構成する各層間
の界面(ヘテロ界面)が急峻であることが必要条件とな
る。なお、このような化合物半導体結晶薄膜の積層構造
の作製は、通常の場合、分子線エピタキシ(Molecular
Beam Epitaxy:以下MBEと言う。)法によって作製さ
れている。
2. Description of the Related Art A compound semiconductor crystal thin film represented by InAs / GaSb and containing antimony as a constituent element,
A superlattice structure (so-called type II) formed by alternately stacking compound semiconductor crystal thin films containing arsenic as a constituent element.
The superlattice) has a feature that electrons and holes exist spatially separated from each other, and is regarded as a promising material system for realizing devices having new functions such as quantum effect application devices. In order for a device manufactured using this superlattice structure to exhibit the desired performance, it is a necessary condition that the interface (heterointerface) between the layers forming the superlattice is steep. In addition, the production of such a laminated structure of a compound semiconductor crystal thin film is usually performed by molecular beam epitaxy (Molecular
Beam Epitaxy: Hereinafter referred to as MBE. ) Method.

【0003】[0003]

【発明が解決しようとする課題】MBE法により、ヒ素
を含む化合物半導体結晶薄膜(以下InAsで代表し説
明する)を、アンチモンを含む化合物半導体結晶薄膜
(以下GaSbで代表し説明する)上に成長する場合、
必然的にヒ素がGaSb上に照射される。この場合のG
aSb内へのAsの侵入の様子を観測した結果を、図1
に示す。図1は、真空中でクヌーセンセルより固体ヒ素
を加熱昇華させてGaSb基板に照射した場合(照射量
は5×10~6Torr、5分間と一定である。)につい
て、X線励起光電子分光法(XPS:X-ray Photoelect
ron Spectroscopy)により測定したAs3d光電子信号
強度(cps:カウント/秒)と照射時のGaSb基板
の温度(℃)との関係を示したものである。図中の黒丸
印は、所定の基板温度でヒ素を照射した後のXPSの測
定結果であり、白丸印は、所定の基板温度でヒ素を照射
した後、さらに520℃で5分間の加熱処理を行った場
合の結果である。As3d光電子信号強度が大きいほ
ど、GaSb基板内部に侵入したヒ素量が多いことを意
味している。図1から明らかなように、ヒ素照射時の基
板温度が400℃より高くなると、As3d光電子強度
が急激に増加しており、As原子がGaSb基板に侵入
していることを示している。すなわち、InAs層をG
aSb上に成長する場合、400℃よりも高温ではAs
の侵入のためにInAs層とGaSbの界面の急峻性が
低下することを意味している。しかも、520℃の熱処
理を施しても As3d光電子信号強度の減少はわずか
であり、侵入したヒ素は熱的に安定であることを示して
いる。一方、400℃以下で照射した場合には、As3
d光電子信号強度は照射後、熱処理後とも小さく、なお
かつ熱処理前後での強度変化も小さい。このことは照射
されたヒ素はGaSb基板内部へ侵入せずに脱離してい
ることを示している。なお、室温照射の場合には照射後
の強度は400℃、200℃の場合より大きいが、熱処
理後はこれらの温度で照射した場合の熱処理後の強度と
ほぼ同じ強度となっている。このことから、室温の場合
照射されたヒ素の一部はGaSb基板上に堆積するが、
熱処理によって容易に脱離することを示している。以上
の結果より、InAs/GaSb積層構造作製におい
て、ヒ素の侵入の起こらない急峻なヘテロ界面を得るた
めには薄膜成長温度を400℃以下にする必要があるこ
とが分かる。しかしながら、通常のMBE法では400
℃以下でこれらの結晶薄膜の成長を行うことは、成長温
度が低すぎて一般的には困難である。すなわち、InA
s薄膜やGaSb薄膜はアモルファスになってしまい単
結晶が得られない。したがって、高品質のヘテロ積層構
造は得られず、作製したデバイスの特性も良好ではない
という問題があった。本発明の目的は、上記従来技術に
おける問題点を解消するものであって、ヒ素の侵入の起
こらない急峻なヘテロ界面が得られる化合物半導体結晶
薄膜の積層構造の作製方法を提供することにある。
By the MBE method, a compound semiconductor crystal thin film containing arsenic (hereinafter represented by InAs) is grown on a compound semiconductor crystal thin film containing antimony (hereinafter represented by GaSb). If you do
Arsenic is inevitably irradiated on GaSb. G in this case
Fig. 1 shows the results of observing how As entered into aSb.
Shown in. FIG. 1 shows a case where solid arsenic is heated and sublimated from a Knudsen cell in a vacuum to irradiate a GaSb substrate (irradiation amount is 5 × 10 to 6 Torr and is constant for 5 minutes). (XPS: X-ray Photoelect
2 shows the relationship between the As3d photoelectron signal intensity (cps: count / second) measured by ron spectroscopy and the temperature (° C.) of the GaSb substrate during irradiation. The black circles in the figure are the XPS measurement results after arsenic irradiation at a predetermined substrate temperature, and the white circles indicate heat treatment at 520 ° C. for 5 minutes after arsenic irradiation at a predetermined substrate temperature. It is the result when it went. It means that the larger the As3d photoelectron signal intensity, the larger the amount of arsenic that has penetrated into the GaSb substrate. As is clear from FIG. 1, when the substrate temperature during arsenic irradiation was higher than 400 ° C., the As3d photoelectron intensity increased sharply, indicating that As atoms penetrated into the GaSb substrate. That is, the InAs layer is
When growing on aSb, As is higher than 400 ° C.
It means that the steepness of the interface between the InAs layer and GaSb is lowered due to the invasion. Moreover, the decrease in the As3d photoelectron signal intensity was slight even after the heat treatment at 520 ° C., indicating that the invaded arsenic is thermally stable. On the other hand, when irradiated at 400 ° C. or lower, As3
The d photoelectron signal intensity is small both after irradiation and after heat treatment, and the change in intensity before and after heat treatment is small. This indicates that the irradiated arsenic is desorbed without entering the GaSb substrate. In the case of irradiation at room temperature, the intensity after irradiation is higher than that at 400 ° C. and 200 ° C., but after the heat treatment, it is almost the same as the intensity after heat treatment when irradiated at these temperatures. From this, at room temperature, part of the irradiated arsenic is deposited on the GaSb substrate,
It shows that it is easily desorbed by heat treatment. From the above results, it is understood that the thin film growth temperature needs to be 400 ° C. or lower in order to obtain a steep hetero interface in which arsenic does not enter in the fabrication of the InAs / GaSb laminated structure. However, it is 400 in the normal MBE method.
It is generally difficult to grow these crystal thin films at a temperature of not higher than 0 ° C. because the growth temperature is too low. That is, InA
The s thin film and the GaSb thin film become amorphous and a single crystal cannot be obtained. Therefore, there is a problem that a high quality hetero laminated structure cannot be obtained and the characteristics of the manufactured device are not good. An object of the present invention is to solve the above-mentioned problems in the prior art, and to provide a method for producing a laminated structure of a compound semiconductor crystal thin film capable of obtaining a steep hetero interface in which arsenic does not enter.

【0004】[0004]

【課題を解決するための手段】上記本発明の目的を達成
するために、ヒ素を構成元素として含む化合物半導体結
晶薄膜と、アンチモンを構成元素として含む化合物半導
体結晶薄膜とを積層して半導体結晶薄膜のヘテロ構造を
作製する方法において、薄膜の成長温度を400℃以下
にし、薄膜構成元素を含む原料物質の供給と同時に、原
子状水素または水素プラズマを照射して薄膜の成長を行
うか、あるいはヒ素を構成元素として含む化合物半導体
結晶薄膜と、アンチモンを構成元素として含む化合物半
導体結晶薄膜とを積層して半導体結晶薄膜のヘテロ構造
を作製する方法において、薄膜の成長温度を400℃以
下にし、それぞれの化合物半導体結晶薄膜の構成元素を
含む原料物質を、所定量、設定の時間間隔で間欠的に、
かつ交互に供給して薄膜の成長を行うものである。
In order to achieve the above object of the present invention, a semiconductor crystal thin film is formed by laminating a compound semiconductor crystal thin film containing arsenic as a constituent element and a compound semiconductor crystal thin film containing antimony as a constituent element. In the method for producing a heterostructure, the growth temperature of the thin film is set to 400 ° C. or lower, and at the same time as the supply of the raw material containing the thin film constituent elements, atomic hydrogen or hydrogen plasma is irradiated to grow the thin film, or arsenic is grown. In a method for producing a heterostructure of a semiconductor crystal thin film by laminating a compound semiconductor crystal thin film containing as a constituent element and a compound semiconductor crystal thin film containing antimony as a constituent element, the growth temperature of the thin film is set to 400 ° C. or lower, and A predetermined amount of a raw material containing the constituent elements of the compound semiconductor crystal thin film, intermittently at a set time interval,
Further, they are alternately supplied to grow a thin film.

【0005】[0005]

【作用】本発明のヘテロ多層薄膜の作製は、Sbを構成
元素として含む化合物半導体結晶薄膜中へのAs原子の
侵入を防止しつつ、400℃以下という低温においても
急峻なヘテロ界面を有する単結晶薄膜の積層構造が作製
できるという結晶成長特性を利用したものである。
The hetero-multilayer thin film of the present invention is manufactured by a single crystal having a steep hetero interface even at a low temperature of 400 ° C. or lower while preventing the entry of As atoms into the compound semiconductor crystal thin film containing Sb as a constituent element. It utilizes the crystal growth characteristic that a laminated structure of thin films can be produced.

【0006】[0006]

【実施例】以下に本発明の実施例を挙げ、図面を用いて
さらに詳細に説明する。 〈実施例1〉図2は、本実施例において薄膜の作製に用
いた薄膜成長装置の構成の一例を示したものである。図
2において、1は水素ガス導入口、2は水素ガスノズ
ル、3はタングステンヒータ、4は生成した原子状水
素、5はIn、As、Ga、Sbの各固体原料蒸発用セ
ル(クヌーセンセル)、6は薄膜成長用基板、7は薄膜
結晶成長室、8は排気ポンプへの連結口である。この薄
膜成長装置は、通常のMBE装置に水素ガスノズル2お
よび水素ガス加熱用のタングステンヒータ3を付加した
ものである。本薄膜成長装置を用いてInAs/GaS
bヘテロ薄膜積層構造の作製は、薄膜成長用基板6とし
て(100)方位のGaSbウェハを用い、高真空に排
気した後、上記基板6を所定の温度に保ち、薄膜構成元
素を含む原料物質を、それぞれ次に示す供給量で供給し
た。すなわち、金属インジウム……3×10~7Torr
(mmHg)、固体ヒ素……1.5×10~5Torr、
金属ガリウム……3×10~7Torr、金属アンチモン
……6×10~7Torrである。さらに薄膜成長中、流
量2sccm(cm3/分)の水素ガスをタングステン
ヒータ3により1800℃に加熱して、生成した原子状
水素4を基板に照射した。このような薄膜作製条件によ
り、膜厚120nmのInAs層14と膜厚120nm
のGaSb層15を1周期として4周期薄膜の成長を繰
り返し、図3に示す積層構造の化合物半導体結晶薄膜を
作製した。図4および図5は、作製したInAsとGa
Sbの積層構造の In、Ga、As、Sb原子の2次
イオン質量分析(SIMS:Secondary Ion Mass Spect
roscopy)の結果を示す。表面からの深さに対する2次
イオン強度の変化をプロットしてある。図4は基板温度
を350℃に、図5は500℃に設定した場合であり、
両者ともInAs層14、GaSb層15の薄膜成長中
に原子状水素4を照射している。図4の場合には、4元
素とも作製した構造通りの急峻に変化したプロファイル
が得られた。一方、図5の場合には、In、Gaは図4
の場合と同様の急峻なプロファイルを示すのに対し、A
sとSbはゆるやかなプロファイルとなっている。すな
わち、350℃成長の場合にはInAs層成長中に、A
sのGaSb層中への侵入が起こらず急峻なヘテロ界面
が得られているのに対し、500℃成長では顕著な侵入
がおこり、ヘテロ界面で周期表V族原子同志の混じり合
いが生じていることが分かる。すなわち、原子状水素を
供給し、かつ基板温度を400℃以下に設定することに
より、急峻な深さプロファイルを有するヘテロ薄膜積層
構造を作製することができることを示している。また、
350℃での成長薄膜の結晶性を観察するために、In
As層14、GaSb層15の薄膜成長途中で、原料お
よび原子状水素の供給を中断し、成長薄膜表面に高速電
子線を照射して、極表面層からの反射電子線回折(RH
EED:Reflection High Energy Electron Diffractio
n)像を観察した。 その結果、InAs層の成長の場
合には(2×4)の表面再構成を示すストリーク状の回
折パターンが、GaSb層の成長の場合には(1×3)
の表面再構成を示すストリーク状の回折パターンが観測
でき、両者共に単結晶薄膜が成長していることが確認で
きた。一方、原子状水素を照射せずに350℃で薄膜成
長を行った場合のRHEED像は、InAs層、GaS
b層共にハローパターンを示し、アモルファスの膜とな
り単結晶薄膜は得られなかった。
Embodiments of the present invention will be described below in more detail with reference to the drawings. Example 1 FIG. 2 shows an example of the configuration of a thin film growth apparatus used for producing a thin film in this example. In FIG. 2, 1 is a hydrogen gas inlet, 2 is a hydrogen gas nozzle, 3 is a tungsten heater, 4 is atomic hydrogen produced, 5 is a solid raw material evaporation cell (Knudsen cell) of In, As, Ga and Sb, Reference numeral 6 is a thin film growth substrate, 7 is a thin film crystal growth chamber, and 8 is a connection port to an exhaust pump. This thin film growth apparatus is a normal MBE apparatus in which a hydrogen gas nozzle 2 and a tungsten heater 3 for heating hydrogen gas are added. InAs / GaS using this thin film growth apparatus
In the fabrication of the b-hetero thin film laminated structure, a GaSb wafer having a (100) orientation is used as the thin film growth substrate 6, and after evacuating to a high vacuum, the substrate 6 is kept at a predetermined temperature and a raw material containing thin film constituent elements is added. , And were supplied at the respective supply amounts shown below. That is, metallic indium ... 3 × 10 to 7 Torr
(MmHg), solid arsenic ... 1.5 × 10 ~ 5 Torr,
Metallic gallium: 3 × 10 to 7 Torr, metallic antimony: 6 × 10 to 7 Torr. Further, during the thin film growth, a hydrogen gas at a flow rate of 2 sccm (cm 3 / min) was heated to 1800 ° C. by the tungsten heater 3, and the produced atomic hydrogen 4 was irradiated on the substrate. Under such a thin film forming condition, the InAs layer 14 having a film thickness of 120 nm and the film thickness of 120 nm are formed.
The GaSb layer 15 of 1 was used as one cycle to repeat growth of four cycles of the thin film to produce the compound semiconductor crystal thin film having the laminated structure shown in FIG. 4 and 5 show the fabricated InAs and Ga.
Secondary ion mass spectrometry (SIMS) of In, Ga, As, and Sb atoms in the laminated structure of Sb
roscopy) results. The change in secondary ionic strength with depth from the surface is plotted. FIG. 4 shows the case where the substrate temperature is set to 350 ° C. and FIG. 5 is set to 500 ° C.
Both of them are irradiated with atomic hydrogen 4 during the thin film growth of the InAs layer 14 and the GaSb layer 15. In the case of FIG. 4, a steeply changed profile was obtained according to the structure of all four elements. On the other hand, in the case of FIG. 5, In and Ga are
While showing a steep profile similar to the case of A,
s and Sb have a gentle profile. That is, in the case of 350 ° C. growth, A
While a steep hetero interface was obtained without invasion of s into the GaSb layer, remarkable intrusion occurred at 500 ° C. growth, resulting in mixing of group V atoms of the periodic table at the hetero interface. I understand. That is, it is shown that by supplying atomic hydrogen and setting the substrate temperature to 400 ° C. or lower, a hetero thin film laminated structure having a steep depth profile can be manufactured. Also,
In order to observe the crystallinity of the grown thin film at 350 ° C., In
During the thin film growth of the As layer 14 and the GaSb layer 15, the supply of the raw material and atomic hydrogen is interrupted, the surface of the grown thin film is irradiated with a high-speed electron beam, and the reflection electron beam diffraction (RH) from the pole surface layer is performed.
EED: Reflection High Energy Electron Diffractio
n) The image was observed. As a result, a streak-like diffraction pattern showing a surface reconstruction of (2 × 4) is obtained in the case of growing the InAs layer, and (1 × 3) in the case of growing the GaSb layer.
A streak-like diffraction pattern showing the surface reconstruction of was observed, and it was confirmed that a single crystal thin film was grown in both. On the other hand, the RHEED image obtained when the thin film growth was performed at 350 ° C. without irradiating atomic hydrogen shows the InAs layer and GaS.
Both the b layer showed a halo pattern and became an amorphous film, and a single crystal thin film could not be obtained.

【0007】〈実施例2〉図6は、本実施例において薄
膜の作製に用いた薄膜成長装置の構造の一例を示したも
のである。図6において、1は水素ガス導入口、9は矩
形マイクロ波導波管、10は石英製マイクロ波導入窓、
11は空洞共振器型プラズマ生成室、12は電磁石、1
3はプラズマ、6は薄膜成長用基板、5は固体原料蒸発
用セル(クヌーセンセル)、7は薄膜結晶成長室、8は
排気ポンプへの連結口である。本薄膜成長装置は、通常
のMBE成長室に、空洞共振器型プラズマ生成室11を
結合させた基本構造を有している。MBE成長室に隣接
して設けられた上記プラズマ生成室11において発生さ
せた水素プラズマ13を、薄膜成長用基板6へと輸送す
ることによりプラズマの照射を行った。すなわち、上記
プラズマ生成室11に、水素ガスとマイクロ波電力を導
入すると共に、生成室外部に設置された電磁石12より
磁場を印加して電子サイクロトロン共鳴(ECR:Elec
tron Cyclotron Resonance)条件を満足させることによ
り水素プラズマ13が発生する。発生した水素プラズマ
13は電磁石12が形成する発散磁界(プラズマ生成室
から基板に向かうにしたがい強度が小さくなる磁界強度
分布)により基板へと輸送される。本実施例における水
素プラズマ13の発生条件は、水素ガス流量10scc
m、マイクロ波周波数2.45GHz、マイクロ波電力
100W、プラズマ生成室における磁界強度875Ga
uss(ガウス)である。本薄膜成長装置を用いてIn
As/GaSbヘテロ薄膜積層構造の作製は、薄膜成長
用基板6として(100)方位のGaSbウェハを用
い、高真空に排気したのち基板を所定の温度に保ち、薄
膜構成元素を含む原料物質であるIn、As、Ga、S
bを、それぞれ実施例1に示した供給量で基板に照射
し、さらに薄膜成長中に上記の条件で発生させた水素プ
ラズマ13を基板上に照射した。作製した積層構造は、
膜厚120nmのInAs層と膜厚120nmのGaS
b層を1周期として4周期繰り返した実施例1の図3に
示すものと同様の構造であった。この水素プラズマ照射
下でMBE成長した積層構造のIn、Ga、As、Sb
各原子の2次イオン質量分析(SIMS)結果は、実施
例1の図4および図5と同様であった。すなわち、基板
温度350℃で成長した場合にはInAs成長中にAs
のGaSb中への侵入が起こらず急峻なヘテロ界面が得
られているのに対し、500℃成長では顕著な侵入がお
こり、ヘテロ界面でV族原子同志の混じり合いが生じ
た。すなわち、水素プラズマを照射し、かつ基板温度を
400℃以下に設定することにより、急峻なヘテロ界面
を有する薄膜積層構造を作製することができた。また、
実施例1の場合と同様に、350℃成長の場合に、水素
プラズマを照射した場合と照射しなかった場合につい
て、InAs層、GaSb層のRHEED観察を行った
結果、照射した場合には単結晶が成長していたが、照射
しなかった場合の薄膜はアモルファスとなっていること
が分かった。本実施例においては、InAs層、GaS
b層の原料には通常のMBE法と同じく 固体元素の原
料物質を用いたが、TMI(トリメチルインジウム)、
TEAs(トリエチルヒ素)、TMG(トリメチルガリ
ウム)、TESb(トリエチルスチビン)などの有機金
属原料を用い、薄膜成長中に水素プラズマを照射して4
00℃以下の低温での薄膜の成長は可能である。また、
水素希釈AsH3(アルシン)などを原料として用いれ
ば、原料とは別に水素ガスを供給しなくても原料ガスの
みでプラズマを生成することができ、これによっても低
温成長が可能である。このような薄膜成長方法も本発明
の趣旨に反するものではない。
<Embodiment 2> FIG. 6 shows an example of the structure of a thin film growth apparatus used for producing a thin film in this embodiment. In FIG. 6, 1 is a hydrogen gas introduction port, 9 is a rectangular microwave waveguide, 10 is a quartz microwave introduction window,
11 is a cavity resonator type plasma generation chamber, 12 is an electromagnet, 1
Reference numeral 3 is plasma, 6 is a thin film growth substrate, 5 is a solid material evaporation cell (Knudsen cell), 7 is a thin film crystal growth chamber, and 8 is a connection port to an exhaust pump. This thin film growth apparatus has a basic structure in which a cavity resonator type plasma generation chamber 11 is connected to an ordinary MBE growth chamber. Plasma was irradiated by transporting the hydrogen plasma 13 generated in the plasma generation chamber 11 provided adjacent to the MBE growth chamber to the thin film growth substrate 6. That is, hydrogen gas and microwave power are introduced into the plasma generation chamber 11, and a magnetic field is applied from an electromagnet 12 installed outside the generation chamber to apply electron cyclotron resonance (ECR: Elec).
Hydrogen plasma 13 is generated by satisfying the tron Cyclotron Resonance condition. The generated hydrogen plasma 13 is transported to the substrate by a divergent magnetic field formed by the electromagnet 12 (a magnetic field intensity distribution in which the intensity decreases from the plasma generation chamber toward the substrate). The generation condition of the hydrogen plasma 13 in the present embodiment is that the hydrogen gas flow rate is 10 sccc.
m, microwave frequency 2.45 GHz, microwave power 100 W, magnetic field strength 875 Ga in plasma generation chamber
It is uss (Gauss). In using this thin film growth apparatus
In the fabrication of the As / GaSb hetero thin film laminated structure, a GaSb wafer having a (100) orientation is used as the thin film growth substrate 6, and after evacuation to a high vacuum, the substrate is kept at a predetermined temperature and is a raw material containing thin film constituent elements. In, As, Ga, S
The substrate was irradiated with b in the supply amounts shown in Example 1, and further, the hydrogen plasma 13 generated under the above conditions during the thin film growth was irradiated on the substrate. The produced laminated structure is
120 nm thick InAs layer and 120 nm thick GaS
The structure was the same as that shown in FIG. 3 of Example 1 in which four cycles were repeated with the b layer as one cycle. The In, Ga, As, and Sb of the laminated structure grown by MBE under this hydrogen plasma irradiation
The results of secondary ion mass spectrometry (SIMS) of each atom were the same as those in FIG. 4 and FIG. 5 of Example 1. That is, when the substrate was grown at a temperature of 350 ° C., As was grown during InAs growth.
While a steep hetero-interface was obtained without invasion of GaSb into GaSb, remarkable intrusion occurred at 500 ° C. growth, resulting in mixing of V group atoms at the hetero-interface. That is, by irradiating with hydrogen plasma and setting the substrate temperature at 400 ° C. or lower, a thin film laminated structure having a steep hetero interface could be manufactured. Also,
Similar to the case of Example 1, RHEED observation of the InAs layer and the GaSb layer was performed for the case of hydrogen plasma irradiation and the case of non-irradiation in the case of 350 ° C. growth. Was grown, but it was found that the thin film without irradiation was amorphous. In this embodiment, an InAs layer and GaS are used.
As the raw material of the layer b, the raw material of the solid element was used as in the usual MBE method, but TMI (trimethylindium),
Organic metal raw materials such as TEAs (triethylarsenic), TMG (trimethylgallium), and TESb (triethylstibine) are used to irradiate hydrogen plasma during thin film growth.
It is possible to grow thin films at low temperatures below 00 ° C. Also,
If hydrogen-diluted AsH 3 (arsine) or the like is used as a raw material, plasma can be generated only with the raw material gas without supplying the hydrogen gas separately from the raw material, which also enables low temperature growth. Such a thin film growth method is not contrary to the gist of the present invention.

【0008】〈実施例3〉本実施例においては、MBE
装置を用いて低温でヘテロ薄膜積層構造を作製する場合
の一例について説明する。上述したように、通常のMB
E法で、単に成長温度を400℃以下にしただけで得ら
れるInAs層やGaSb層は、単結晶ではなくアモル
ファスになってしまい良好な積層構造が実現できない。
このため、MBE成長中の薄膜構成元素を含む原料物質
の供給方法を検討した結果、原料物質の基板上でのマイ
グレーション作用を促進させることにより400℃以下
でも結晶性に優れた薄膜からなる積層構造を作製できる
ことが判明した。通常のMBE装置で、(100)方位
のGaSb基板を所定の温度に設定した後、薄膜構成元
素を含む原料物質の供給を、図7に示すように時間的に
制御することによって、InAs/GaSb積層構造を
作製した。 In、As、Ga、Sbの供給量は、実施
例1と同様である。原料物質の供給、中断は各セルの出
口に設けられたシャッタにより、以下のように制御し
た。すなわち、InAs層成長時においてはIn供給1
秒間、中断2秒間、As供給1秒間、中断2秒間である
〔図7(a)、(b)〕。また、GaSb層成長時にお
いては、Ga供給1秒間、中断2秒間、Sb供給1秒
間、中断2秒間である〔図7(c)、(d)〕。さら
に、InAs層からGaSb層への切り替え時の中断2
秒間、 GaSb層からInAs層への切り替え時の中
断1秒間とした。この成長シーケンスを所望の厚さの薄
膜が得られるまで繰り返し行った。なお、図7において
原料供給シーケンスを簡単に表示するため、実際の原料
供給量によらず縦軸の高さを同じに表現してある。作製
した積層構造は、厚さ120nmのInAs層と厚さ1
20nmの GaSb層を1周期として4周期繰り返し
た実施例1で示した図3と同様の構造である。この原料
供給の時間制御によって作製した積層構造の In、A
s、Ga、Sbの各原子の2次イオン質量分析(SIM
S)の結果は、実施例1で示した図4および図5とほぼ
同様であった。すなわち、基板温度350℃で成長した
場合には、InAs層成長中にAsのGaSb層中への
侵入が起こらず、急峻なヘテロ界面が得られているのに
対し、500℃成長では顕著な侵入が起こりヘテロ界面
でV族原子同志の混じり合いが生じた。このように、原
料を時間的に交互に供給し、かつ基板温度を400℃以
下にすることにより、急峻なヘテロ界面を有する積層構
造を作製することができた。また、実施例1と同様、3
50℃成長の場合に交互供給した場合と、交互供給しな
かった場合についてのInAs層、GaSb層のRHE
ED観察を行った結果、交互供給した場合には単結晶が
成長していたが、交互供給しなかった場合には薄膜はア
モルファスとなっていることが分かった。以上の実施例
1、2および3においては、InAs/GaSbを繰り
返した積層構造の場合について説明したが、単にGaS
b基板上に、InAs層を成長するだけの場合において
も本発明の方法が有効であることは明らかである。ま
た、InAs/GaSbだけでなく、GaAs/GaS
b、AlAs/GaSb、InAs/InSb、GaA
s/InSb、AlAs/InSbなどの積層構造やI
nGaAsSb/AlGaAsSbという四元混晶同志
の積層構造においても本発明の方法を適用することによ
り、組成変化の急峻なヘテロ界面が得られることは言う
までもない。
<Embodiment 3> In this embodiment, MBE
An example of manufacturing a hetero thin film laminated structure at low temperature using the apparatus will be described. As mentioned above, normal MB
The InAs layer and the GaSb layer obtained by the E method simply by setting the growth temperature to 400 ° C. or less are not single crystals but amorphous, so that a good laminated structure cannot be realized.
Therefore, as a result of studying a method of supplying a raw material containing a thin film constituent element during MBE growth, a laminated structure composed of thin films excellent in crystallinity even at 400 ° C. or lower by promoting a migration action of the raw material on the substrate. It was found that After the GaSb substrate with the (100) orientation was set to a predetermined temperature with a normal MBE apparatus, the supply of the raw material containing the thin film constituent elements was controlled in time as shown in FIG. 7 to obtain InAs / GaSb. A laminated structure was produced. The supply amounts of In, As, Ga and Sb are the same as those in the first embodiment. The supply and interruption of the raw material were controlled as follows by the shutter provided at the outlet of each cell. That is, the In supply 1 during the growth of the InAs layer 1
Seconds, interruption 2 seconds, As supply 1 second, interruption 2 seconds [Fig. 7 (a), (b)]. In addition, during the growth of the GaSb layer, the Ga supply is 1 second, the interruption is 2 seconds, the Sb supply is 1 second, and the interruption is 2 seconds [FIGS. 7C and 7D]. Furthermore, interruption 2 when switching from the InAs layer to the GaSb layer 2
Second, the switching from the GaSb layer to the InAs layer was interrupted for 1 second. This growth sequence was repeated until a thin film having a desired thickness was obtained. Note that, in FIG. 7, in order to simply display the raw material supply sequence, the height of the vertical axis is expressed the same regardless of the actual raw material supply amount. The manufactured laminated structure has an InAs layer with a thickness of 120 nm and a thickness of 1
The structure is the same as that of FIG. 3 shown in Example 1 in which four cycles of a 20 nm GaSb layer are repeated. In, A of the laminated structure produced by controlling the time of this raw material supply
Secondary ion mass spectrometry (SIM) of each atom of s, Ga, and Sb
The result of (S) was almost the same as that of FIG. 4 and FIG. 5 shown in Example 1. That is, when grown at a substrate temperature of 350 ° C., As does not enter into the GaSb layer during growth of the InAs layer and a steep hetero interface is obtained, whereas at 500 ° C. growth, remarkable penetration occurs. Occurred, and a mixture of group V atoms occurred at the hetero interface. As described above, by alternately supplying the raw materials temporally and setting the substrate temperature to 400 ° C. or lower, a laminated structure having a steep hetero interface could be manufactured. In addition, as in Example 1, 3
RHE of InAs layer and GaSb layer in the case of alternate supply in the case of 50 ° C. growth and in the case of no alternate supply
As a result of ED observation, it was found that a single crystal was grown when alternately supplied, but the thin film was amorphous when not alternately supplied. In the above-mentioned Examples 1, 2 and 3, the case of the laminated structure in which InAs / GaSb is repeated has been described, but it is simply GaS.
It is clear that the method of the present invention is effective even when the InAs layer is simply grown on the b substrate. Moreover, not only InAs / GaSb but also GaAs / GaS
b, AlAs / GaSb, InAs / InSb, GaA
s / InSb, AlAs / InSb, etc.
It is needless to say that the hetero interface having a sharp composition change can be obtained by applying the method of the present invention even to a laminated structure of nGaAsSb / AlGaAsSb of quaternary mixed crystals.

【0009】[0009]

【発明の効果】以上詳細に説明したごとく、本発明のA
sを構成元素として含む化合物半導体結晶薄膜とアンチ
モンを構成元素として含む化合物半導体結晶薄膜とを積
層したヘテロ構造の作製方法によれば、Asの侵入の起
こらない急峻な界面を有するヘテロ構造を作製すること
ができ、高性能の化合物半導体結晶薄膜が得られる。
As described above in detail, the A of the present invention
According to the method for producing a hetero structure in which a compound semiconductor crystal thin film containing s as a constituent element and a compound semiconductor crystal thin film containing antimony as a constituent element are stacked, a hetero structure having a steep interface in which As does not enter is prepared. Thus, a high-performance compound semiconductor crystal thin film can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】As照射したGaSb基板からのAs3d強度
の照射時の基板温度に対する依存性を示した図。
FIG. 1 is a diagram showing the dependence of As3d intensity from a GaSb substrate irradiated with As on the substrate temperature during irradiation.

【図2】本発明の実施例1において用いた薄膜成長装置
の構成の一例を示す模式図。
FIG. 2 is a schematic diagram showing an example of the configuration of a thin film growth apparatus used in Example 1 of the present invention.

【図3】本発明の実施例1で作製したInAs/GaS
b積層構造の構成を示す模式図。
FIG. 3 shows InAs / GaS produced in Example 1 of the present invention.
b A schematic diagram showing the configuration of a laminated structure.

【図4】本発明の実施例1で作製(350℃で成長)し
たInAs/GaSb積層構造における各元素の濃度の
深さ方向の分布を示す図。
FIG. 4 is a diagram showing the distribution of the concentration of each element in the depth direction in the InAs / GaSb laminated structure produced (grown at 350 ° C.) in Example 1 of the present invention.

【図5】本発明の実施例1で作製(500℃で成長)し
たInAs/GaSb積層構造における各元素の濃度の
深さ方向の分布を示す図。
FIG. 5 is a diagram showing the distribution of the concentration of each element in the depth direction in the InAs / GaSb laminated structure produced (grown at 500 ° C.) in Example 1 of the present invention.

【図6】本発明の実施例2において用いた薄膜成長装置
の構成の一例を示す模式図。
FIG. 6 is a schematic diagram showing an example of the configuration of a thin film growth apparatus used in Example 2 of the present invention.

【図7】本発明の実施例3において用いた原料供給シー
ケンスを示す説明図。
FIG. 7 is an explanatory diagram showing a raw material supply sequence used in Example 3 of the present invention.

【符号の説明】[Explanation of symbols]

1…水素ガス導入口 2…水素ガスノズル 3…タングステンヒータ 4…原子状水素 5…固体原料蒸発用セル(クヌーセンセル) 6…薄膜成長用基板 7……薄膜結晶成長室 8…排気ポンプへの連結口 9…矩形マイクロ波導波管 10…石英製マイクロ波導入窓 11…空洞共振器型プラズマ生成室 12…電磁石 13…水素プラズマ 14…InAs層 15…GaSb層 16…GaSb基板 1 ... Hydrogen gas inlet 2 ... Hydrogen gas nozzle 3 ... Tungsten heater 4 ... Atomic hydrogen 5 ... Solid source evaporation cell (Knudsen cell) 6 ... Thin film growth substrate 7 ... Thin film crystal growth chamber 8 ... Exhaust pump connection Mouth 9 ... Rectangular microwave waveguide 10 ... Quartz microwave introduction window 11 ... Cavity resonator type plasma generation chamber 12 ... Electromagnet 13 ... Hydrogen plasma 14 ... InAs layer 15 ... GaSb layer 16 ... GaSb substrate

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】薄膜成長室に所定の基板を配設し、該基板
上にアンチモンを構成元素として含む化合物半導体結晶
薄膜と、ヒ素を構成元素として含む化合物半導体結晶薄
膜とを積層して半導体結晶薄膜のヘテロ構造を作製する
方法において、上記化合物半導体結晶薄膜の成長温度を
400℃以下に保持し、薄膜構成元素を含む原料物質の
供給と同時に原子状水素もしくは水素プラズマを上記基
板上に照射して薄膜の成長を行う工程を少なくとも含む
ことを特徴とする半導体結晶薄膜の作製方法。
1. A semiconductor crystal in which a predetermined substrate is disposed in a thin film growth chamber, and a compound semiconductor crystal thin film containing antimony as a constituent element and a compound semiconductor crystal thin film containing arsenic as a constituent element are stacked on the substrate. In the method for producing a heterostructure of a thin film, the growth temperature of the compound semiconductor crystal thin film is maintained at 400 ° C. or lower, and atomic hydrogen or hydrogen plasma is irradiated onto the substrate at the same time as the supply of a raw material containing thin film constituent elements. A method for producing a semiconductor crystal thin film, comprising at least a step of growing a thin film by means of a method.
【請求項2】薄膜成長室に所定の基板を配設し、該基板
上にアンチモンを構成元素として含む化合物半導体結晶
薄膜と、ヒ素を構成元素として含む化合物半導体結晶薄
膜とを積層して半導体結晶薄膜のヘテロ構造を作製する
方法において、上記化合物半導体結晶薄膜の成長温度を
400℃以下に保持し、上記それぞれの薄膜構成元素を
含む原料物質を、所定量、設定の時間間隔で間欠的に、
かつ交互に上記基板上に供給して薄膜の成長を行う工程
を少なくとも含むことを特徴とする半導体結晶薄膜の作
製方法。
2. A semiconductor crystal in which a predetermined substrate is provided in a thin film growth chamber, and a compound semiconductor crystal thin film containing antimony as a constituent element and a compound semiconductor crystal thin film containing arsenic as a constituent element are laminated on the substrate. In a method for producing a heterostructure of a thin film, the growth temperature of the compound semiconductor crystal thin film is maintained at 400 ° C. or lower, a raw material containing each of the thin film constituent elements, a predetermined amount, intermittently at a set time interval,
A method for producing a semiconductor crystal thin film, which further comprises at least a step of alternately supplying onto the substrate to grow a thin film.
JP34766592A 1992-12-28 1992-12-28 Production of semiconductor crystal thin film Pending JPH06191989A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34766592A JPH06191989A (en) 1992-12-28 1992-12-28 Production of semiconductor crystal thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34766592A JPH06191989A (en) 1992-12-28 1992-12-28 Production of semiconductor crystal thin film

Publications (1)

Publication Number Publication Date
JPH06191989A true JPH06191989A (en) 1994-07-12

Family

ID=18391760

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34766592A Pending JPH06191989A (en) 1992-12-28 1992-12-28 Production of semiconductor crystal thin film

Country Status (1)

Country Link
JP (1) JPH06191989A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110166758A1 (en) * 2010-01-04 2011-07-07 Gm Global Technology Operations, Inc. Stochastic detection of torque converter slip speed and related control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20110166758A1 (en) * 2010-01-04 2011-07-07 Gm Global Technology Operations, Inc. Stochastic detection of torque converter slip speed and related control
US8447508B2 (en) * 2010-01-04 2013-05-21 GM Global Technology Operations LLC Stochastic detection of torque converter slip speed and related control

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