JPH06188198A - Epitaxial growth method - Google Patents

Epitaxial growth method

Info

Publication number
JPH06188198A
JPH06188198A JP33705592A JP33705592A JPH06188198A JP H06188198 A JPH06188198 A JP H06188198A JP 33705592 A JP33705592 A JP 33705592A JP 33705592 A JP33705592 A JP 33705592A JP H06188198 A JPH06188198 A JP H06188198A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
film
epitaxial growth
susceptor
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP33705592A
Other languages
Japanese (ja)
Inventor
Kenji Tsuji
謙二 辻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP33705592A priority Critical patent/JPH06188198A/en
Publication of JPH06188198A publication Critical patent/JPH06188198A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide an epitaxial growing method that allows film forming for out-dope prevention with ease, without special process and facility, and also allows forming of the out-dope prevention film and epitaxial growing in the same furnace continuously. CONSTITUTION:A susceptor 2 of an epitaxial growth device is provided with a polysilicon film 3 in advance, and a semiconductor wafer 4 is placed an it, then under hydrogen atmasphere of high temperature, a part of the palycilicon film 3 is stuck to at least the rear side of the semiconductor wafer, as a film far preventing out-dope. Then, with the conventional method, a semiconductor crystal layer 9 is epitaxial-grown.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体ウエハ上に半導体
結晶層を成長させるエピタキシャル成長法に関する。さ
らに詳しくは、不純物が高濃度にドープされた低比抵抗
の半導体ウエハ上に高抵抗の半導体結晶層を成長させる
エピタキシャル成長法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an epitaxial growth method for growing a semiconductor crystal layer on a semiconductor wafer. More specifically, the present invention relates to an epitaxial growth method for growing a high-resistance semiconductor crystal layer on a low-resistivity semiconductor wafer that is heavily doped with impurities.

【0002】[0002]

【従来の技術】従来半導体ウエハの表面に単結晶の半導
体結晶層をエピタキシャル成長するばあい、半導体ウエ
ハを載置したサセプタを成長炉内に設置し、成長ガスと
不純物とするドーパントガスをキャリヤガスと共に成長
炉内に導入し、高温で反応させることにより、半導体ウ
エハ上に半導体単結晶層を成長させている。
2. Description of the Related Art Conventionally, when a single crystal semiconductor crystal layer is epitaxially grown on the surface of a semiconductor wafer, a susceptor on which the semiconductor wafer is placed is placed in a growth furnace, and a growth gas and a dopant gas as an impurity are used together with a carrier gas. A semiconductor single crystal layer is grown on a semiconductor wafer by introducing it into a growth furnace and reacting it at a high temperature.

【0003】このばあい、不純物濃度が高く比抵抗の小
さい半導体ウエハの表面にたとえば比抵抗が数百倍以上
の不純物濃度が低い半導体結晶層をエピタキシャル成長
するときは、エピタキシャル成長中に高温のため半導体
ウエハから成長炉内に不純物がアウトドーピングしてそ
のガスが成長ガスに混ざって成長したり、半導体層のエ
ピタキシャル成長中に半導体ウエハから成長層に直接不
純物が拡散するオートドーピングが起り、エピタキシャ
ル成長層の不純物濃度を一定に成長させることが困難で
ある。
In this case, when, for example, a semiconductor crystal layer having a low resistivity of several hundreds of times or more of resistivity is epitaxially grown on the surface of a semiconductor wafer having a high concentration of impurities and a low resistivity, the semiconductor wafer has a high temperature during the epitaxial growth. Impurity out-doping into the growth furnace and the gas mixes with the growth gas to grow, and during semiconductor layer epitaxial growth, auto-doping occurs where impurities directly diffuse from the semiconductor wafer to the growth layer, causing the impurity concentration in the epitaxial growth layer. Is difficult to grow constantly.

【0004】不純物のアウトドープなどを防止するため
に、従来よりエピタキシャル成長を行う前に、あらかじ
め半導体ウエハの裏面に酸化膜、チッ化膜またはポリシ
リコン膜などの単層または多層のアウトドープ防止膜を
形成することにより、半導体ウエハから成長炉内を経由
してエピタキシャル成長する半導体結晶層への拡散を防
止している。
In order to prevent out-doping of impurities, a single-layer or multi-layer out-doping prevention film such as an oxide film, a nitride film or a polysilicon film is previously formed on the back surface of a semiconductor wafer before the epitaxial growth. By forming it, diffusion from the semiconductor wafer to the semiconductor crystal layer epitaxially grown via the inside of the growth furnace is prevented.

【0005】[0005]

【発明が解決しようとする課題】しかし、叙上のアウト
ドープ防止膜を半導体ウエハの裏面のみに形成させ、エ
ピタキシャル成長が行われる半導体ウエハの表面には形
成させないようにするためには、半導体ウエハの両面に
酸化膜、チッ化膜またはポリシリコン膜などの保護膜を
形成したのち、半導体ウエハの表面に付着した防止膜を
除去しなければならない。したがってこれらの処理を行
うためのエピタキシャル成長工程とは連続できない複数
の工程と専用の設備が必要となり、製造コストの増大に
つながる。
However, in order to form the above outdoping prevention film only on the back surface of the semiconductor wafer and not on the front surface of the semiconductor wafer on which epitaxial growth is performed, the After forming a protective film such as an oxide film, a nitride film or a polysilicon film on both surfaces, the protective film attached to the surface of the semiconductor wafer must be removed. Therefore, a plurality of processes that are not continuous with the epitaxial growth process for performing these processes and dedicated equipment are required, which leads to an increase in manufacturing cost.

【0006】本発明では、かかる問題を解消し、事前の
ウエハ加工工程を必要としないで、簡単にアウトドープ
防止用の膜を形成し、しかもアウトドープ防止膜の形成
とエピタキシャル成長を連続的に行うことができるエピ
タキシャル成長法を提供することを目的とする。
According to the present invention, such a problem is solved and a film for preventing out-doping is easily formed without requiring a wafer processing step in advance, and furthermore, the formation of the out-doping preventing film and the epitaxial growth are continuously performed. It is an object of the present invention to provide an epitaxial growth method that can be performed.

【0007】[0007]

【課題を解決するための手段】本発明のエピタキシャル
成長法は、低比抵抗の半導体ウエハ表面に半導体結晶層
を成長させるエピタキシャル成長法であって、(a)低
比抵抗の半導体ウエハを載置するサセプタの該半導体ウ
エハの載置場所にポリシリコン膜を設け、(b)該サセ
プタ上に前記半導体ウエハを載置して高温の水素ガス雰
囲気下で前記半導体ウエハの少なくとも裏面に前記ポリ
シリコン膜の一部を付着させ、(c)引き続き成長ガス
を導入して前記半導体ウエハの表面に半導体結晶層をエ
ピタキシャル成長せしめることを特徴とするものであ
る。
The epitaxial growth method of the present invention is an epitaxial growth method in which a semiconductor crystal layer is grown on the surface of a semiconductor wafer having a low resistivity, and (a) a susceptor on which a semiconductor wafer having a low resistivity is mounted. A polysilicon film is provided at the place where the semiconductor wafer is placed, and (b) the semiconductor wafer is placed on the susceptor and one of the polysilicon films is provided on at least the back surface of the semiconductor wafer under a high-temperature hydrogen gas atmosphere. And (c) continuously introducing a growth gas to epitaxially grow a semiconductor crystal layer on the surface of the semiconductor wafer.

【0008】[0008]

【作用】本発明によれば、エピタキシャル成長装置のサ
セプタに、あらかじめポリシリコン膜を設け、その上に
半導体ウエハを載置して、高温の水素ガス雰囲気下で前
記半導体ウエハの裏面に前記ポリシリコン膜の一部を付
着させることにより、エピタキシャル成長装置内部で簡
単にアウトドープ防止用の膜を半導体ウエハの裏面など
に選択的に形成することができる。しかも膜を形成した
のちに、そのまま続けて成長ガスを導入しエピタキシャ
ル成長を行うことができる。
According to the present invention, a polysilicon film is provided in advance on a susceptor of an epitaxial growth apparatus, a semiconductor wafer is placed thereon, and the polysilicon film is formed on the back surface of the semiconductor wafer in a high-temperature hydrogen gas atmosphere. By depositing a part of the above, it is possible to easily and selectively form an outdoping prevention film on the back surface of the semiconductor wafer or the like inside the epitaxial growth apparatus. Moreover, after forming the film, the growth gas can be continuously introduced to perform epitaxial growth.

【0009】なお、エピタキシャル成長装置のサセプタ
は、高純度の炭化ケイ素がコーティングされているが、
使用に際して20μm程度のポリシリコン膜を付着してエ
ピタキシャル成長が行われている。これは、塩化水素ガ
スでエッチングする際の保護膜として使用し、サセプタ
の寿命を延ばし、かつ炭化ケイ素の微粉末の飛散を抑え
るなどの目的で形成されているものである。したがって
ポリシリコン膜の膜厚も薄く、エピタキシャル成長前に
半導体ウエハの裏面にアウトドーピングを目的とするポ
リシリコン膜を設けることは行われていない。
Although the susceptor of the epitaxial growth apparatus is coated with high-purity silicon carbide,
In use, a polysilicon film of about 20 μm is attached for epitaxial growth. This is used as a protective film when etching with hydrogen chloride gas, and is formed for the purpose of extending the life of the susceptor and suppressing the scattering of fine particles of silicon carbide. Therefore, the thickness of the polysilicon film is also small, and a polysilicon film for outdoping has not been provided on the back surface of the semiconductor wafer before the epitaxial growth.

【0010】[0010]

【実施例】つぎに図面を参照しながら本発明について説
明する。図1は、エピタキシャル成長装置の一例を示す
断面説明図、図2は半導体ウエハを載置するサセプタの
要部拡大断面図、図3は本発明のエピタキシャル成長法
における処理温度変化を示すグラフである。
The present invention will be described below with reference to the drawings. FIG. 1 is an explanatory sectional view showing an example of an epitaxial growth apparatus, FIG. 2 is an enlarged sectional view of an essential part of a susceptor on which a semiconductor wafer is mounted, and FIG. 3 is a graph showing a processing temperature change in the epitaxial growth method of the present invention.

【0011】まず、図1〜2に示されるエピタキシャル
成長装置1のサセプタ2上にポリシリコン膜3を形成す
る。ポリシリコン膜3の形成法として、たとえば、トリ
クロルシランガスと水素ガスを導入して1100〜1150℃、
約60分間処理するCVD法によって50〜100 μmの膜厚
に形成する。
First, a polysilicon film 3 is formed on the susceptor 2 of the epitaxial growth apparatus 1 shown in FIGS. As a method of forming the polysilicon film 3, for example, by introducing trichlorosilane gas and hydrogen gas, 1100 to 1150 ° C.,
The film is formed to a film thickness of 50 to 100 μm by the CVD method for processing for about 60 minutes.

【0012】つぎにサセプタ2上に、不純物濃度が高
く、比抵抗の小さい、たとえば比抵抗が1/1000〜5/
1000Ω・cmの半導体ウエハ4を載置する。サセプタ2上
には、通常、前記半導体ウエハ4を保持するための凹部
であるポケット5が設けられており、半導体ウエハ4を
ポケット5に嵌めこむことにより、サセプタ2の表面の
ほぼ中央に設けられたガス導入管6からほぼ等距離に配
置することができる。半導体ウエハ4のポケット5の内
径は半導体ウエハ4の外径とほぼ同じ径に形成され、反
応ガスの流れを妨げないようになっている。
Next, on the susceptor 2, the impurity concentration is high and the specific resistance is small, for example, the specific resistance is 1/1000 to 5 /.
A semiconductor wafer 4 of 1000 Ω · cm is placed. A pocket 5 which is a recess for holding the semiconductor wafer 4 is usually provided on the susceptor 2. By inserting the semiconductor wafer 4 into the pocket 5, the pocket 5 is provided substantially at the center of the surface of the susceptor 2. The gas introduction pipe 6 can be arranged at substantially the same distance. The inner diameter of the pocket 5 of the semiconductor wafer 4 is formed to be substantially the same as the outer diameter of the semiconductor wafer 4 so as not to hinder the flow of the reaction gas.

【0013】つぎに、前記サセプタ2を石英ベルジャ7
内に配設し、前記ガス導入管6から水素ガスを180slmの
流量で導入しながらサセプタ2の下部のヒータ8によっ
て環境温度から1000〜1150℃まで昇温する(図3のA参
照)。
Next, the susceptor 2 is attached to the quartz bell jar 7.
It is disposed inside, and while introducing hydrogen gas from the gas introduction pipe 6 at a flow rate of 180 slm, the temperature is raised from the ambient temperature to 1000 to 1150 ° C. by the heater 8 below the susceptor 2 (see A in FIG. 3).

【0014】つぎに、約30〜60分のあいだ、基板温度11
50℃で水素雰囲気下に半導体ウエハ4を保持する(図3
のB参照)。この間にサセプタ2上のポリシリコン膜3
が半導体ウエハ4の裏面に付着する。また、このときポ
ケット5の内側面に形成されたポリシリコン膜3も半導
体ウエハ4の外周面に付着する。この処理で半導体ウエ
ハ4の裏面には0.1 〜1μmの厚さのポリシリコン膜が
コーティングされ、半導体ウエハ4からのアウトドーピ
ング防止の膜となる。
Next, during about 30 to 60 minutes, the substrate temperature 11
Hold the semiconductor wafer 4 in a hydrogen atmosphere at 50 ° C. (FIG. 3).
B). During this time, the polysilicon film 3 on the susceptor 2
Adhere to the back surface of the semiconductor wafer 4. At this time, the polysilicon film 3 formed on the inner surface of the pocket 5 also adheres to the outer peripheral surface of the semiconductor wafer 4. By this treatment, the back surface of the semiconductor wafer 4 is coated with a polysilicon film having a thickness of 0.1 to 1 μm, and it becomes a film for preventing out-doping from the semiconductor wafer 4.

【0015】つぎに、温度を1130℃に下げたのち、石英
ベルジャ7の内部を水素ガスによりベークし、成長炉内
にアウトドープした不純物ガスをガス排出口10から排出
する(図3のC参照)。
Next, after lowering the temperature to 1130 ° C., the inside of the quartz bell jar 7 is baked with hydrogen gas, and the impurity gas out-doped into the growth furnace is discharged from the gas discharge port 10 (see C in FIG. 3). ).

【0016】引き続き従来の方法によりエピタキシャル
成長を行う。エピタキシャル成長の一例を具体例により
説明する。まず、石英ベルジャ7の内部に塩化水素ガス
と水素ガスをそれぞれ1〜10slm 、90〜180slmの流量で
導入して半導体ウエハ4の表面の洗浄を行う(図3のD
参照)。洗浄後、水素ガスによりパージする(図3のE
参照)。
Subsequently, epitaxial growth is performed by the conventional method. An example of epitaxial growth will be described with a specific example. First, hydrogen chloride gas and hydrogen gas are introduced into the quartz bell jar 7 at flow rates of 1 to 10 slm and 90 to 180 slm, respectively, to clean the surface of the semiconductor wafer 4 (D in FIG. 3).
reference). After cleaning, purge with hydrogen gas (see E in FIG. 3).
reference).

【0017】つぎに、1130℃に保ちながら半導体ウエハ
4の表面に半導体結晶層9をエピタキシャル成長させる
(図3のF参照)。たとえばシリコン結晶層をエピタキ
シャル成長するには、成長ガスであるトリクロルシラン
(SiHCl3 )ガスおよびドーパントとしてのホスフ
ィン(PH3 )をキャリヤガスの水素と共に水素180slm
、トリクロルシラン15g/min 、ホスフィン15sccmの
割合で混合して石英ベルジャ7の内部に導入し、化学反
応させ堆積させることにより、半導体ウエハ4の表面上
に、1〜5Ω・cmの高比抵抗のn型シリコン結晶層であ
る半導体結晶層9がエピタキシャル成長される。
Next, while maintaining the temperature at 1130 ° C., the semiconductor crystal layer 9 is epitaxially grown on the surface of the semiconductor wafer 4 (see F in FIG. 3). For example, in order to epitaxially grow a silicon crystal layer, trichlorosilane (SiHCl 3 ) gas as a growth gas and phosphine (PH 3 ) as a dopant are used together with hydrogen as a carrier gas for hydrogen 180 slm.
, Trichlorosilane 15 g / min, and phosphine 15 sccm are mixed and introduced into the quartz bell jar 7, and a chemical reaction is performed to deposit the high specific resistance of 1 to 5 Ω · cm on the surface of the semiconductor wafer 4. A semiconductor crystal layer 9 which is an n-type silicon crystal layer is epitaxially grown.

【0018】エピタキシャル成長を行っているとき、半
導体ウエハ4は高温に保たれるが、半導体ウエハ4の裏
面および外周面はポリシリコン膜3で覆われているた
め、半導体基板4内部からの不純物拡散は抑制される。
したがって、アウトドープによる不純物濃度のバラツキ
が抑えられ、要求される不純物濃度の半導体結晶層を形
成することができる。エピタキシャル成長後キャリヤガ
スの水素ガスのみにして炉内の温度を下げる。
During the epitaxial growth, the semiconductor wafer 4 is kept at a high temperature, but since the back surface and the outer peripheral surface of the semiconductor wafer 4 are covered with the polysilicon film 3, the impurity diffusion from the inside of the semiconductor substrate 4 does not occur. Suppressed.
Therefore, variations in impurity concentration due to out-doping can be suppressed, and a semiconductor crystal layer having a required impurity concentration can be formed. After the epitaxial growth, only hydrogen gas as a carrier gas is used to lower the temperature in the furnace.

【0019】なお、後工程として、半導体ウエハ4に付
着しているポリシリコン膜3を反応性ガスのプラズマエ
ッチングまたは機械的な研削により除去する。なお、除
去についてはデバイス製造プロセス中に実施されること
が一般的である。
As a post-process, the polysilicon film 3 attached to the semiconductor wafer 4 is removed by plasma etching of reactive gas or mechanical grinding. Note that the removal is generally performed during the device manufacturing process.

【0020】なお、本実施例では、0.001 〜0.005 Ω・
cmの低比抵抗の半導体ウエハに数百倍以上の高比抵抗の
半導体結晶層をエピタキシャル成長する例で説明した
が、高比抵抗の半導体結晶層でなくても、半導体ウエハ
の比抵抗が0.001 〜0.005 Ω・cmの高濃度不純物半導体
ウエハにエピタキシャル成長するばあいには、均一な不
純物濃度の半導体結晶層がえられ、本発明の効果を奏す
る。
In this embodiment, 0.001 to 0.005 Ω.
Although an example of epitaxially growing a semiconductor crystal layer having a high specific resistance of several hundred times or more on a semiconductor wafer having a low specific resistance of cm has been explained, the specific resistance of the semiconductor wafer is 0.001 to When epitaxially growing a high-concentration impurity semiconductor wafer of 0.005 Ω · cm, a semiconductor crystal layer having a uniform impurity concentration is obtained, and the effect of the present invention is obtained.

【0021】また、本実施例では、ポケットを有するサ
セプタを用いてエピタキシャル成長を行う例を示した
が、本発明はこれに限定されない。たとえば、ポケット
のないサセプタの平滑な表面に直接載置しても半導体ウ
エハの裏面にポリシリコン膜を形成することができ、本
発明の作用を充分奏することができる。
Further, in this embodiment, an example of performing epitaxial growth using a susceptor having pockets is shown, but the present invention is not limited to this. For example, a polysilicon film can be formed on the back surface of a semiconductor wafer even when directly mounted on the smooth surface of a susceptor having no pockets, and the effect of the present invention can be sufficiently exhibited.

【0022】[0022]

【発明の効果】本発明によれば、エピタキシャル成長装
置内部で、簡単に半導体ウエハの裏面などに選択的にア
ウトドープ防止用の膜を形成することができるため、エ
ピタキシャル成長時の半導体ウエハ内部の不純物のアウ
トドープを抑え、再現性のよい安定した不純物濃度のエ
ピタキシャル層を形成することができる。
According to the present invention, a film for preventing out-doping can be formed selectively on the back surface of a semiconductor wafer or the like inside an epitaxial growth apparatus, so that impurities inside the semiconductor wafer during epitaxial growth can be easily removed. It is possible to suppress out-doping and form an epitaxial layer having a stable impurity concentration with good reproducibility.

【0023】また、膜形成のための特別の工程および専
用の設備を不要とし、しかもエピタキシャル成長工程を
連続的に行うことができ、大幅な製造コストの削減が可
能になる。
Further, a special process for forming a film and a dedicated facility are not required, and furthermore, the epitaxial growth process can be continuously carried out, so that the manufacturing cost can be remarkably reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】エピタキシャル成長法に用いられるエピタキシ
ャル成長装置の一例を示す断面説明図である。
FIG. 1 is a cross-sectional explanatory view showing an example of an epitaxial growth apparatus used in an epitaxial growth method.

【図2】半導体ウエハを載置するサセプタの要部拡大断
面図である。
FIG. 2 is an enlarged sectional view of a main part of a susceptor on which a semiconductor wafer is placed.

【図3】本発明のエピタキシャル成長法における処理温
度変化を示すグラフである。
FIG. 3 is a graph showing a processing temperature change in the epitaxial growth method of the present invention.

【符号の説明】[Explanation of symbols]

1 エピタキシャル成長装置 2 サセプタ 3 ポリシリコン膜 4 半導体ウエハ 9 半導体結晶層 1 Epitaxial Growth Device 2 Susceptor 3 Polysilicon Film 4 Semiconductor Wafer 9 Semiconductor Crystal Layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 低比抵抗の半導体ウエハ表面に半導体結
晶層を成長させるエピタキシャル成長法であって、 (a)低比抵抗の半導体ウエハを載置するサセプタの該
半導体ウエハの載置場所にポリシリコン膜を設け、 (b)該サセプタ上に前記半導体ウエハを載置して高温
の水素ガス雰囲気下で前記半導体ウエハの少なくとも裏
面に前記ポリシリコン膜の一部を付着させ、 (c)引き続き成長ガスを導入して前記半導体ウエハの
表面に半導体結晶層をエピタキシャル成長せしめること
を特徴とするエピタキシャル成長法。
1. An epitaxial growth method for growing a semiconductor crystal layer on a surface of a semiconductor wafer having a low resistivity, comprising: (a) polysilicon on a mounting place of the semiconductor wafer of a susceptor on which the semiconductor wafer having a low resistivity is mounted. A film is provided, (b) the semiconductor wafer is placed on the susceptor, and part of the polysilicon film is attached to at least the back surface of the semiconductor wafer in a high-temperature hydrogen gas atmosphere, and (c) the growth gas is continued. Is introduced to grow a semiconductor crystal layer epitaxially on the surface of the semiconductor wafer.
JP33705592A 1992-12-17 1992-12-17 Epitaxial growth method Pending JPH06188198A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP33705592A JPH06188198A (en) 1992-12-17 1992-12-17 Epitaxial growth method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP33705592A JPH06188198A (en) 1992-12-17 1992-12-17 Epitaxial growth method

Publications (1)

Publication Number Publication Date
JPH06188198A true JPH06188198A (en) 1994-07-08

Family

ID=18305010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP33705592A Pending JPH06188198A (en) 1992-12-17 1992-12-17 Epitaxial growth method

Country Status (1)

Country Link
JP (1) JPH06188198A (en)

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JP2010074038A (en) * 2008-09-22 2010-04-02 Nuflare Technology Inc Method and apparatus for manufacturing semiconductor device
JP2011233583A (en) * 2010-04-23 2011-11-17 Shin Etsu Handotai Co Ltd Vapor-phase growth device and method of manufacturing silicon epitaxial wafer
JP2012222301A (en) * 2011-04-13 2012-11-12 Shin Etsu Handotai Co Ltd Method for manufacturing silicon epitaxial wafer
JP2016076518A (en) * 2014-10-02 2016-05-12 株式会社Sumco Contamination management method for vapor growth device, production method of epitaxial silicon wafer

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010074038A (en) * 2008-09-22 2010-04-02 Nuflare Technology Inc Method and apparatus for manufacturing semiconductor device
US9552983B2 (en) 2008-09-22 2017-01-24 Nuflare Technology, Inc. Manufacturing method for semiconductor device
JP2011233583A (en) * 2010-04-23 2011-11-17 Shin Etsu Handotai Co Ltd Vapor-phase growth device and method of manufacturing silicon epitaxial wafer
JP2012222301A (en) * 2011-04-13 2012-11-12 Shin Etsu Handotai Co Ltd Method for manufacturing silicon epitaxial wafer
JP2016076518A (en) * 2014-10-02 2016-05-12 株式会社Sumco Contamination management method for vapor growth device, production method of epitaxial silicon wafer
US10379094B2 (en) 2014-10-02 2019-08-13 Sumco Corporation Contamination control method of vapor deposition apparatus and method of producing epitaxial silicon wafer

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