JPH06187125A - Bcd data decision circuit - Google Patents

Abstract

PURPOSE:To set various numerical ranges and to reduce circuit scale when providing the BCD data decision circuit for judging whether a decimal numerical value shown by BCD data belongs to a previously decided numerical range or not. CONSTITUTION:A decoder 6 to convert each digit of BCD data into the decimal numerical value is provided for each digit. An OR circuit 21 generates level decision signals 211-226 by judging the decimal numerical value for each digit of this decoder output is larger than 1-8 or not. The level is compared and judged with a previously decided numerical value by using the outputs 201-210 of the decoder 6 and the level signals 211-226. The levels of the respective digits in the BCD data can be easily compared with various numerical values and the circuit scale is reduced as well.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a BCD (binary coded decimal code) data circuit, and more particularly to BCD data judgment for judging whether the decimal value indicated by this BCD data belongs to a preset numerical range. It is about circuits.

[0002]

2. Description of the Related Art A block diagram of a conventional BCD data decision circuit of this type is shown in FIG. In FIG. 5, n
By inputting BCD data of (n is a natural number) digits, it is determined whether or not the decimal value indicated by this BCD data belongs to a range between a preset upper limit value and a lower limit value. Therefore, n upper limit value determination comparators 7 to 10 and n lower limit value determination comparators 1
1 to 14, and OR circuits 15 and 16 and an AND circuit 17 for deriving a final determination signal 314 from the output results of these comparators.

The comparators 7, 8, 9 and 10 are for upper limit value determination, and the comparators 11, 12, 13, and 14 are for lower limit value determination, which are respectively connected in a cascade.

Signals 100, 101, 102 and 103 are B
It is a BCD data signal expressed by CD, and a signal 100
Is the least significant digit and signal 103 is the least significant digit. Signal 30
0, 301, 302, 303 are upper limit value setting signal, signal 3
Reference numerals 04, 305, 306 and 307 are lower limit setting signals.

Here, the comparators 7, 8, 9 and 10 compare the BCD data signals 100, 101, 102 and 103 with the upper limit value setting signals 300, 301, 302 and 303. At this time, the comparator compares each digit,
BCD data signals 100, 101, 102, 103 are
If it is smaller than the upper limit value setting signals 300, 301, 302, 303, the comparator output signal 308 is output, and if they are equal, the comparator output signal 309 is output.

From this, if the BCD data signal to be judged is less than or equal to the upper limit value, the comparator output signals 308,
309 and the OR circuit 15 cause the upper limit value determination signal 31
2 is output and it is determined that the value is less than or equal to the upper limit value.

Next, the comparators 11, 12, 13, 1
4 is a BCD data signal 100, 101, 102, 10
3 is compared with the lower limit value setting signals 304, 305, 306, 307. At this time, the comparator compares each digit, and the BCD data signals 100, 102, 103,
If it is larger than the lower limit value setting signals 304, 305, 306, 307, the comparator output signal 311 is output, and if they are equal, the comparator output signal 310 is output.

From this fact, if the BCD data signal to be judged is not less than the lower limit value, the comparator output signal 310,
311 and the OR circuit 16 allow the lower limit value determination signal 31
3 is output and it is determined that the value is equal to or more than the lower limit value.

Here, when both the upper limit value determination signal 312 and the lower limit value determination signal 313 are output, the AND circuit 17
Outputs a range determination signal 314, and the BCD data signals 100, 101, 102, 103 are determined to be within the desired range.

If either the upper limit value determination signal 312 or the lower limit value determination signal 313 is not output, or if both are not output, the range determination signal 314 is not output and the BCD data signals 100, 101, 102,10
3 is judged to be outside the desired range.

A concrete circuit example of each comparator shown in FIG. 5 is shown in FIG.

[0012]

In this conventional BCD data judgment circuit, it is necessary to provide comparators for upper limit value judgment and lower limit value judgment for each digit, and one BCD data judgment circuit for each digit. Since only the numerical range can be set, when a plurality of numerical ranges to be determined are set, the same number of circuits as the set number is required, which causes a problem that the circuit scale becomes large.

It is an object of the present invention to provide a BCD data judgment circuit with a reduced circuit scale.

[0014]

The BCD data decision circuit of the present invention comprises a decoding means for converting each digit of BCD data into a decimal value, and the converted decimal value of each digit is at most 1-8. 1 for the BCD data using a means for outputting a magnitude determination signal by determining whether each is larger or smaller, and an output from the decoding means and the magnitude determination signal.
And a means for determining whether or not the zero-digit value belongs to a preset numerical range.

[0015]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention, in which n digits (n
Is a block configuration diagram of a BCD data determination circuit for a natural number. The BCD data judgment circuit of the present invention is composed of n number range output circuits 1 to 4 and one judgment circuit 5.

Signals 100, 101, 102 and 103 are B
CD data signal, signal 100 is the most significant digit, signal 1
03 is the least significant digit.

First, the numerical range output circuits 1, 2, 3 and 4 receive the BCD data signal of each digit, judge the numerical range of each digit, and output the numerical range output signals 104, 105, 106 and 107.
Is output to the determination circuit 5. The decision circuit 5 receives this and B
The numerical range of the CD data is determined, and if it is within the desired range, the range determination signal 108 is output.

Next, the circuit configurations of the numerical value range output circuits 1 to 4 and the determination circuit 5 will be described with reference to FIGS. 2, 3 and 4.

FIG. 2 shows a circuit of the numerical range output circuit 1.
The other numerical value range output circuits 2 to 4 have the same configuration. This numerical range output circuit is composed of a decoder 6 and an OR circuit 21. When the BCD data signal 100 is input, the data input by the decoder 6 and the OR circuit 21 becomes 1
It is determined which value of 0 to 9 in the base 0 and which range it is in, and the numerical range output signal 104 is output.

At this time, if, for example, the value of the BCD data 100 is a decimal value "5", the signals 206 (= 5), 215 (≤.ltoreq.
5), 216 (≦ 6), 217 (≦ 7), 218 (≦
8), 219 (≧ 1), 220 (≧ 2), 221 (≧)
3), 22 (≧ 4) and 223 (≧ 5) are output. Further, the OR circuit 21 can delete and optimize unnecessary OR gates depending on the set numerical range.

A circuit example of the decoder 6 is shown in FIG.
This is a well-known circuit configuration for converting the BCD data of 4 digit digits A to D into one of decimal values (one of 0 to 9). FIG. 4 is a circuit example of the determination circuit 5. This judging circuit is composed of a combination of an AND circuit and an OR circuit, and the necessary numerical range output signal is inputted from the numerical range output circuit according to the numerical range to be judged. Here, as a specific example, 1
A case of determining the range of 7 or more and 32 or less will be described.

First, pay attention to the lower limit value. The lower limit is "1"
Since it is 7 ", when the ten's digit is" 1 "(= 1), the one's digit is the lower limit or more if it is" 7 "or more (≥7). Therefore, the numerical range output signal 202 (= 1), 225 (≧
7) is input, and if it is "17" or more, the AND circuit 18
Accordingly, the lower limit value determination signal 227 is output.

Next, pay attention to the upper limit value. Upper limit value "32"
Therefore, when the tenth digit is “3” (= 3), if the first digit is “2” or less (≦ 2), it is less than or equal to the upper limit value. Therefore, the numerical range output signals 204 (= 3), 212 (≦ 2)
Is input and is equal to or less than “32”, the AND circuit 19 outputs the upper limit value determination signal 228.

Next, pay attention to the ten-digit numerical value within the range.
Since the numerical range to be judged is from 17 to 32,
If the tens digit is "2" (= 2), it is within the range regardless of the value of the one digit, and therefore the numerical range output signal 203 (= 2).
Enter. If any one of the lower limit value determination signal 227, the upper limit value determination signal 228 and the numerical value range output signal 203 is output, the OR circuit 20 determines the determination signal 108.
Is output, and it is determined that it is within the desired range.

In the BCD data judgment circuit of this embodiment, the judgment circuit 5 has been described as a case of judging a range of 17 or more and 32 or less, but the same is applied to other digit numbers and numerical values. it can.

[0027]

As described above, the conventional BCD data determination circuit requires two comparators for the upper limit value and the lower limit value for each digit, whereas the present invention requires one comparator for each digit. Upper limit value by the numerical range output circuit and one judgment,
There is an effect that the lower limit value can be determined and the circuit scale can be reduced.

Further, in the conventional BCD data determination, it is 1
Since only one numerical range can be determined, when it is desired to set a plurality of numerical ranges, the same number of circuits as the set number is required, whereas in the present invention, the numerical range output circuit supports any numerical range. Even if a plurality of numerical value ranges to be determined are set, the numerical value range output circuit for each digit can be shared and only the determination circuits are required in the same number as the set number. Therefore, when the set number of the numerical range to be determined increases, there is a great effect that the circuit configuration is easy and the circuit scale is small.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2 is a diagram showing a specific example of a numerical value range output circuit of the block of FIG.

FIG. 3 is a diagram showing a specific example of the decoder of FIG.

FIG. 4 is a diagram showing a specific example of a determination circuit of the block of FIG.

FIG. 5 is a block diagram of a conventional BCD data determination circuit.

FIG. 6 is a diagram showing a specific example of the comparator of FIG.

[Explanation of symbols]

 1-4 numerical value range output circuit 5 determination circuit 6 decoder 18, 19 AND circuit 20 OR circuit 21 OR circuit group

Claims (1)

[Claims] 1. Decoding means for converting each digit of BCD data into a decimal value and determining whether the converted decimal value of each digit is large or small for each of 1 to 8 at most. A means for outputting a magnitude determination signal; and means for determining whether the decimal value indicated by the BCD data belongs to a preset numerical range using the output of the decoding means and the magnitude determination signal. A BCD data determination circuit including: