JPH0618205B2 - Method of manufacturing heterojunction bipolar transistor - Google Patents

Description

The present invention relates to a method for manufacturing an HBT capable of forming a heterojunction bipolar transistor (hereinafter abbreviated as HBT) in a self-aligned manner.

[Conventional technology]

4 (a) to 4 (h) show, for example, IEEE ELECTRON DEVICE LET.
It is a figure for demonstrating the manufacturing method of the conventional HBT shown by TERS VOL. EDL-7 (1986) 359.

In these figures, 1 is a semiconductor substrate, 2 is a collector layer as a semiconductor layer in a collector region, 3 is a base layer as a semiconductor layer in a base region, 4 is an emitter layer as a semiconductor layer in an emitter region, and 5 is a base electrode. A forming resist, 6 is a base electrode metal, 7 is a resist as a covering material for forming an emitter electrode, and 8 is an emitter electrode metal.

Next, the manufacturing process will be described.

First, when a collector layer 2, a base layer 3, and an emitter layer 4 are sequentially formed on a semiconductor substrate 1, a resist 5 is applied on the emitter layer 4, and an emitter mesa formed after the resist 5 is formed by photolithography. A region other than the masking region is removed to form an emitter mesa pattern (FIG. 4 (a)).

Next, using the resist 5 as a mask, the emitter layer 4 is wet-etched to surface the base layer 3.
At this time, side etching that determines the width between the emitter mesas of the base electrode metal 6 to be formed later occurs, and the emitter mesas are formed (FIG. 4 (b)).

Next, the base electrode metal 6 is vapor-deposited on the base layer 3 using the resist 5 as a mask (FIG. 4 (c)).

Next, the resist 5 and the unnecessary base electrode metal 6 on the resist 5 are removed by lift-off to expose the emitter layer 4 to form a base electrode (FIG. 4 (d)).

Next, the resist 7 is applied again on the surface of the emitter layer 4 and the base electrode metal 6 which have been exposed (FIG. 4 (e)), and the resist 7 is selectively formed by the width of the emitter electrode formed later by photolithography. After that, the emitter electrode pattern is formed (FIG. 4 (f)).

Next, the emitter electrode metal 8 is vapor-deposited on the emitter layer 4 using the resist 7 as a mask (FIG. 4 (g)).

Next, the resist 7 and unnecessary emitter electrode metal 8 thereon are removed by lift-off to form an emitter electrode (FIG. 4 (h)).

[Problems to be solved by the invention]

In the conventional method of manufacturing the HBT as described above, the distance between the emitter mesa and the base electrode is formed in a self-aligned manner, but is short, but the pattern of the resist 7 for forming the emitter electrode is as shown in FIG. 4 (e). Since the emitter layer 4 must be newly covered with the resist 7 and then photolithography must be performed, the alignment precision is poor in terms of photolithography precision, and it is difficult to reduce the emitter dimensions. there were.

The present invention has been made to solve such a problem, and it is possible to form the base electrode and the emitter electrode in a self-aligned manner with respect to the emitter mesa, and to easily miniaturize the element size. An object of the present invention is to obtain a method for producing HBT that can be used.

[Means for solving problems]

A method of manufacturing an HBT according to the present invention comprises:
A step of sequentially forming a semiconductor layer of a collector region, a semiconductor layer of a base region, and a semiconductor layer of an emitter region, and a step of forming an insulating film serving as a mask when forming an emitter mesa to be formed later on the semiconductor layer of the emitter region And etching the semiconductor layer in the emitter region in the thickness direction using the insulating film as a mask, and side etching is performed with a width between the base electrode metal and the emitter mesa that will be formed later to form an emitter mesa to form a semiconductor layer in the base region. Chamfering step, forming a base electrode metal on the semiconductor layer in the base region using the insulating film as a part of the mask, and forming a coating material on the base electrode metal to flatten the surface. And a step of etching the coating material to expose the base electrode metal on the insulating film, and a surface exposed using the coating material as a mask. And performing surface exposure of the emitter mesa by etching the source electrode metal and the insulating film, forming an emitter electrode metal on the emitter mesa coating material as a mask, is intended to include a step of removing the dressing.

[Action]

According to the present invention, a mask for forming an emitter mesa to be formed later on the semiconductor layer in the emitter region after the semiconductor layer in the collector region, the semiconductor layer in the base region, and the semiconductor layer in the emitter region are sequentially formed on the semiconductor substrate. An insulating film that becomes Then, the semiconductor layer in the emitter region is etched in the thickness direction using the insulating film as a mask, and side etching is performed with a width between the base electrode metal and the emitter, which will be formed later, to form an emitter mesa and to form a semiconductor layer in the base region. Will be surrendered. Then, a base electrode metal is formed on the semiconductor layer in the base region using the insulating film as a part of the mask, and a coating material is formed on the base electrode metal so as to have a flat surface, and then the coating material is etched. Then, the base electrode metal on the insulating film is chamfered. Next, the surface of the base electrode metal and the insulating film that have been surface-etched is etched using the coating material as a mask, and the surface of the emitter mesa is surface-mounted. Then, after the emitter electrode metal is formed on the emitter mesa by using the coating material as a mask, the coating material is removed to remove unnecessary emic electrode metal.

〔Example〕

FIGS. 1 (a) to 1 (h) are views for explaining one embodiment of the HBT manufacturing method of the present invention.

In these figures, the same reference numerals as those in FIGS. 4A to 4H indicate the same parts, and 9 is a SiO ₂ film as an insulating film.

Next, the manufacturing process will be described.

First, the collector layer 2, the base layer 3, and the emitter layer 4 are sequentially formed on the semiconductor substrate 1, and then the SiO ₂ film 9 is formed in a region serving as a mask for forming an emitter mesa formed later on the emitter layer 4. By doing so, an emitter mesa pattern (dummy emitter) is formed (FIG. 1 (a)).

Next, the emitter layer 4 is wet-etched by using the SiO ₂ film 9 as a mask to surface the base layer 3. At this time, side etching is performed to determine the width between the base electrode metal 6 and the emitter mesa which will be formed later. Occurs, and an emitter mesa is formed (FIG. 1 (b)).

Next, the base electrode metal 6 is deposited on the base layer 3 by using the SiO ₂ film 9 as a part of the mask (FIG. 1 (c)).

Next, a resist 7 as a coating material is formed on the base electrode metal 6.
Is applied so that the surface becomes flat and exposed and developed (FIG. 1 (d)).

Next, the resist 7 is dry-etched to expose the base electrode metal 6 on the SiO ₂ film 9 as a dummy emitter (FIG. 1 (e)).

Next, the base electrode metal 6 and the SiO ₂ film 9 that have been chamfered are etched using the resist 7 as a mask to invert the pattern to form a pattern for forming an emitter electrode and the emitter layer 4 is chamfered ( Fig. 1
(f)).

Next, the emitter electrode metal 8 is vapor-deposited on the emitter layer 4 using the resist 7 as a mask (FIG. 1 (g)).

Next, the resist 7 and the unnecessary emitter electrode metal 8 thereon are removed by lift-off to form an emitter electrode (FIG. 1 (h)).

That is, in the above embodiment, the base electrode can be formed in a self-aligned manner and the emitter electrode can be formed in a self-aligned manner with respect to the emitter mesa formed by the SiO ₂ film 9 in a self-aligned manner. The base electrode interval and the emitter size can be reduced.

It should be noted that in the above embodiment, the case where the base electrode is directly formed on the base layer 3 has been described, but as shown in FIG.
_If the ion implantation of impurities is performed using the _two films 9 as a mask to form the external base region 10 and then the base electrode is formed, the contact resistance can be reduced.

Further, as shown in FIG. 2, when the external base region 10 is formed in self-alignment with the emitter mesa, it is not necessary to form the base electrode in self-alignment. Alternatively, as shown in FIG. 3, the base electrode may be formed after the emitter electrode is formed without vapor-depositing the metal 6 for the base electrode.

〔The invention's effect〕

As described above, the present invention provides a step of sequentially forming a semiconductor layer of a collector region, a semiconductor layer of a base region, and a semiconductor layer of an emitter region on a semiconductor substrate, and an emitter mesa formed later on the semiconductor layer of the emitter region. The step of forming an insulating film that serves as a mask during formation, etching of the semiconductor layer in the emitter region in the thickness direction using the insulating film as a mask, and side etching with the width between the base electrode metal and the emitter mesa that will be formed later are performed. A step of forming an emitter mesa to surface the semiconductor layer in the base region, forming a base electrode metal on the semiconductor layer in the base region using the insulating film as a part of the mask, and forming the base electrode metal on the base electrode metal. The step of forming the coating material to make the surface flat and the etching of the coating material to surface the base electrode metal on the insulating film A step of etching the base electrode metal and the insulating film which are exposed by using the coating material as a mask to perform the surface of the emitter mesa, and a step of forming an emitter electrode metal on the emitter mesa by using the coating material as a mask, Since the step of removing the coating material is included, the emitter mesa, the base electrode, and the emitter electrode can be formed in a self-aligned manner, and an HBT having a fine element size can be easily obtained.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a method for manufacturing an HBT according to the present invention, FIGS. 2 and 3 are diagrams for explaining another embodiment of a method for manufacturing an HBT according to the present invention, and FIG. FIG. 6 is a diagram for explaining a method for manufacturing the HBT of FIG. In the figure, 1 is a semiconductor substrate, 2 is a collector layer, 3 is a base layer, 4 is an emitter layer, 6 is a base electrode metal, 7 is a resist, 8 is an emitter electrode metal, 9 is a SiO ₂ film, and 10 is an external base region. Is. The same reference numerals in each drawing indicate the same or corresponding parts.

Claims (1)

[Claims] 1. A step of sequentially forming a semiconductor layer of a collector region, a semiconductor layer of a base region, and a semiconductor layer of an emitter region on a semiconductor substrate, and forming an emitter mesa to be formed later on the semiconductor layer of the emitter region. A step of forming an insulating film to be a mask at the time, etching the semiconductor layer in the emitter region in the thickness direction using the insulating film as a mask, and side etching with a width between a base electrode metal to be formed later and the emitter mesa. And forming the emitter mesa to surface the semiconductor layer in the base region, forming a base electrode metal on the semiconductor layer in the base region using the insulating film as a part of a mask, A step of forming a coating material on the metal of the base electrode for flattening its surface, and etching the coating material to form a coating material on the insulating film. A step of chamfering the base electrode metal; a step of chamfering the emitter mesa by etching the chamfered base electrode metal and the insulating film using the covering material as a mask; and a masking of the covering material. As a result, a method of manufacturing a heterojunction bipolar transistor, comprising the steps of forming an emitter electrode metal on the emitter mesa and removing the coating material.