JPH0617388Y2 - Video tape recorder - Google Patents

Description

TECHNICAL FIELD The present invention relates to a video tape recorder, and more particularly to a double azimuth 4-head type video tape recorder.

<Prior Art> Double azimuth provided with a first rotary head group composed of two adjacent heads having different azimuth angles and a second rotary head group composed of two heads also adjacent to each other having different azimuth angles. In a 4-head system video tape recorder, during high-speed picture search, the reproduction output from two heads having different azimuth angles is switched to the larger output side for reproduction, and horizontal synchronization is performed at the switching point. The signal intervals become discontinuous and skew distortion occurs.

<Object of the Invention> The present invention has been made in view of the above points, and an object thereof is to eliminate skew distortion at the time of high-speed picture search in a double azimuth 4-head type video tape recorder.

<Structure of the Invention> In order to achieve the above-mentioned object, the present invention comprises a first head including two heads having different azimuth angles adjacent to each other.
In a double azimuth four-head type video tape recorder provided with a rotary head group and a second rotary head group composed of two heads which are also adjacent to each other and have different azimuth angles, corresponding to the heads having different azimuth angles. First and second demodulators for respectively demodulating reproduced signals from the head, and a phase reference signal generation circuit for generating a phase reference signal by removing the time fluctuation of the horizontal synchronizing signal in the reproduced signals from the head , First and second delay circuits for delaying the reproduced signals from the first and second demodulators based on the first and second delay control signals, respectively, and first and second delay circuits.
The first and second delay control signals for respectively phase-locking the respective horizontal synchronizing signals separated from the respective reproduction signals delayed by the delay circuit to the phase reference signal are output to the first and second delay circuits, respectively. First and second PLL circuits are provided.

<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit diagram of an essential part of an embodiment of the present invention. The video tape recorder of this embodiment is a double azimuth four-head type video tape recorder.
As shown in the figure, a head drum 1 is provided with a first rotary head group C composed of adjacent heads A and B having different azimuth angles and a second rotary head group D composed of heads A'and B '.
Are provided at intervals of 180 degrees. Head A of the first rotary head group C and head A'of the second rotary head group D
Have the same azimuth angle, and the head B of the first rotary head group C and the head B ′ of the second rotary head group D have the same azimuth angle.

In the video tape recorder of the present invention, in order to eliminate the skew distortion at the time of high-speed picture search, heads A having different azimuth angles as shown in FIG.
(A ') and B (B') corresponding to the first and second demodulators 2 and 3 for demodulating the reproduction signal given from the head, and the time of the horizontal synchronizing signal in the reproduction signal from each head. Phase reference signal generation circuit 4 for removing fluctuations and generating a phase reference signal
And first and second delay circuits 7 and 8 for delaying the respective reproduction signals from the first and second demodulators 2 and 3 based on the first and second delay control signals, and the first and second delay circuits. Delay circuit 7, 8
The first and second delay control signals for phase-locking the respective horizontal synchronizing signals separated from the respective reproduction signals delayed by the phase reference signal to the first and second delay circuits, respectively. The second PLL circuits 5 and 6 are provided.

The phase reference signal generation circuit 4 includes a demodulator 9 that demodulates by switching to a larger output side of the outputs of the preamplifiers 15 and 16.
The phase reference signal generation circuit 4 is composed of a sync separation circuit 10 for separating a horizontal sync signal from the reproduced signal from the demodulator 9 and a flywheel circuit 11 for removing a time variation of the horizontal sync signal. FIG. 3 is obtained by removing the time fluctuation of the horizontal synchronizing signal having the time fluctuation T shown in FIG.
The phase reference signal shown in (B) is generated to generate the first and second PLs.
It is given to the L circuits 5 and 6. The flywheel circuit 11 includes a phase comparison circuit 12, a low pass filter (LPF) 3 and a voltage controlled oscillator (VCO) 14.

The first PLL circuit 5 includes a phase comparison circuit 17, a VCO 18 and a clock oscillator 19, and the second PLL circuit 6 similarly has a phase comparison circuit 20, a VCO 21 and a clock oscillator 2.
It consists of 2. The PLL circuits 5 and 6 are separated from each other by the sync separation circuits 23 and 24 among the undelayed reproduced signals from the first and second demodulators 2 and 3 and have different phases from each other as shown in FIG. The first and second delay control signals for phase-locking the horizontal synchronizing signal shown in E) to the phase reference signal are output to the first and second delay circuits 7 and 8, respectively.

The first delay circuit 7 includes a CCD (Charge Coupled Device) delay element 25 and a drive circuit 26, and a second delay circuit 8
Similarly, it comprises a CCD delay element 27 and a drive circuit 28. Each of the delay circuits 7 and 8 delays the reproduction signal based on the first and second delay control signals from the PLL circuits 5 and 6, respectively, and the time-variation-corrected phases match each other.
Switching circuit 2 for reproducing the horizontal synchronizing signal shown in (D) and (F)
It outputs to each 9 individual contacts. This switching circuit 29
Switches to the one with the better S / N ratio and outputs the reproduction signal.

As described above, in the video tape recorder of the present invention, during high speed picture search, the phases of the horizontal synchronizing signals of the reproduced signals from the heads A (A ') and B (B') having different azimuth angles are made equal to each other. Since it is corrected by the PLL circuit, the horizontal synchronizing signal interval does not become discontinuous at the head switching point as in the conventional case, and skew distortion does not occur.

<Effects of the Invention> As described above, according to the present invention, the first rotary head group including two adjacent heads having different azimuth angles and the two adjacent heads having different azimuth angles are also formed. In a double azimuth 4-head type video tape recorder having a second rotary head group,
First and second demodulators for demodulating the reproduction signals from the heads corresponding to the heads having different azimuth angles, and a phase reference by removing the time variation of the horizontal synchronizing signal in the reproduction signals from the heads. A phase reference signal generating circuit for generating a signal, first and second delay circuits for delaying the respective reproduction signals from the first and second demodulators based on the first and second delay control signals, and a first , The first and second delay control signals for phase-locking the respective horizontal synchronizing signals separated from the respective reproduction signals delayed by the second delay circuit to the phase reference signal, respectively. First to output respectively
Since the second PLL circuit is provided, during high speed picture search, correction is performed based on the delay control signal from the PLL circuit so that the phases of the horizontal synchronizing signals of the reproduction signals from the heads of different azimuth angles become equal. Therefore, the skew distortion is eliminated, and the screen is easy to see.

[Brief description of drawings]

FIG. 1 is a block diagram of an essential part of an embodiment of the present invention, FIG. 2 is a plan view showing a head mounting state of FIG. 1, and FIG.
It is a signal waveform diagram of each part of the example of the figure. 2, 3 ... First and second demodulators, 4 ... Phase reference signal generation circuit, 5, 6 ... First and second PLL circuits, 7, 8 ... First and second delay circuits.

Claims (1)

[Scope of utility model registration request] 1. A double comprising a first rotary head group composed of two adjacent heads having different azimuth angles and a second rotary head group composed of two heads also adjacent to each other having different azimuth angles. In an azimuth 4-head system video tape recorder, first and second demodulators for respectively demodulating reproduced signals from the heads corresponding to the heads having different azimuth angles, and horizontal signals among the reproduced signals from the heads. A phase reference signal generation circuit that generates a phase reference signal by removing the time variation of the synchronization signal, and the reproduction signals from the first and second demodulators,
First and second delays based on the delay control signal
A delay circuit, and first and second delay control signals for phase-locking the respective horizontal synchronizing signals separated from the respective reproduction signals delayed by the first and second delay circuits to the phase reference signal, respectively. ，
A video tape recorder comprising: a first delay circuit and a second PLL circuit which respectively output the second delay circuit.