JPH06168855A - Multilayer solid electrolytic capacitor and fabrication thereof - Google Patents

Multilayer solid electrolytic capacitor and fabrication thereof

Info

Publication number
JPH06168855A
JPH06168855A JP34547892A JP34547892A JPH06168855A JP H06168855 A JPH06168855 A JP H06168855A JP 34547892 A JP34547892 A JP 34547892A JP 34547892 A JP34547892 A JP 34547892A JP H06168855 A JPH06168855 A JP H06168855A
Authority
JP
Japan
Prior art keywords
anode
pits
forming
dielectric oxide
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34547892A
Other languages
Japanese (ja)
Inventor
Toshiaki Maruyama
俊朗 丸山
Yoko Endo
洋子 遠藤
Yutaka Harashima
豊 原島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marcon Electronics Co Ltd
Original Assignee
Marcon Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marcon Electronics Co Ltd filed Critical Marcon Electronics Co Ltd
Priority to JP34547892A priority Critical patent/JPH06168855A/en
Publication of JPH06168855A publication Critical patent/JPH06168855A/en
Pending legal-status Critical Current

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  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Polyoxymethylene Polymers And Polymers With Carbon-To-Carbon Bonds (AREA)

Abstract

PURPOSE:To provide a multilayer solid electrolytic capacitor excellent in electric characteristics, e.g. frequency characteristics of impedance and leak current characteristics, which exhibits stabilized characteristics over a wide temperature range and contributes to downsizing and high capacity. CONSTITUTION:After forming through tunnel pits 1, countless cubic pits are formed to obtain an anode base body 3 having surfaces of sponge-like pits 2. A plurality of anode base bodies 3 are then laminated to produce an anode laminate which is then subjected to formation thus forming a dielectric oxide 6 on the surface. A conductive polymeric layer 7 composed of a chemical polymerization film and an electrolytic polymerization film is formed entirely on the surface of dielectric oxide 6 and a cathode lead-out part, i.e., a conductor layer 8, is formed thereon thus obtaining a capacitor element 9.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、導電性高分子を固体電
解質とした積層形固体電解コンデンサ及びその製造方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated solid electrolytic capacitor using a conductive polymer as a solid electrolyte and a method for manufacturing the same.

【0002】[0002]

【従来の技術】固体電解コンデンサとしては、アルミニ
ウム、タンタル、ニオブなどの弁作用金属を陽極体と
し、この弁作用金属に形成した陽極酸化皮膜を誘電体と
し、この陽極酸化皮膜上に、固体電解質として二酸化マ
ンガンやTCNQ錯体からなる有機半導体を形成してな
るものがある。
2. Description of the Related Art As a solid electrolytic capacitor, a valve action metal such as aluminum, tantalum or niobium is used as an anode body, and an anodic oxide film formed on the valve action metal is used as a dielectric body. There is one formed by forming an organic semiconductor composed of manganese dioxide or a TCNQ complex.

【0003】また、近年、例えば特開昭62−1814
15号公報に開示された技術に代表されるように、ピロ
ール、チオフェン、フランなどの複素五員環化合物を化
学的、電気化学的な手段を用いて重合形成したポリピロ
ール、ポリチオフェン、ポリフランなどの導電性高分子
を固体電解質とした固体電解コンデンサが開発されてい
る。
In recent years, for example, Japanese Patent Laid-Open No. 62-1814.
As typified by the technology disclosed in Japanese Patent Publication No. 15, a conductive five-membered polypyrrole, polythiophene, polyfuran, etc. obtained by polymerizing a five-membered heterocyclic compound such as pyrrole, thiophene, furan, etc. by chemical or electrochemical means. Solid electrolytic capacitors have been developed that use conductive polymers as solid electrolytes.

【0004】しかして、この導電性高分子は、その電導
度が約102 S/cmと二酸化マンガン(10-2S/c
m)やTCNQ錯体(10S/CM)と比較して非常に
高く、また、熱安定性に優れているなどの特徴を有して
いるため、この導電性高分子を固体電解質として利用す
ることにより、インピーダンスの周波数特性や漏れ電流
などの電気的諸特性に優れ、広い範囲での温度特性に優
れた固体電解コンデンサを得ることが可能である。
However, this conductive polymer has an electric conductivity of about 10 2 S / cm and manganese dioxide (10 -2 S / c).
m) and TCNQ complex (10S / CM) are very high and have excellent thermal stability. Therefore, by using this conductive polymer as a solid electrolyte, It is possible to obtain a solid electrolytic capacitor having excellent electrical characteristics such as impedance frequency characteristics and leakage current, and excellent temperature characteristics in a wide range.

【0005】一方、電子部品の軽薄短小化に伴い、固体
電解コンデンサにおいても、単位体積当たりの容量増大
の目的で陽極体を積層一体化する各種の方法が提案され
ている。すなわち、このような目的に応えたものとし
て、例えば、特開昭63−239917号公報に開示さ
れたものがある。
On the other hand, as electronic components have become lighter, thinner and smaller, various methods have been proposed for laminating and integrating anode bodies for the purpose of increasing the capacity per unit volume even in solid electrolytic capacitors. That is, as one that meets such an object, there is one disclosed in, for example, Japanese Patent Laid-Open No. 63-239917.

【0006】この公報に開示された技術は、弁作用金属
板の所定部分に、絶縁物層を形成することで区別した金
属基板の一方に誘電体酸化皮膜、半導体層、導電体層を
順次形成したコンデンサ基板を複数枚積層し、導電ペー
ストで固着するとともに、他方の金属基板露出部を加圧
一体化した後、電気溶接により積層体を形成するもので
ある。
According to the technique disclosed in this publication, a dielectric oxide film, a semiconductor layer, and a conductor layer are sequentially formed on one side of a metal substrate distinguished by forming an insulating layer on a predetermined portion of a valve action metal plate. A plurality of the above-mentioned capacitor substrates are laminated and fixed with a conductive paste, and the exposed portion of the other metal substrate is pressure-integrated, and then a laminated body is formed by electric welding.

【0007】また、特開昭61−30020号公報に開
示されているように、貫通型のトンネルピットを形成し
た陽極基体を積層一体化したものに陽極リードを接続し
た後、酸化皮膜層、半導体層、導電体層を順次形成する
技術などがある。
Further, as disclosed in JP-A-61-30020, after connecting an anode lead to a laminated and integrated anode substrate having through-type tunnel pits, an oxide film layer, a semiconductor There is a technique of sequentially forming a layer and a conductor layer.

【0008】しかしながら、上記前者の技術は、コンデ
ンサ基板を積層した後、金属基板露出部を加圧一体化す
るため、誘電体酸化皮膜、半導体層、導電体層を形成し
た部分へのストレスを防ぎきれず、誘電体酸化皮膜に欠
陥部が生じ、漏れ電流が増大し、ショート不良が発生し
てしまう欠点があった。
However, in the former technique, after the capacitor substrates are laminated, the exposed portion of the metal substrate is pressure-integrated, so that stress on the portions where the dielectric oxide film, the semiconductor layer, and the conductor layer are formed is prevented. However, there is a defect that defects occur in the dielectric oxide film, the leakage current increases, and a short circuit defect occurs.

【0009】また、上記後者の技術は、予め形成した積
層体に陽極酸化皮膜層、半導体層、導電体層を形成する
ため、漏れ電流不良、ショート不良の発生がなく、ま
た、貫通型のトンネルピットが積層体を構成する陽極基
体に形成されているため、積層体全体に半導体層、導電
体層が形成される利点を有しているが、一般に貫通型ト
ンネルピットによる陽極基体の表面積アップは少なく、
単位体積当たりの容量増大という点では限度があり、目
的を満足することができなかった。
Further, in the latter technique, since the anodic oxide film layer, the semiconductor layer and the conductor layer are formed on the previously formed laminated body, there is no leakage current defect or short circuit defect, and there is no penetration tunnel. Since the pits are formed on the anode substrate that constitutes the laminated body, there is an advantage that the semiconductor layer and the conductor layer are formed on the entire laminated body. However, generally, the surface area of the anode substrate is increased by the through tunnel pit. Less
There was a limit in increasing the capacity per unit volume, and the purpose could not be satisfied.

【0010】[0010]

【発明が解決しようとする課題】以上述べたように、従
来開示されている積層形固体電解コンデンサ技術では、
製造工程中に加えられるストレスによって誘電体酸化皮
膜に欠陥部が生じ、電気的諸特性を損ねる問題点を抱え
る結果となったり、また、積層体を構成する陽極基体に
貫通型のトンネルピットを形成したとしても、これだけ
で所望の陽極基体の表面積アップを果たすことは不可能
で、解決すべき課題をもつものであった。
As described above, in the conventionally disclosed laminated solid electrolytic capacitor technology,
Due to the stress applied during the manufacturing process, defects occur in the dielectric oxide film, resulting in the problem of impairing various electrical characteristics.Also, through-type tunnel pits are formed in the anode substrate that constitutes the laminate. Even if it does, it is impossible to achieve the desired increase in the surface area of the anode substrate, and there is a problem to be solved.

【0011】本発明は、上記のような課題を解決するた
めに成されたもので、その目的は、インピーダンスの周
波数特性、漏れ電流特性などの電気的諸特性に優れ、広
い温度範囲にわたって諸特性の安定した小形・大容量化
に貢献する積層形固体電解コンデンサを提供するもので
ある。
The present invention has been made to solve the above problems, and its purpose is to provide excellent electrical characteristics such as impedance frequency characteristics and leakage current characteristics, and various characteristics over a wide temperature range. The present invention provides a laminated solid electrolytic capacitor that contributes to the stable miniaturization and large capacity of the solid electrolytic capacitor.

【0012】[0012]

【課題を解決するための手段】本発明の積層形固体電解
コンデンサは、弁作用金属箔に形成した貫通型のトンネ
ルピットと、更に交流エッチングにより形成した立方体
状のピットにて表面を海綿状のピットに粗面化して得ら
れた陽極基体を複数枚積層し形成した陽極積層体と、こ
の陽極積層体を構成する陽極基体表面全体に形成した誘
電体酸化皮膜と、この誘電体酸化皮膜上に形成した導電
性高分子層と、この導電性高分子層上に形成した導電体
層とを具備したことを特徴とするものである。
The laminated solid electrolytic capacitor of the present invention has a sponge-like surface formed by a through-hole tunnel pit formed in a valve metal foil and a cubic pit formed by AC etching. An anode laminate formed by laminating a plurality of anode bases obtained by roughening the pits, a dielectric oxide film formed on the entire surface of the anode base forming the anode laminate, and a dielectric oxide film formed on the dielectric oxide film. It is characterized by comprising the formed conductive polymer layer and a conductor layer formed on the conductive polymer layer.

【0013】また、上記積層形固体電解コンデンサを得
る手段として弁作用金属箔に貫通型のトンネルピットを
形成し、次に交流エッチングにより立方体状のピットを
無数に形成することで表面を海綿状のピットに粗面化し
た陽極基体を得る工程と、この陽極基体を複数枚積層し
陽極積層体を得る工程と、この陽極積層体を構成する陽
極基体それぞれの表面全体に化成処理により誘電体酸化
皮膜を形成する工程と、この誘電体酸化皮膜上に導電性
高分子層を形成する工程と、この導電性高分子層上に導
電体層を形成する工程とを順次経ることを特徴とするも
のである。
Further, as means for obtaining the above-mentioned laminated solid electrolytic capacitor, through-hole type tunnel pits are formed in the valve metal foil, and then an infinite number of cubic pits are formed by AC etching so that the surface has a sponge-like shape. A step of obtaining a roughened anode substrate in pits, a step of laminating a plurality of the anode substrates to obtain an anode laminate, and a dielectric oxide film by chemical conversion treatment on the entire surface of each anode substrate constituting the anode laminate. And a step of forming a conductive polymer layer on the dielectric oxide film, and a step of forming a conductive layer on the conductive polymer layer. is there.

【0014】[0014]

【作用】本発明によれば、予め形成した陽極積層体を化
成処理し、陽極積層体を構成する陽極基体それぞれの表
面全体に誘電体酸化皮膜を形成するため、製造工程中に
誘電体酸化皮膜に機械的なストレスによる欠陥部を誘発
する要因、又は導電性高分子層を始め導電体層へのスト
レスもなく、諸特性劣化要因が解消できる。
According to the present invention, the preformed anode laminate is subjected to chemical conversion treatment to form the dielectric oxide film on the entire surface of each of the anode substrates constituting the anode laminate, so that the dielectric oxide film is formed during the manufacturing process. In addition, there is no factor that induces a defective portion due to mechanical stress, or there is no stress on the conductor layer including the conductive polymer layer, and various factors that deteriorate characteristics can be eliminated.

【0015】また、陽極積層体を構成する陽極基体には
貫通型のトンネルピットが形成され、更に交流エッチン
グにより形成した立方体状のピットにて表面を海綿状の
ピットに粗面化しているので、陽極基体積層体内部も含
め表面積が拡大された誘電体酸化皮膜表面全体に、電導
度が高く、熱安定性にも優れた導電性高分子層が、必要
十分な厚さで均一に形成することができる。
Further, since penetration type tunnel pits are formed in the anode base body which constitutes the anode laminate, and the surface is roughened into spongy pits by cubic pits formed by AC etching. A conductive polymer layer with high electrical conductivity and excellent thermal stability is formed uniformly over the entire surface of the dielectric oxide film with an expanded surface area, including the inside of the anode substrate laminate, with a necessary and sufficient thickness. You can

【0016】[0016]

【実施例】以下、本発明の一実施例につき図面を参照し
て説明する。まず、図2に示すように、ミラー指数(1
00)面の占有率が90%以上のアルミニウム箔を用
い、主に塩素イオンを含む溶液中で80℃、10A、1
分直流電解を行うことで貫通型のトンネルピット1を形
成した後、主に塩素イオンと硫酸イオンを含む水溶液中
で5A、10分交流電解を行うことで立方体状のピット
を無数に形成することで表面を海綿状のピット2とした
陽極基体3を得る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. First, as shown in FIG. 2, Miller index (1
The aluminum foil having a occupancy of the (00) surface of 90% or more is used, and the solution is mainly in a solution containing chloride ions at 80 ° C.
After forming the penetration type tunnel pit 1 by performing direct current DC electrolysis, forming an infinite number of cubic pits by performing AC electrolysis for 5 minutes in an aqueous solution containing mainly chlorine ions and sulfate ions for 10 minutes. Thus, an anode substrate 3 having a spongy pit 2 on the surface is obtained.

【0017】次に、図3に示すように、この陽極基体3
を複数積層し、必要な大きさに打ち抜き、任意な箇所に
陽極リード線4を溶接等にて固着して陽極積層体5を形
成する。
Next, as shown in FIG.
Are laminated and punched to a required size, and the anode lead wire 4 is fixed to an arbitrary place by welding or the like to form the anode laminate 5.

【0018】しかして、図1(A)及び図1(B)に示
すように、この陽極積層体5を、化成液中で製品定格電
圧に適した電圧で化成処理してその表面に誘電体酸化皮
膜6を形成し、しかる後、2M−ピロール/エタノール
溶液に5分間浸漬し、更に、0.5M−過硫酸アンモニ
ウム水溶液に5分間浸漬して化学酸化重合を施し、前記
誘電体酸化皮膜6表面全体にポリピロールからなる化学
重合膜を形成する。
As shown in FIGS. 1 (A) and 1 (B), however, this anode laminate 5 is subjected to a chemical conversion treatment in a chemical conversion liquid at a voltage suitable for the rated voltage of the product, and a dielectric material is applied to the surface thereof. The oxide film 6 is formed, and then, immersed in a 2M-pyrrole / ethanol solution for 5 minutes, and further immersed in a 0.5M-ammonium persulfate aqueous solution for 5 minutes to perform chemical oxidative polymerization, and the surface of the dielectric oxide film 6 is formed. A chemically polymerized film made of polypyrrole is formed on the entire surface.

【0019】その後、支持電解質としてアルキルナフタ
レンスルホン酸塩0.05mol/リットル、及びピロ
ールモノマー0.2mol/リットルを含む電解酸化重
合液中において、前段の処理で形成した化学重合膜を陽
極とし、外部電極との間で定電流電解酸化重合(1mA
/cm2 ,2h)を行い、ポリピロールからなる電解重
合膜を形成し、前記陽極基体3に形成した前記誘電体酸
化皮膜6表面全体に化学重合膜と電解重合膜からなる導
電性高分子層7を形成し、この導電性高分子層7上にグ
ラファイト層及び銀ペースト層を順次形成し陰極引出部
としての導電体層8を形成しコンデンサ素子9を構成す
る。
Then, in an electrolytic oxidation polymerization solution containing 0.05 mol / liter of alkylnaphthalene sulfonate as a supporting electrolyte and 0.2 mol / liter of pyrrole monomer, the chemically polymerized film formed in the previous step was used as an anode, Constant current electrolytic oxidation polymerization (1mA)
/ Cm 2 , 2 h) to form an electropolymerized film made of polypyrrole, and a conductive polymer layer 7 made of a chemically polymerized film and an electropolymerized film is formed on the entire surface of the dielectric oxide film 6 formed on the anode substrate 3. Then, a graphite layer and a silver paste layer are sequentially formed on the conductive polymer layer 7 to form a conductor layer 8 as a cathode lead-out portion to form a capacitor element 9.

【0020】次に、図4に示すように、前記陽極リード
線4に陽極外部端子10を、前記導電体層8に陰極外部
端子11をそれぞれ接続固着し、例えば、トランスファ
ーモールドにより樹脂外装12を施しコンデンサ本体1
3を形成し、このコンデンサ本体13の側面から導出し
た前記陽極外部端子10及び陰極外部端子11を前記コ
ンデンサ本体13の側面に沿って底面に至るように折曲
げ加工し完成品としてなるものである。
Next, as shown in FIG. 4, an anode external terminal 10 is connected and fixed to the anode lead wire 4 and a cathode external terminal 11 is connected and fixed to the conductor layer 8, respectively, and a resin sheath 12 is formed by transfer molding, for example. Giving capacitor body 1
3 is formed, and the anode external terminal 10 and the cathode external terminal 11 led out from the side surface of the capacitor body 13 are bent along the side surface of the capacitor body 13 to reach the bottom surface, thereby forming a finished product. .

【0021】以上のような構成になる積層形固体電解コ
ンデンサによれば、陽極積層体5を構成する陽極基体3
には貫通型のトンネルピット1が形成され、更に交流エ
ッチングにより形成した立方体状のピットを無数に形成
することで表面を海綿状のピット2に粗面化しているの
で、陽極積層体5内部も含め表面積が拡大された誘電体
酸化皮膜6表面全体に、電導度が高く、熱安定性にも優
れた化学重合膜と電解重合膜からなる導電性高分子層7
と、その上に導電体層8が、必要十分な厚さで均一に形
成できる。
According to the laminated solid electrolytic capacitor having the above-mentioned structure, the anode base body 3 constituting the anode laminated body 5 is formed.
A through-type tunnel pit 1 is formed in the inner surface of the anode laminated body 5 because the surface is roughened into spongy pits 2 by forming a number of cubic pits formed by AC etching. Conductive polymer layer 7 consisting of a chemically polymerized film and an electrolytic polymerized film, which have high electrical conductivity and excellent thermal stability, on the entire surface of the dielectric oxide film 6 having an expanded surface area including
Then, the conductor layer 8 can be uniformly formed thereon with a necessary and sufficient thickness.

【0022】したがって、インピーダンスの周波数特性
などの電気的諸特性の向上及び広い温度範囲での特性の
安定化に寄与できるとともに、小形・大容量化が図れる
効果を有する。
Therefore, the electrical characteristics such as the frequency characteristic of impedance can be improved and the characteristics can be stabilized in a wide temperature range, and the size and capacity can be reduced.

【0023】また、陽極基体3に対する誘電体酸化皮膜
6形成を、予め陽極基体3を積層し陽極積層体5とした
状態で行うため、誘電体酸化皮膜6へのストレスもな
く、よって誘電体酸化皮膜6に破損を生じることもな
く、漏れ電流特性の向上及びショート不良の大幅な低減
に寄与する効果も有する。
Further, since the formation of the dielectric oxide film 6 on the anode substrate 3 is performed in a state where the anode substrate 3 is laminated in advance to form the anode laminate 5, there is no stress on the dielectric oxide film 6 and therefore the dielectric oxide film is formed. The film 6 is not damaged, and it also has an effect of contributing to the improvement of the leakage current characteristic and the drastic reduction of short circuit defects.

【0024】次に、本発明の優位性をより明確化するた
めに、本発明による実施例と従来技術による比較例A及
び比較例Bとの特性比較について説明する。
Next, in order to further clarify the superiority of the present invention, a characteristic comparison between the embodiment according to the present invention and the comparative examples A and B according to the prior art will be described.

【0025】すなわち、以下に示す実施例と比較例A及
び比較例Bとの静電容量、tanδ、漏れ電流及び周波
数100KHzにおける等価直列抵抗(ESR)初期特
性を調べた結果、表1に示すようになった。また、実施
例と比較例A及び比較例Bそれぞれのインピーダンス−
周波数特性を調べた結果、図5に示すようになった。な
お、試料はそれぞれ100個である。
That is, the capacitance, tan δ, leakage current and equivalent series resistance (ESR) initial characteristics at a frequency of 100 KHz of the following examples and Comparative Examples A and B were examined, and the results are shown in Table 1. Became. In addition, the impedance of each of the examples and the comparative examples A and B-
As a result of examining the frequency characteristic, the result is as shown in FIG. The number of samples is 100 each.

【0026】(実施例)上記実施例にて述べた技術内容
からなるもので、4枚積層して形成した陽極積層体寸法
として3mm×3mmのものを用い形成した定格電圧1
0V、公称静電容量4.7μFのチップタイプの積層形
固体電解コンデンサ。
(Embodiment) With the technical contents described in the above embodiment, the rated voltage 1 formed by using an anode laminate having a size of 3 mm × 3 mm formed by laminating four sheets
Chip type multilayer solid electrolytic capacitor with 0V and nominal capacitance of 4.7μF.

【0027】(比較例A)主に塩素イオンと硫酸イオン
を含む水溶液中で5A、10分交流電解を行い立方体状
のピットを無数に形成することで表面を海綿状のピット
に粗面化し、しかる後、化成処理を施し表面に誘電体酸
化皮膜を形成したアルミニウム箔を絶縁性樹脂で、陽極
引出側と3mm×3mmの寸法からなる陰極形成側に区
分して得た陽極基体の陰極形成側に、前記実施例にて延
べたと同様の方法でポリピロールからなる導電性高分子
層を形成し、更に、この導電性高分子層上にグラファイ
ト層、銀ペースト層を順次形成することで導電体層を形
成しコンデンサ素板を形成し、このコンデンサ素板を、
陽極引出部と陰極形成側を互いに対応させて4枚積層
し、次に陰極形成側を銀接着剤にて固着し、陽極引出部
を電気溶接で取りまとめコンデンサ素子とし、その後、
上記実施例と同一手段を講じ完成品とした定格電圧10
V、公称静電容量4.7μFのチップタイプの積層形固
体電解コンデンサ。
(Comparative Example A) The surface was roughened into sponge-like pits by forming an infinite number of cubic pits by AC electrolysis for 5 A for 10 minutes in an aqueous solution containing mainly chlorine ions and sulfate ions, Thereafter, the aluminum foil having a dielectric oxide film formed on its surface by chemical conversion treatment is divided into an anode resin side and an anode lead side and a cathode side having a size of 3 mm x 3 mm, and the cathode side of the anode substrate is obtained. In addition, by forming a conductive polymer layer made of polypyrrole in the same manner as in the above embodiment, further forming a graphite layer and a silver paste layer on the conductive polymer layer in this order to form a conductor layer. To form a capacitor base plate,
Four sheets are laminated so that the anode lead-out portion and the cathode formation side correspond to each other, then the cathode formation side is fixed with a silver adhesive, and the anode lead-out portion is put together by electric welding to form a capacitor element.
A rated voltage of 10 is obtained as a finished product by taking the same means as in the above embodiment.
Chip type multilayer solid electrolytic capacitor with V and nominal capacitance of 4.7 μF.

【0028】(比較例B)主に、塩素イオンを含む水溶
液中で80℃、10A、1分直流電解を行い貫通型のト
ンネルピットを形成したアルミニウム箔を4枚積層し積
層体とし、この積層体を3mm×3mmの大きさに打ち
抜き、陽極酸化皮膜工程以降は上記実施例と同一手段を
講じて完成品とした定格電圧10V、公称静電容量4.
7μFのチップタイプの積層形固体電解コンデンサ。
(Comparative Example B) Mainly, four aluminum foils having through-type tunnel pits were laminated by carrying out direct current electrolysis at 80 ° C. for 10 minutes in an aqueous solution containing chloride ions to form a laminated body. The body was punched into a size of 3 mm × 3 mm, and after the anodic oxide coating process, the same means as in the above example was taken to obtain a finished product with a rated voltage of 10 V and a nominal capacitance of 4.
7μF chip type multilayer solid electrolytic capacitor.

【0029】[0029]

【表1】 [Table 1]

【0030】表1及び図5から明らかなように、比較例
Aのものは、漏れ電流特性、ESR特性、インピーダン
ス特性の劣化がみられ、比較例Bのものは、静電容量が
実施例の約1/4と極端に小さく、また、tanδ、E
SR特性劣化も大きく、共に実用的でないのに対して、
実施例のものは全ての特性において安定した結果を示
し、本発明の優れた作用効果が確認された。
As is clear from Table 1 and FIG. 5, in Comparative Example A, the leakage current characteristics, ESR characteristics, and impedance characteristics were deteriorated, and in Comparative Example B, the electrostatic capacity was lower than that of the Examples. Extremely small, about 1/4, and tan δ, E
While the SR characteristics are greatly deteriorated and both are not practical,
The examples showed stable results in all characteristics, and the excellent action and effect of the present invention were confirmed.

【0031】しかして、この理由は、比較例Aの場合、
コンデンサ素板をまとめる際のストレスにより、誘電体
酸化皮膜が損傷し、更に導電性高分子層及び半導体層に
もクラックが生じ、抵抗値が上昇したためであり、ま
た、比較例Bの場合、アルミニウム箔に形成されるピッ
トが、貫通型のトンネルピットのみで箔倍率が上がらな
いことによるものと考えられる。
The reason for this is that in the case of Comparative Example A,
This is because the dielectric oxide film was damaged by the stress at the time of putting the capacitor base plates together, and the conductive polymer layer and the semiconductor layer were also cracked, and the resistance value increased, and in the case of Comparative Example B, aluminum was used. It is considered that the pits formed on the foil are only penetration type tunnel pits and the foil magnification does not increase.

【0032】また、本発明は、以上述べた実施例に限定
されるものではなく、アルミニウム箔の他にタンタル、
チタン、ニオブ箔等の使用も可能であり、また、上記実
施例ではチップ形端子を使用し、トランスファーモール
ドにより外装を施したチップ構造のものを例示して説明
したが、電極引出端子としてスズめっきCP線等を用
い、流動浸漬法やデップ法等により外装を施してなるリ
ード線構造とすることも可能であり、更に、導電性高分
子層及び導電体層の形成方法等を適宜選択できることは
勿論である。
Further, the present invention is not limited to the above-mentioned embodiments, but in addition to aluminum foil, tantalum,
It is also possible to use titanium, niobium foil, etc. Further, in the above-mentioned embodiment, the chip-shaped terminal is used, and the chip structure having the exterior by transfer molding is described as an example. It is also possible to use a CP wire or the like to form a lead wire structure by applying an exterior by a fluid immersion method, a dip method, or the like, and further, the method of forming the conductive polymer layer and the conductor layer, etc. can be appropriately selected. Of course.

【0033】[0033]

【発明の効果】本発明によれば、コンデンサ素子内部も
含め表面積が大幅に拡大された誘電体酸化皮膜全体に、
固体電解質としての導電性高分子層が必要十分な所望の
厚さで均一に形成されることにより、インピーダンスの
周波数特性を始め、その他電気的諸特性に優れ、広い温
度範囲にわたって特性の安定した、小形・大容量の積層
形固体電解コンデンサ及びその製造方法を得ることがで
きる。
According to the present invention, the entire surface of the dielectric oxide film whose surface area is greatly expanded, including the inside of the capacitor element,
By forming a conductive polymer layer as a solid electrolyte uniformly with a necessary and sufficient desired thickness, including impedance frequency characteristics, excellent other electrical characteristics, stable characteristics over a wide temperature range, It is possible to obtain a small-sized and large-capacity laminated solid electrolytic capacitor and a manufacturing method thereof.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に係る積層形固体電解コンデ
ンサを構成するコンデンサ素子を示すもので、(A)は
コンデンサ素子全体の拡大断面図、(B)は(A)のイ
部拡大図。
FIG. 1 shows a capacitor element that constitutes a laminated solid electrolytic capacitor according to an embodiment of the present invention, where (A) is an enlarged cross-sectional view of the entire capacitor element, and (B) is an enlarged view of part (a) of (A). Fig.

【図2】図1に示すコンデンサ素子を構成するアルミニ
ウム箔を示す拡大模造図。
FIG. 2 is an enlarged imitation view showing an aluminum foil forming the capacitor element shown in FIG.

【図3】本発明の一実施例に係る陽極積層体を示す正面
図。
FIG. 3 is a front view showing an anode laminate according to an example of the present invention.

【図4】本発明の一実施例に係る積層形固体電解コンデ
ンサを示す断面図。
FIG. 4 is a sectional view showing a laminated solid electrolytic capacitor according to an embodiment of the present invention.

【図5】周波数に対するインピーダンス特性曲線図。FIG. 5 is an impedance characteristic curve diagram with respect to frequency.

【符号の説明】 1 貫通型のトンネルピット 2 海綿状のピット 3 陽極基体 4 陽極リード線 5 陽極積層体 6 誘電体酸化皮膜 7 導電性高分子層 8 導電体層 9 コンデンサ素子[Explanation of reference numerals] 1 through tunnel pit 2 sponge-like pit 3 anode substrate 4 anode lead wire 5 anode laminate 6 dielectric oxide film 7 conductive polymer layer 8 conductive layer 9 capacitor element

フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01G 9/24 C 7924−5E Continuation of front page (51) Int.Cl. 5 Identification code Office reference number FI technical display location H01G 9/24 C 7924-5E

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 弁作用金属箔に形成した貫通型のトンネ
ルピットと、更に交流エッチングにより形成した立方体
状のピットにて表面を海綿状のピットに粗面化して得ら
れた陽極基体を複数枚積層し形成した陽極積層体と、こ
の陽極積層体を構成する陽極基体表面全体に形成した誘
電体酸化皮膜と、この誘電体酸化皮膜上に形成した導電
性高分子層と、この導電性高分子層上に形成した導電体
層とを具備したことを特徴とする積層形固体電解コンデ
ンサ。
1. A plurality of anode substrates obtained by roughening the surface into sponge-like pits with through-type tunnel pits formed in a valve metal foil and cubic pits formed by AC etching. Anode laminate formed by laminating, dielectric oxide film formed on the entire surface of the anode substrate constituting the anode laminate, conductive polymer layer formed on the dielectric oxide film, and the conductive polymer A laminated solid electrolytic capacitor, comprising: a conductor layer formed on the layer.
【請求項2】 弁作用金属箔に貫通型のトンネルピット
を形成し、次に交流エッチングにより立方体のピットを
無数に形成することで表面を海綿状のピットに粗面化し
た陽極基体を得る工程と、この陽極基体を複数枚積層し
陽極積層体を得る工程と、この陽極積層体を構成する陽
極基体それぞれの表面全体に化成処理により誘電体酸化
皮膜を形成する工程と、この誘電体酸化皮膜上に導電性
高分子層を形成する工程と、この導電性高分子層上に導
電体層を形成する工程とを順次経ることを特徴とする積
層形固体電解コンデンサの製造方法。
2. A step of forming a through-hole tunnel pit in a valve metal foil and then forming an infinite number of cubic pits by AC etching to obtain an anode substrate having a surface roughened into spongy pits. And a step of laminating a plurality of the anode substrates to obtain an anode laminate, a step of forming a dielectric oxide film by chemical conversion treatment on the entire surface of each of the anode substrates constituting the anode laminate, and the dielectric oxide film. A method for producing a laminated solid electrolytic capacitor, which comprises sequentially performing a step of forming a conductive polymer layer thereon and a step of forming a conductor layer on the conductive polymer layer.
JP34547892A 1992-11-30 1992-11-30 Multilayer solid electrolytic capacitor and fabrication thereof Pending JPH06168855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34547892A JPH06168855A (en) 1992-11-30 1992-11-30 Multilayer solid electrolytic capacitor and fabrication thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34547892A JPH06168855A (en) 1992-11-30 1992-11-30 Multilayer solid electrolytic capacitor and fabrication thereof

Publications (1)

Publication Number Publication Date
JPH06168855A true JPH06168855A (en) 1994-06-14

Family

ID=18376866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34547892A Pending JPH06168855A (en) 1992-11-30 1992-11-30 Multilayer solid electrolytic capacitor and fabrication thereof

Country Status (1)

Country Link
JP (1) JPH06168855A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5584890A (en) * 1995-01-24 1996-12-17 Macfarlane; Douglas R. Methods of making multiple anode capacitors
WO1998014969A1 (en) * 1996-10-02 1998-04-09 Telectronics Pacing Systems, Inc. Multiple anode capacitors and methods of making the same
US6239965B1 (en) * 1998-05-22 2001-05-29 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method of producing the same
US6310765B1 (en) 1997-06-20 2001-10-30 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method for manufacturing the same
JP2007142060A (en) * 2005-11-17 2007-06-07 Nichicon Corp Method of manufacturing aluminum electrode foil for electrolytic capacitor
US7319599B2 (en) 2003-10-01 2008-01-15 Matsushita Electric Industrial Co., Ltd. Module incorporating a capacitor, method for manufacturing the same, and capacitor used therefor

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5584890A (en) * 1995-01-24 1996-12-17 Macfarlane; Douglas R. Methods of making multiple anode capacitors
WO1998014969A1 (en) * 1996-10-02 1998-04-09 Telectronics Pacing Systems, Inc. Multiple anode capacitors and methods of making the same
US6310765B1 (en) 1997-06-20 2001-10-30 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method for manufacturing the same
US6413282B1 (en) 1997-06-20 2002-07-02 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method for manufacturing the same
US6239965B1 (en) * 1998-05-22 2001-05-29 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method of producing the same
US6989289B1 (en) 1998-05-22 2006-01-24 Matsushita Electric Industrial Co., Ltd. Electrolytic capacitor and method of producing the same
US7319599B2 (en) 2003-10-01 2008-01-15 Matsushita Electric Industrial Co., Ltd. Module incorporating a capacitor, method for manufacturing the same, and capacitor used therefor
US7400512B2 (en) 2003-10-01 2008-07-15 Matsushita Electric Industrial Co., Ltd. Module incorporating a capacitor, method for manufacturing the same, and capacitor used therefor
JP2007142060A (en) * 2005-11-17 2007-06-07 Nichicon Corp Method of manufacturing aluminum electrode foil for electrolytic capacitor
JP4695966B2 (en) * 2005-11-17 2011-06-08 ニチコン株式会社 Method for producing aluminum electrode foil for electrolytic capacitor

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