JPH06164660A - Gain fluctuation compensating circuit - Google Patents

Abstract

PURPOSE:To provide a means for providing a demodulated signal without being degraded and providing digital signal processing for securing the stability of operations by properly estimating gain fluctuation even when any non-linear operation caused by delay detection is existent by providing a gain compensating circuit and a weight estimating circuit. CONSTITUTION:First of all, concerning a pi/4-QPSK input signal 1, orthogonal phase detection is performed at an oscillator 5 provided with a frequency almost equal to the central frequency, after the signal is passed through a low-pass filter 6 for removing the higher harmonic wave component and the noise, the amplitude level is optimumly adjusted at an amplifier 7, and the signal is converted to a digital signal by an A/D converter 8. Next, signals xk and yk of I and Q channels are turned to be (1+wx)-times and (1+wy)-times by a gain compensating circuit 13 respectively based on gain fluctuation values wx and wy estimated at a weight estimating circuit 14, and the gain fluctuation is compensated. A transmitting signal is demodulated by a four-phase delay detection circuit 15, and an identifier 16 selects the MSB signal of a simply demodulated signal Uk and outputs it as 2 and 2'.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of constructing a baseband delay detection circuit for a QPSK signal or the like, and more particularly to a circuit for compensating for gain fluctuation occurring in an analog circuit.

[0002]

2. Description of the Related Art Demodulators for QPSK and 16QAM signals are
As shown in FIG. 1, the input signal 1 and the carrier wave 5 synchronized with the center frequency of the input signal are complex-multiplied by the quadrature phase detector 4 and the low-pass filter 6 removes the harmonic components and noise, and then the amplitude level It is inputted to the discriminator (A / D converter) 8 through the adjusting amplifier 7 to obtain the discrimination reproduction signals 2 and 2 '. However, since 4, 6 and 7 are generally composed of analog active elements, gain fluctuations occur due to ambient temperature and changes over time, imbalances occur in the levels of the I and Q channels, and demodulation characteristics deteriorate. .

In order to solve this problem, conventionally, as shown in FIG. 1 (Patent No. 1506432, "Multivalued discriminator"), A
The exclusive OR 9 output of the identification signal 2 and the error signal 3 obtained from the / D converter is integrated by a low-pass filter of 10,
Feedback is applied to the amplifier immediately before the A / D converter to keep the I and Q channel signals at desired levels. The basic principle of this circuit, if demodulation operation to take the exclusive OR of 2 is larger than 1 gain for any quadrant of the signal for the linear positive, and negative if than one small I'm taking advantage of it.

However, the conventional method cannot be applied to the case where the nonlinear calculation is performed after the gain variation occurs like the baseband differential detection. As an example, π
Consider / 4-QPSK differential detection. Although FIG. 2 shows the configuration of the present invention, it is a normal baseband delay detection circuit except for the hatched parts 13 and 14. The numbers given to each block are the same as those in FIG. First, when there is no gain fluctuation, the sampled value (x
_k , y _k ) and the differential detection output U _k (u _kx , u _ky ) are X−
Plots on the Y plane show FIGS. 6 (a) and 6 (b), respectively.
It becomes a signal like. Next, when the gains of the I and Q channels are 0.9 and 1.2, respectively, due to the gain variation, (x _k , y _k ) and U _k (u _kx , u _ky ) are respectively shown in FIG. , (B). As is clear from FIG. 6B, the error signal does not exhibit a constant polarity with respect to the signal demodulated in a certain quadrant, so that the conventional circuit configuration cannot compensate the level fluctuation.

[0005]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and its purpose is to correctly estimate a gain variation and to prevent deterioration even if there is a non-linear operation by differential detection. It is to provide a means realized by digital signal processing in order to obtain a non-demodulated signal and to secure the operation stability.

[0006]

The feature of the present invention for achieving the above object is that a received signal is subjected to complex product detection by a local oscillator having a frequency substantially equal to its center frequency, and a harmonic component is obtained by a low pass filter. And a baseband differential detection circuit for A / D-converting in-phase (I) / quadrature (Q) components obtained by removing noise, and then complex-multiplying a complex sample value between one symbol by the A / D converter. The gain compensation circuit includes a gain compensation circuit that independently weights the output I and Q components by a predetermined amount, and a weight estimation circuit that estimates a predetermined amount to be weighted. For both Q channels, the fluctuation amount obtained from the weight estimation circuit is added to the regular gain 1 to obtain a new gain,
The first weight estimation circuit estimates the I-channel weighting coefficient, and calculates the I-channel error signal output from the differential detection circuit,
The I-channel output signal of the gain compensating circuit and three signals of the signal delayed by one symbol are multiplied, and the output signal is scaled by a small coefficient to integrate it to obtain an I-channel weighting coefficient estimator. The weight estimation circuit estimates the weighting coefficient for the Q channel. The weighting estimation circuit multiplies the Q channel output signal of the differential detection circuit by the Q channel error signal, and integrates the output obtained by scaling the output by the minute coefficient to obtain the Q channel output signal. It is in the gain fluctuation compensating circuit which is used as the weight coefficient estimation amount.

Another feature of the present invention is that the received signal is subjected to complex product detection by a local oscillator having a frequency substantially equal to its center frequency, and a low-pass filter removes harmonic components and noise to obtain an in-phase (I In a baseband differential detection circuit that performs A / D conversion on a quadrature (Q) component and then complex-multiplies a complex sample value for one symbol, the I and Q components of the output of the A / D converter are independently determined. A gain fluctuation compensating circuit including a gain compensating circuit for weighting only the amount of, and a weight estimating circuit for estimating a predetermined amount for weighting,
The gain compensation circuit adds a fluctuation amount obtained from the weight estimation circuit to the normal gain 1 to obtain a new gain, and the weight estimation circuit is obtained from the I channel output signal of the differential detection circuit and its discrimination result. Using the error signal as a common input signal, the signal obtained by delaying the I and Q components of the A / D converter output by one symbol is multiplied by the gain compensation circuit output signal corresponding to the I and Q channels, and the result is further Multiply by the signal,
The gain fluctuation compensating circuit integrates a signal obtained by scaling the output with a small coefficient to obtain an estimated amount of the gain fluctuation of each of the I and Q channels.

[0008]

[Embodiment 1] A complex envelope of a QPSK received signal

[0009]

[Equation 1]

[0010] Where h (t) is the impulse response of the transmission line, φ _k is the differentially encoded phase angle,
φ _k = φ _k-1 + m _k π / 2 + θ (m _k = 0, 1, 2,
3). Further, θ is 0 in the case of QPSK, π / 4-Q
In the case of PSK, it becomes π / 4. If the gains of the I and Q channels of the demodulator are dgx and dgy, respectively, time t = k
The demodulated signal R _{k at} T is given by the following equation.

[0011] _{R k = dgx · cosφ k +} jdgy · sinφ k = x k + jy k (2)

For example, the π / 4-QPSK demodulated signal is X-
Expressed on the Y plane, there is no gain variation and dgx = dgy =
In the case of 1, as shown in FIG. 6A, when there is a gain variation, it becomes as shown in FIG. 7A. Next, when the I and Q channels are respectively weighted with 1 + w _x and 1 + w _y and then differential detection is performed,

Z _k = (1 + w _x ) x _k + j (1 + w _y ).
From y _k , U _k = Z _k · Z ^* _k-1 = {(1 + w _x ) ² x _k x _k-1 + (1 + w _y ) ² y _k y _k-1 } + j (1 + w _x ) (1 + w _y ). (Y _k x _k-1 −x _k y _k-1 ) (3)

Is obtained. The identification signal is D _k = d _k , _x + j
Let d _{k, y} be the error signals of the I and Q channels, e
_{If k, x} and e _{k, y} ,

E _{k, x} = d _{k, x} − (1 + w _x ) ² x _k x _k−1 − (1 + w _y ) ² y _k y _k−1 (4) e _{k, y} = d _{k, y} − ( _{1 + w x) (1 +} w y) (x k-1 y k -x k y k-1) and made (5).

In order to estimate the weighting coefficient so that the mean square of the error is minimized, w _x is calculated from the square of the instantaneous error of the equation (4).
It is only necessary to obtain the inclination with respect to and sequentially control in the opposite direction. Therefore,

[0017]

[Equation 2]

Can be obtained as Here, μ is a small coefficient called a step size parameter. Also, the error e
_{Since k, x} and the weighting coefficient w _x are uncorrelated, multiplying the second term on the right side of Expression (6) by (1 + w _x ) does not affect the modification of w _x . Therefore, w _x is corrected by the following equation.

W _x ← w _x + μe _{k, x} (1 + w _x ) x _k (1 + w _x ) x _k-1 (6 ′)

From this, w _x can be corrected from the I channel output signal of the gain compensation circuit and the I channel error signal of the differential detection output.

Next, from equation (5)

[Equation 3]

Then, the weighting factor of the Q channel is modified by the following equation.

W _y ← w _y + μe _{k, y} (1 + w _x ) (y _k x _k-1 −x _k y _k-1 ) (7)

Here, as in the case of the I channel, e _{k, y}
And using the decorrelation of w _y

W _y ← w _y + μe _{k, y} (1 + w _x ) (1 + w _y ) (y _k x _k-1 −x _k y _k-1 ) (7 ′)

It is transformed into Therefore, w _y can be modified by the product of the Q channel output of the differential detection circuit and the Q channel error signal.

Since the change rate of the gain fluctuation due to the ambient temperature and deterioration over time is small, μ may be as large as the quantization noise of the A / D converter.

FIG. 2 shows the configuration of the present invention by taking a .pi. / 4-QPSK demodulator as an example, and it is a normal baseband delay detection circuit except for the hatched portion. First, π /
The 4-QPSK input signal 1 is quadrature detected by an oscillator 5 having a frequency substantially equal to the center frequency (4), passes through a low-pass filter 6 that removes harmonic components and noise, and then an amplifier 7 optimizes the amplitude level. It is adjusted and converted into a digital signal by the A / D converter 8. Next, based on the gain fluctuation values w _x and w _y estimated by the weight estimation circuit 14, the I and Q channel signals x _k and y _k are multiplied by (1 + w _x ) and (1 + w _y ) in the gain compensation circuit 13, respectively. The gain fluctuation is compensated. Reference numeral 15 is a four-phase differential detection circuit, which demodulates the transmission signal. The discriminator 16 simply selects the MSB signal of the demodulated signal U _k and outputs it as 2, 2 ′.

FIG. 3 shows a specific example of the gain compensating circuit 13. The fluctuation amounts w _x and w _y are added to the regular gain 1 (22) to obtain demodulated signals x _k and y for the I and Q channels.
Multiply _k (21).

FIG. 4 shows a concrete example of a four-phase differential detection circuit.
Input complex signal Z _k and complex conjugate signal Z delayed by one symbol
^* multiplication with _k-1 is done.

FIG. 5 shows a specific example of the weight estimation circuit, and FIG. 5A shows a circuit configuration for obtaining the weight coefficient w _x . The input signal of this circuit is the I channel output x ′ of the gain compensation circuit 13.
_k and the I channel error signal e obtained from the subtraction circuit 12
_{k, x} . The operation of the w _x estimation circuit multiplies x _k and a signal obtained by delaying x _k by one symbol _, and multiplies the result by e _{k, x} . Further, the result is multiplied by the step size parameter μ, and the result is added by the adder 22 and the 1-symbol delay circuit 2
It is integrated by 3 and output.

FIG. 9B shows a circuit configuration for obtaining the weighting coefficient w _y . The input signals of this circuit are the Q channel output u _{k, y of the differential} detection circuit 15 and the Q channel error signal e _{k, y} obtained from the subtraction circuit 12. The operation of the w _y estimation circuit is u
_{k, y} and e _k, further step size parameter by multiplying the _y mu
And the result is integrated by the adder 22 and the 1-symbol delay circuit 23 and output.

Here, it is obvious that the I-channel error signal e _{k, x} obtained from the subtraction circuit 12 may be replaced with the polarity signal in the circuit for obtaining w _x . Also, w
It is clear that in the circuit for obtaining _y , u _{k, y} and e _{k, y} may be replaced by their polarity signals, in which case the multiplier can be replaced by an exclusive OR.

[Second Embodiment] Next, a second embodiment of the present invention will be described with reference to FIGS.

The complex envelope of the QPSK received signal is

[Equation 4]

It is assumed that Where h (t) is the impulse response of the transmission line, φ _k is the differentially encoded phase angle,
φ _k = φ _k-1 + m _k π / 2 + θ (m _k = 0, 1, 2,
3). Further, θ is 0 in the case of QPSK, π / 4-Q
In the case of PSK, it becomes π / 4. If the gains of the I and Q channels of the demodulator are dgx and dgy, respectively, time t = k
The demodulated signal R _{k at} T is given by the following equation.

[0037] _{R k = dgx · cosφ k +} jdgy · sinφ k = x k + jy k (12)

For example, the π / 4-QPSK demodulated signal is X-
Expressed on the Y plane, there is no gain variation and dgx = dgy =
In the case of 1, when there is a gain variation as shown in FIG. 6A, it becomes as shown in FIG. Next, when the I and Q channels are respectively weighted with 1 + w _x and 1 + w _y and then differential detection is performed,

Z _k = (1 + w _x ) x _k + j (1 + w _y ).
From y _k , U _k = Z _k · Z ^* _k-1 = {(1 + w _x ) ² x _k x _k-1 + (1 + w _y ) ² y _k y _k-1 } + j (1 + w _x ) (1 + w _y ). (Y _k X _k-1 −x _k y _k-1 ) (13)

Is obtained. The identification signal is D _k = d _k , _x + j
If d _{k, y} and the I channel error signal is e _{k, x} ,

E _{k, x} = d _{k, x} − (1 + w _x ) ² x _k x _k−1 − (1 + w _y ) ² y _k y _k−1 (14)

In order to estimate the weighting coefficient so that the mean square of the error is minimized, w is calculated from the square of the instantaneous error in the equation (14).
_x, it may be sequentially controlled in the direction opposite to that seeking inclined about w _y. Therefore,

[0043]

[Equation 5]

Is obtained as Here, μ is a minute coefficient called a step size parameter, which is an arbitrarily small value.

From equations (15) and (16), the estimated value of the weighting factor is given by the product of the demodulated signal that has undergone gain fluctuation, the gain compensation circuit output, and the I channel error signal. Further, since the change rate of the gain fluctuation due to the ambient temperature and deterioration with time is small, μ may be as large as the quantization noise of the A / D converter.

FIG. 2 shows the configuration of the present invention by taking a .pi. / 4-QPSK demodulator as an example, which is a normal baseband delay detection circuit except for the hatched portion. First, π /
The 4-QPSK input signal 1 is quadrature-phase detected by an oscillator 5 having a frequency substantially equal to the center frequency, passes through a low-pass filter 6 that removes harmonic components and noise, and is then adjusted to an optimum amplitude level by an amplifier 7 A The signal is converted into a digital signal by the / D converter 8. Next, based on the gain fluctuation values w _x and w _y estimated by the weight estimation circuit 14, the I and Q channel signals x _k and y _k are multiplied by (1 + w _x ) and (1 + w _y ) in the gain compensation circuit 13, respectively. The gain fluctuation is compensated. Reference numeral 15 is a four-phase differential detection circuit, which demodulates the transmission signal. The discriminator 16 simply selects the MSB signal of the demodulated signal U _k and outputs it as 2, 2 ′.

As the gain compensation circuit and the four-phase differential detection circuit, the same circuits as in the case of the first embodiment are used.

FIG. 9 is a specific example of the weight estimation circuit, and the circuit configurations for obtaining the estimated values w _x and w _y are the same. The input signals of this circuit are the I channel error signals e _{k, x} obtained from the subtraction circuit 12 and the output signals of 8 and 13. The w _x estimation circuit operates by delaying x _k by one symbol and then (1+
w _k ) x _k and the result is multiplied by e _{k, x} . Further, the result is multiplied by the step size parameter μ, and the result is integrated by the adder 22 and the 1-symbol delay circuit 23 and output.

In the second embodiment, since the gain compensation circuit is connected to many circuits such as the output of the A / D converter and the output of the discriminator, a connection problem may occur, but the first embodiment is used. In the example there is no such problem.

[0050]

7 (b) and 7 (c) show demodulated signals with and without the gain fluctuation compensating circuit, and it can be seen that the demodulated signal is obtained at the correct position by compensation.
The effect of the present invention is great in a situation where a portable wireless terminal used outdoors such as mobile communication has a severe environment such as ambient temperature and unavoidable characteristic deterioration due to gain variation of the analog active circuit.

[Brief description of drawings]

FIG. 1 is a gain variation compensation circuit used in a linear demodulator.

FIG. 2 is a block diagram when applied to a π / 4-QPSK demodulator in an embodiment of the present invention.

FIG. 3 is a specific example of the gain compensation circuit shown in FIG.

FIG. 4 is also a concrete example of the differential detection circuit 15 shown in FIG.

5 is a specific example of the weight estimation circuit 14 shown in FIG. 2 as well, in which (a) is a circuit configuration for the I channel and (b) is a circuit configuration for the Q channel.

FIG. 6 is a signal space diagram of a π / 4-QPSK demodulated signal when there is no gain fluctuation, (a) shows an A / D converter output, and (b) shows a delay detector output.

FIG. 7 is an example when there is a gain variation (I channel 0.9 times, Q channel 1.2 times), and (a) is A / D.
The converter output, (b) shows the differential detection output, and (c) shows the differential detection output when the gain variation compensation circuit is added.

FIG. 8 is a block diagram of another embodiment of the present invention.

9 shows a weight estimation circuit in the embodiment of FIG.

[Explanation of symbols]

 1 signal input terminal 2, 2'I, Q channel identification signal output terminal 3, 3 'I, Q channel error signal output terminal 4 quadrature phase detector 5 local oscillator 6 low pass filter 7 amplifier 8 A / D conversion Unit 9 exclusive OR circuit 10 loop filter 12 subtractor 13 gain compensation circuit 14 weight estimation circuit 15 four-phase delay detection circuit 16 discriminator 21 multiplier 22 adder or subtractor 23 1 symbol delay element

Claims (3)

[Claims] 1. An in-phase (I) / quadrature (Q) obtained by subjecting a received signal to complex product detection with a local oscillator having a frequency substantially equal to its center frequency and removing a harmonic component and noise with a low-pass filter. In a baseband differential detection circuit that performs A / D conversion on components and then complex-multiplies complex sample values for one symbol, a gain that independently weights I and Q components of the A / D converter output by predetermined amounts. A gain fluctuation compensating circuit including a compensating circuit and a weight estimating circuit for estimating a predetermined amount to be weighted is provided, and the gain compensating circuit has a normal gain of 1 for both I and Q channels and a fluctuation component obtained from the weight estimating circuit. Is added to obtain a new gain, and the first weight estimation circuit estimates the channel weighting coefficient. The I-channel error signal of the differential detection circuit output and the I-channel error signal of the gain compensation circuit are added. The channel output signal and a signal obtained by delaying it by one symbol are multiplied by three signals, and the output signal is scaled by a small coefficient and integrated to obtain a weighting coefficient estimator for the I channel. For estimating the weighting coefficient for use, the Q-channel output signal of the differential detection circuit is multiplied by the Q-channel error signal, and the output is integrated by scaling the signal scaled by the minute coefficient to obtain the Q-channel weighting coefficient estimation amount. A gain fluctuation compensating circuit characterized by: 2. The structure of the weight estimation circuit according to claim 1, wherein the first weight estimation circuit converts the I-channel error signal into its polarity signal and multiplies it, and the second weight estimation circuit A gain fluctuation compensating circuit, characterized in that either or both of a Q channel output signal and a Q channel error signal of a differential detection circuit are converted into a polarity signal and multiplied. 3. In-phase (I) / quadrature (Q) obtained by subjecting a received signal to complex product detection with a local oscillator having a frequency substantially equal to its center frequency and removing a harmonic component and noise with a low-pass filter. In a baseband differential detection circuit that performs A / D conversion on components and then complex-multiplies complex sample values for one symbol, a gain that independently weights I and Q components of the A / D converter output by predetermined amounts. The gain compensation circuit includes a compensation circuit and a weight estimation circuit that estimates a predetermined amount to be weighted. The gain compensation circuit adds a variation obtained from the weight estimation circuit to the regular gain 1 to obtain a new gain compensation circuit. The gain estimation circuit uses the I-channel output signal of the differential detection circuit and the error signal obtained from the discrimination result as a common input signal to determine the I and Q components of the A / D converter output. The signal delayed by one symbol and the output signal of the gain compensation circuit corresponding to the I and Q channels are multiplied, the result is further multiplied by the error signal, and the output is integrated by scaling the signal with a small coefficient to obtain I and Q. A gain fluctuation compensating circuit, characterized in that it is an estimated amount of gain fluctuations of both channels.