JPH06151647A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH06151647A JPH06151647A JP12574792A JP12574792A JPH06151647A JP H06151647 A JPH06151647 A JP H06151647A JP 12574792 A JP12574792 A JP 12574792A JP 12574792 A JP12574792 A JP 12574792A JP H06151647 A JPH06151647 A JP H06151647A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- resin
- sealing
- mold
- ejector pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置特に極性マ−
クの形成方法に関するものである。BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device, particularly a polar marker.
The present invention relates to a method of forming a black circle.
【０００２】[0002]
【従来の技術】従来のこの種の半導体装置の製造方法と
しては、半導体素子、金属接続子を電気的に接続したリ
−ドフレ−ムを樹脂封止金型内に配置し、樹脂封止を行
う。この際、樹脂と金型の間に接着力があるため、図４
に示すように半導体装置１の上面に円筒状の突き出しピ
ン、いわゆるイジェクタ−ピン２、ランナ−３上面にイ
ジェクタ−ピン４を上型５内に配置し、半導体装置１の
下面にイジェクタ−ピン６を下型７に配置し、樹脂封止
終了後、上型５と下型７を開く際にイジェクタ−ピン
２、４、６が突き出し、半導体装置を樹脂封止金型内よ
り取り出していた。2. Description of the Related Art As a conventional method of manufacturing a semiconductor device of this type, a lead frame electrically connecting a semiconductor element and a metal connector is placed in a resin-sealing die, and the resin-sealing is performed. To do. At this time, since there is an adhesive force between the resin and the mold, as shown in FIG.
As shown in FIG. 1, a cylindrical protruding pin, a so-called ejector pin 2, and an ejector pin 4 on the upper surface of the runner-3 are arranged in the upper mold 5 as shown in FIG. Was placed in the lower mold 7, and after the resin sealing was completed, the ejector pins 2, 4 and 6 were projected when the upper mold 5 and the lower mold 7 were opened, and the semiconductor device was taken out from the resin-sealed mold.
【０００３】この後半導体装置上面に極性マ−ク、製品
名等捺印するが、図５に示すように半導体装置上面にイ
ジェクタ−ピン２による凹凸２−ａが形成さるため、捺
印に影響の無い位置にイジェクタ−ピンを配置してい
た。 （２）After that, the polar mark, the product name, etc. are imprinted on the upper surface of the semiconductor device. However, as shown in FIG. 5, since the unevenness 2-a is formed by the ejector pins 2 on the upper surface of the semiconductor device, the marking is not affected. The ejector pin was placed in position. (2)
【０００４】しかし、半導体装置が小型になるとイジェ
クタ−ピン２を配置できず、図６のようにイジェクタ−
ピン４だけで上型５より半導体装置１を取り出していた
が、イジェクタ−ピン４が突き出すとランナ−３と共に
リ−ドフレ−ム８が押し下げられ、半導体装置１とリ−
ドフレ−ム８の界面に応力が集中し信頼性を低下させて
いた。However, when the semiconductor device becomes small, the ejector pin 2 cannot be arranged, and the ejector pin 2 is arranged as shown in FIG.
Although the semiconductor device 1 was taken out from the upper mold 5 only by the pin 4, when the ejector pin 4 protrudes, the lead frame 8 is pushed down together with the runner-3, and the semiconductor device 1 and the lead device 8 are removed.
Stress concentrates on the interface of the dframe 8 and reduces reliability.
【０００５】図４は従来の樹脂封止金型の構造図、図５
は従来の樹脂封止終了後の外観図、図６は従来の小型半
導体装置の樹脂封止金型の構造図であり、１は半導体装
置、２は半導体装置上面のイジェクタ−ピン、３はラン
ナ−、４はランナ−上のイジェクタ−ピン、５は上型、
６は半導体装置下面のイジェクタ−ピン、７は下型、８
はリ−ドフレ−ム、２−ａはイジェクタ−ピン２による
半導体装置表面の凹凸、４−ａはイジェクタ−ピン４に
よる半導体装置表面の凹凸である。FIG. 4 is a structural diagram of a conventional resin sealing mold, and FIG.
6 is an external view after the conventional resin sealing is completed, FIG. 6 is a structural diagram of a resin sealing mold of a conventional small semiconductor device, 1 is a semiconductor device, 2 is an ejector pin on the upper surface of the semiconductor device, 3 is a runner -4 is an ejector pin on the runner, 5 is an upper mold,
6 is an ejector pin on the lower surface of the semiconductor device, 7 is a lower die, 8
Is a lead frame, 2-a is unevenness of the semiconductor device surface due to the ejector pin 2, and 4-a is unevenness of the semiconductor device surface due to the ejector pin 4.
【０００６】[0006]
【発明が解決しようとする課題】解決しようとする課題
は、小型半導体装置の樹脂封止工程において半導体装置
上面のイジェクタ−ピンは、捺印の妨げとなるため配置
できず、信頼性を低下させていることである。The problem to be solved is that the ejector pin on the upper surface of the semiconductor device cannot be arranged because it interferes with the marking in the resin sealing process of the small semiconductor device, which lowers the reliability. It is that you are.
【０００７】[0007]
【課題を解決するための手段】樹脂封止金型内に具備さ
れる半導体装置上面のイジェクタ−ピンを、極性マ−ク
捺印位置に配置すると共に半導体装置と接する面を粗面
とした。An ejector pin on the upper surface of a semiconductor device provided in a resin-sealed mold is arranged at a polar mark marking position, and a surface in contact with the semiconductor device is roughened.
【０００８】[0008]
【実施例】図１は本発明の一例を示す樹脂封止金型の構
造図であり、本発明の要部は、樹脂封止金型上型５内に
具備される半導体装置上面のイジェクタ−ピン９を極性
マ−ク捺印位置９−ａに配置すると共に、半導体装置１
と接する面を粗 （３） 面としたことを特徴とする。なお、図１の実施例では半
導体装置上面を上型に配置したが、下型に半導体装置上
面を配置してもよい。又、イジェクタ−ピンの形状は角
型が好ましいが、任意の形状にしてもよい。FIG. 1 is a structural view of a resin-sealing mold showing an example of the present invention. The essential part of the present invention is an ejector on the upper surface of a semiconductor device provided in a resin-sealing mold upper die 5. The pin 9 is arranged at the polarity marking position 9-a and the semiconductor device 1
It is characterized in that the surface in contact with is a rough (3) surface. Although the upper surface of the semiconductor device is arranged in the upper mold in the embodiment of FIG. 1, the upper surface of the semiconductor device may be arranged in the lower mold. Further, the ejector pin is preferably rectangular in shape, but may have any shape.
【０００９】[0009]
【発明の効果】図２は本発明の製造方法により樹脂封止
した半導体装置の実施例であり、図３は品名等捺印後の
半導体装置である。本発明により半導体装置とリ−ドフ
レ−ム界面への応力が緩和され、信頼性の低下がなく、
良好な捺印面が得られると共に極性マ−クを、樹脂封止
時に形成でき、産業上の効果大なるものである。FIG. 2 shows an embodiment of a semiconductor device which is resin-sealed by the manufacturing method of the present invention, and FIG. 3 shows a semiconductor device after marking such as a product name. According to the present invention, the stress on the interface between the semiconductor device and the lead frame is relaxed, and the reliability is not lowered.
A good marking surface can be obtained, and a polar mark can be formed at the time of resin sealing, which is a great industrial effect.
【図１】本発明の一実施例を示す樹脂封止金型の構造図FIG. 1 is a structural diagram of a resin sealing mold showing an embodiment of the present invention.
【図２】本発明の製造方法により樹脂封止した半導体装
置の平面図FIG. 2 is a plan view of a semiconductor device resin-sealed by the manufacturing method of the present invention.
【図３】品名等捺印後の半導体装置の平面図FIG. 3 is a plan view of the semiconductor device after marking of product names and the like.
【図４】従来の樹脂封止金型の構造図FIG. 4 is a structural diagram of a conventional resin sealing mold.
【図５】従来の樹脂封止終了後の半導体装置の平面図FIG. 5 is a plan view of a semiconductor device after completion of conventional resin sealing.
【図６】従来の小型半導体装置の樹脂封止金型の構造図FIG. 6 is a structural diagram of a conventional resin-sealed mold for a small semiconductor device.
１ 半導体装置 ２ 半導体装置上面のイジェクタ−ピン ２−ａ イジェクタ−ピン２との接触面 （４） ３ ランナ− ４ ランナ−上のイジェクタ−ピン ４−ａ イジェクタ−ピン４との接触面 ５ 上型 ６ 半導体装置下面のイジェクタ−ピン ７ 下型 ８ リ−ドフレ−ム ９ イジェクタ−ピン ９−ａ イジェクタ−ピン９との接触面 １０ 捺印文字 1 Semiconductor Device 2 Ejector Pin on Top of Semiconductor Device 2-a Contact Surface with Ejector Pin 2 (4) 3 Runner 4 Ejector Pin on Runner 4-a Contact Surface with Ejector Pin 4 5 Upper Die 6 Ejector pin on the bottom surface of the semiconductor device 7 Lower die 8 Lead frame 9 Ejector pin 9-a Contact surface with ejector pin 9 10 Stamp character
Claims (2)
したリ−ドフレ−ムを樹脂封止金型内に配置し、樹脂を
射出することにより半導体装置を樹脂封止する製造方法
において、極性マ−クを樹脂封止金型内に具備されるイ
ジェクタ−ピンにより形成したことを特徴とする半導体
装置の製造方法。1. A manufacturing method in which a semiconductor element and a lead frame in which a metal connector is electrically connected are arranged in a resin-sealing mold, and a semiconductor device is resin-sealed by injecting resin. A method of manufacturing a semiconductor device, wherein the polar mark is formed by an ejector pin provided in a resin-sealed mold.
封止金型内に具備されるイジェクタ−ピンを角型とし、
且つ半導体装置に接触する面を粗面としたことを特徴と
する特許請求の範囲１項記載の半導体装置の製造方法。2. An ejector pin provided in a resin-sealed mold located in a polar mark portion of a semiconductor device is a square type,
The method for manufacturing a semiconductor device according to claim 1, wherein the surface in contact with the semiconductor device is a rough surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12574792A JPH06151647A (en) | 1992-04-17 | 1992-04-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12574792A JPH06151647A (en) | 1992-04-17 | 1992-04-17 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06151647A true JPH06151647A (en) | 1994-05-31 |
Family
ID=14917807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12574792A Pending JPH06151647A (en) | 1992-04-17 | 1992-04-17 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06151647A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6942478B2 (en) * | 2001-10-12 | 2005-09-13 | Advanced Semiconductor Engineering, Inc. | Packaging mold with electrostatic discharge protection |
-
1992
- 1992-04-17 JP JP12574792A patent/JPH06151647A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6942478B2 (en) * | 2001-10-12 | 2005-09-13 | Advanced Semiconductor Engineering, Inc. | Packaging mold with electrostatic discharge protection |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4688152A (en) | Molded pin grid array package GPT | |
| JPH0414497A (en) | Thin semiconductor device | |
| JPH06151647A (en) | Manufacture of semiconductor device | |
| JPH065645A (en) | Resin molding of semiconductor element | |
| JP3039188B2 (en) | Electronic component manufacturing method | |
| JP2000025069A (en) | Production of insert resin molded circuit board | |
| JPH0621127A (en) | Sealing metal mold for resin molded ic | |
| JPS62221138A (en) | Semiconductor device and mold used for manufacture thereof | |
| JP2514818B2 (en) | Resin sealing method for integrated circuit board | |
| JP2502387B2 (en) | Resin encapsulation method for semiconductor element and resin encapsulation mold | |
| JPH0510360Y2 (en) | ||
| JPH0563111A (en) | Semiconductor device | |
| JPS62117347A (en) | Resin seal method for semiconductor device | |
| JPH03110847U (en) | ||
| JPH01184192A (en) | Preparation of module for ic card | |
| JP2837777B2 (en) | Resin-sealed semiconductor device | |
| JPS58114045U (en) | semiconductor equipment | |
| JPS62238616A (en) | Packaging of electronic parts | |
| JPS6096424A (en) | Molding die | |
| JPH029692A (en) | Module for ic card | |
| JPH04177844A (en) | Production of resin-sealed semiconductor device | |
| JPH0750719B2 (en) | Resin encapsulation method for thin products | |
| JPS63162206A (en) | Resin molding apparatus | |
| JPH0258243A (en) | Manufacture of semiconductor device with heat sink | |
| JPH08118401A (en) | Molding device for electronic parts |