JPH06151626A - Semiconductor package - Google Patents

Semiconductor package

Info

Publication number
JPH06151626A
JPH06151626A JP29835792A JP29835792A JPH06151626A JP H06151626 A JPH06151626 A JP H06151626A JP 29835792 A JP29835792 A JP 29835792A JP 29835792 A JP29835792 A JP 29835792A JP H06151626 A JPH06151626 A JP H06151626A
Authority
JP
Japan
Prior art keywords
semiconductor package
electromagnetic noise
semiconductor
elements
magnetic powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP29835792A
Other languages
Japanese (ja)
Inventor
Kazuo Murata
和夫 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP29835792A priority Critical patent/JPH06151626A/en
Publication of JPH06151626A publication Critical patent/JPH06151626A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To provide a semiconductor package which improves electromagnetic noise radiation property and stable operation property under electromagnetic noise circumstance easily and cheaply. CONSTITUTION:This is a semiconductor package 10 for accommodating a semiconductor element and other elements, and the semiconductor package body 11 consists of plastic resin wherein magnetic powder is mixed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体素子等のエレメン
ト(チップ)を収容する半導体パッケージに関し、特に
電磁雑音放射特性、電磁雑音環境下での安定動作性の改
善を図るように工夫したものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package that accommodates elements (chips) such as semiconductor elements, and is particularly designed to improve electromagnetic noise emission characteristics and stable operability in an electromagnetic noise environment. is there.

【0002】[0002]

【従来の技術】半導体素子その他のエレメント(チッ
プ)は外部雰囲気からしゃ断するために半導体パッケー
ジに収容されており、その初期の特性値を保持すると共
に、熱的・電機的導出,電極間の絶縁距離の確保を行っ
ている。
2. Description of the Related Art Semiconductor elements and other elements (chips) are housed in a semiconductor package in order to shield them from the external atmosphere, and retain their initial characteristic values, as well as thermal / electrical derivation and insulation between electrodes. The distance is secured.

【0003】従来この半導体パッケージに用いられるパ
ッケージ本体の材質としては、金属,セラミック,プラ
スチック樹脂等がその用途等に応じて使用されている。
Conventionally, as the material of the package body used in this semiconductor package, metal, ceramics, plastic resin, etc. have been used according to the application.

【0004】[0004]

【発明が解決しようとする課題】ところで半導体パッケ
ージ本体の材質としては上述した中でも、量産性及び価
格の低廉性からプラスチック樹脂が多用されているが、
その構造上、シールドすることが極めて困難であるた
め、電磁雑音の放射や電磁雑音環境下の安定動作という
点では問題がある。
Among the materials mentioned above for the semiconductor package body, plastic resin is often used because of its mass productivity and low cost.
Since it is extremely difficult to shield due to its structure, there are problems in terms of radiation of electromagnetic noise and stable operation in an electromagnetic noise environment.

【0005】このため、従来ではインダクタンス素子を
付加して安定化を図っており、その設置に場所をとると
共に安価に製造することができないという問題がある。
For this reason, conventionally, an inductance element is added for stabilization, and there is a problem in that it cannot be manufactured inexpensively while taking up space for its installation.

【0006】本発明は上記問題に鑑み、容易かつ安価に
電磁雑音放射特性,電磁雑音環境下での安定動作性の改
善を図った半導体パッケージを提供することを目的とす
る。
In view of the above problems, it is an object of the present invention to provide a semiconductor package which improves the electromagnetic noise emission characteristics and the stable operability in an electromagnetic noise environment easily and inexpensively.

【0007】[0007]

【課題を解決するための手段】前記目的を達成する本発
明に係る半導体パッケージの構成は、半導体素子,その
他のエレメントを収容する半導体パッケージであって、
該半導体パッケージ本体が磁性体粉末を混入してなるプ
ラスチック樹脂からなることを特徴とする。
The structure of a semiconductor package according to the present invention which achieves the above object is a semiconductor package containing a semiconductor element and other elements,
The semiconductor package body is made of a plastic resin mixed with magnetic powder.

【0008】[0008]

【作用】磁性体を混入したプラスチックで半導体素子等
をモールドすることで半導体パッケージに出入りするリ
ード全てに対してインダクタンスを付加するのと同等の
効果が得られ、電磁雑音放射特性、電磁雑音環境下での
安定動作性の改善を行なうことができる。
[Function] By molding a semiconductor element or the like with plastic mixed with a magnetic material, an effect equivalent to adding inductance to all leads entering and leaving a semiconductor package can be obtained. It is possible to improve stable operability in.

【0009】[0009]

【実施例】以下、本発明の好適な実施例を詳細に説明す
る。
The preferred embodiments of the present invention will be described in detail below.

【0010】図1は、本実施例に係る半導体パッケージ
を用いたプラスチックモールドICの斜視図を示す。同
図に示すように、プラスチックモールドIC10は、I
C,LSI等のエレメント(チップ)を半導体パッケー
ジ11内に収納してなり、周辺回路と電気的接続するた
めのリード(ピン)12が形成されている。
FIG. 1 is a perspective view of a plastic mold IC using a semiconductor package according to this embodiment. As shown in the figure, the plastic mold IC 10 is
Elements (chips) such as C and LSI are housed in a semiconductor package 11, and leads (pins) 12 for electrically connecting with peripheral circuits are formed.

【0011】上記半導体パッケージ11はプラスチック
樹脂からなり、当該樹脂には例えばフェライト,アモル
ファス合金等の磁性体粉末が混入されている。また、そ
の混入量は30〜60重量%程度とするのが好ましい。
これは30重量%未満の添加では電磁雑音特性の改善を
図ることができないからであり、また60重量%を超え
て添加してもその増量効果がなく、共に好ましくないか
らである。この結果、従来のように、特別なインダクタ
ンス素子を付加することなく、容易かつ安価に電磁雑音
放射特性.電磁雑音環境下での安定動作性の改善を行な
うことができた。
The semiconductor package 11 is made of plastic resin, and magnetic powder such as ferrite or amorphous alloy is mixed in the resin. Further, it is preferable that the mixed amount thereof is about 30 to 60% by weight.
This is because the addition of less than 30% by weight cannot improve the electromagnetic noise characteristics, and the addition of more than 60% by weight has no effect of increasing the amount and both are not preferable. As a result, unlike the conventional case, the electromagnetic noise emission characteristics can be easily and inexpensively added without adding a special inductance element. It was possible to improve the stable operation under the electromagnetic noise environment.

【0012】本実施例では図1にはプラスチックモール
ドIC10としてピン挿入実装方式のSingle In-line P
ackage(SIP)を一例として説明したが、他のピン挿
入実装方式では図2に示すDIP(Dual In-line Packa
ge)あるいはPGA(Pin Gried Arry)等を例示するこ
とができる。また、表面実装方式のものでは、図3に示
すようなSOP(Small Out-line Package )あるいはL
CC(Lead less Chip Carrier),SOP(Small Out-
linePackage),SOJ(Small Out-line J-lead Packa
ge ),QFJ(Quad FlatJ-lead Package)等を例示す
ることができる。
In this embodiment, as shown in FIG. 1, a plastic mold IC 10 is a single in-line P of a pin insertion mounting type.
Although the ackage (SIP) has been described as an example, the DIP (Dual In-line Packa) shown in FIG.
ge) or PGA (Pin Gried Arry) or the like. In the case of the surface mount type, the SOP (Small Out-line Package) or L as shown in FIG. 3 is used.
CC (Lead less Chip Carrier), SOP (Small Out-
linePackage), SOJ (Small Out-line J-lead Packa)
ge), QFJ (Quad Flat J-lead Package) and the like.

【0013】[0013]

【発明の効果】以上実施例と共に述べたように本発明に
係る半導体パッケージは、樹脂製のパッケージ本体に磁
性体粉末を混入してなるので、従来のような特別なイン
ダクタンス素子を付加することなく、容易かつ安価に、
また高密度実装性を損なうことなく、電磁雑音放射特性
の改善を行なうことができる。
As described in connection with the above embodiments, the semiconductor package according to the present invention is made by mixing the magnetic powder in the resin package body, so that no special inductance element like the conventional one is added. Easy and cheap,
In addition, the electromagnetic noise emission characteristics can be improved without impairing the high-density mounting property.

【図面の簡単な説明】[Brief description of drawings]

【図1】SIPプラスチックモールドICの斜視図であ
る。
FIG. 1 is a perspective view of a SIP plastic mold IC.

【図2】DIPプラスチックモールドICの斜視図であ
る。
FIG. 2 is a perspective view of a DIP plastic mold IC.

【図3】SOPプラスチックモールドICの斜視図であ
る。
FIG. 3 is a perspective view of an SOP plastic mold IC.

【符号の説明】[Explanation of symbols]

10 プラスチックモールドIC 11 半導体パッケージ 12 リード(ピン) 10 Plastic mold IC 11 Semiconductor package 12 Lead (pin)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子,その他のエレメントを収容
する半導体パッケージであって、該半導体パッケージ本
体が磁性体粉末を混入してなるプラスチック樹脂からな
ることを特徴とする半導体パッケージ。
1. A semiconductor package for housing a semiconductor element and other elements, wherein the semiconductor package body is made of a plastic resin mixed with magnetic powder.
JP29835792A 1992-11-09 1992-11-09 Semiconductor package Withdrawn JPH06151626A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29835792A JPH06151626A (en) 1992-11-09 1992-11-09 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29835792A JPH06151626A (en) 1992-11-09 1992-11-09 Semiconductor package

Publications (1)

Publication Number Publication Date
JPH06151626A true JPH06151626A (en) 1994-05-31

Family

ID=17858645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29835792A Withdrawn JPH06151626A (en) 1992-11-09 1992-11-09 Semiconductor package

Country Status (1)

Country Link
JP (1) JPH06151626A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997002596A1 (en) * 1995-06-30 1997-01-23 Kabushiki Kaisha Toshiba Electronic component and method of production thereof
JP2006160560A (en) * 2004-12-07 2006-06-22 Nitto Denko Corp Spherical sintered ferrite particle and resin composition for semiconductor sealing using the same, and semiconductor unit obtained by using the resin composition
WO2007141843A1 (en) 2006-06-06 2007-12-13 Nitto Denko Corporation Spherical sintered ferrite particle, semiconductor sealing resin composition making use of the same and semiconductor device obtained therewith

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997002596A1 (en) * 1995-06-30 1997-01-23 Kabushiki Kaisha Toshiba Electronic component and method of production thereof
US6262513B1 (en) 1995-06-30 2001-07-17 Kabushiki Kaisha Toshiba Electronic component and method of production thereof
US6628043B2 (en) 1995-06-30 2003-09-30 Kabushiki Kaisha Toshiba Electronic component and method of production thereof
US6754950B2 (en) 1995-06-30 2004-06-29 Kabushiki Kaisha Toshiba Electronic component and method of production thereof
JP2006160560A (en) * 2004-12-07 2006-06-22 Nitto Denko Corp Spherical sintered ferrite particle and resin composition for semiconductor sealing using the same, and semiconductor unit obtained by using the resin composition
JP4651004B2 (en) * 2004-12-07 2011-03-16 戸田工業株式会社 Spherical sintered ferrite particles, resin composition for semiconductor encapsulation using the same, and semiconductor device obtained using the same
WO2007141843A1 (en) 2006-06-06 2007-12-13 Nitto Denko Corporation Spherical sintered ferrite particle, semiconductor sealing resin composition making use of the same and semiconductor device obtained therewith

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20000201