JPH06140929A - Voltage controlled oscillator circuit - Google Patents

Abstract

PURPOSE:To obtain the VCO in which the adjustment of the frequency is not required by preventing it that an oscillation center frequency is fluctuated due to dispersion in the manufacture condition when the voltage controlled oscillator circuit (VCO) is realized by a semiconductor integrated circuit. CONSTITUTION:The circuit is provided with a phase locked loop(PLL) section 111 receiving a reference frequency Vref, implementing feedback control so that a delay time of a variable delay circuit 108 in a loop is constant and a voltage attended with feedback control is outputted and an oscillator 104 of almost the same configuration as the variable delay circuit 108, a VCO section 106 whose oscillating frequency VVCO is controlled based on a received control voltage VCONT and an output voltage VOFF from the PLL section 111 and the center oscillating frequency is set by controlling a charge/discharge time of the oscillator.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit voltage controlled oscillator (VCR) used in, for example, a color signal processing circuit of a VTR.
Abbreviated as O), especially phase-locked loop (Phase Lo
cked Loop: VCO using (hereinafter abbreviated as PLL)
Regarding

[0002]

2. Description of the Related Art An example of a conventional VCO is shown in FIG. In the figure, 1, 2, 3, 4, 9, 10, 11, and 12 are all NPN transistors, and transistors 1 and 2
Form a differential circuit with a capacitor 1 between each collector
7 is connected. The collectors are connected to the emitters of the transistors 3 and 4, and the bases are connected to the emitters of the transistors 11 and 12 and the constant current source 1 respectively.
4, 16 are connected. Furthermore, the respective emitters are connected to each other and to the current source 15 controlled by the control voltage Vcont.

On the other hand, the base of the transistor 3 is connected to the emitter of the transistor 10 and the collector and base of the transistor 12, and the base of the transistor 4 is connected to the emitter of the transistor 9 and the collector and base of the transistor 11. The collectors of the transistors 3 and 4 are respectively a parallel circuit of a resistor 5 and a diode 7, and a resistor 6
Through a parallel circuit of a diode and a diode 8
It is connected to the power supply terminal 13 together with each collector of 0. In addition,
The output terminal 17 is connected to the connection point of the transistors 9 and 11, and the output terminal 1 is connected to the connection point of the transistors 10 and 12.
8 are connected.

The operation of this VCO will be briefly described with reference to the timing chart of FIG. At time t0, the base voltage of transistor 3 turns on transistor 3 and turns off transistor 4. At this time, the emitter voltage of the transistor 3 becomes constant and the emitter voltage of the transistor 4 gradually decreases. Then, at time t1, when the emitter voltage of the transistor 4 decreases to a predetermined value, the transistor 4 turns from off to on. Then, the emitter voltage of the transistor 3 instantly increases and then gradually decreases. When it decreases to a predetermined value at time t2, the transistor 3 is turned on and the transistor 4 is turned off. In this way, the transistors 3 and 4 are alternately turned on and off repeatedly to continue oscillation and obtain an oscillation output. The output of this VCO is output 1
Signals that are inverted from each other are output from 7 and the output terminal 18.

[0005]

In the above VCO, assuming that the current value of the current source 15 is I, the capacitance value of the capacitor 17 is C, and the voltage between both ends of the diodes 7 and 8 is VD, the oscillation of this oscillation circuit is performed. The frequency f is given by the following equation. f = I / 4CVD (1) However, when this VCO is formed on a semiconductor integrated circuit, if I, C, and VD in the equation (1) change greatly due to variations in manufacturing conditions (process parameters), the charge of the VCO may be changed. The discharge time is changed, and the oscillation center frequency is greatly changed. Therefore, the characteristics of the PLL system using this VCO may be adversely affected,
In order to avoid this, there is a problem that extremely complicated adjustment is required. It is an object of the present invention to provide a VCO in which the oscillation center frequency does not depend on variations in manufacturing conditions and can be adjusted.

[0006]

According to the present invention, a PLL for inputting a reference frequency, performing feedback control so that the delay time of a variable delay circuit inside a loop is constant, and outputting a voltage associated with this feedback control. And a VCO unit whose oscillation frequency is controlled based on an input control voltage and an output voltage from the PLL unit.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. The VCO shown in FIG. 1 is formed on a chip of a semiconductor integrated circuit, and 106 is a VCO section and 111 is a PLL section. The PLL unit 111 receives the input signal 103 of the reference frequency Fref and performs feedback control so that the delay time of the variable delay circuit 108 inside the loop becomes constant. Further, the VCO unit 106 receives the input signal 102 of the control voltage Vcont and the output Voff of the low-pass filter 110 in the phase locked loop of the PLL unit 111, and the charge / discharge time of the oscillator is controlled by the input. The oscillation frequency fvco of the oscillation output 101 is determined.

Next, each of the above parts will be described in detail. The reference input signal fref is supplied to the variable delay circuit 10 in the PLL unit 111.
8 as well as one input of the phase comparator 109. The output of the variable delay circuit 108 is the phase comparator 1
It is the other input of 09. The phase comparator 109 compares the phase relationship between two inputs and outputs the comparison result. The output of the phase comparator 109 is input to the first conversion circuit 107 via the low pass filter 110. The conversion circuit 107 outputs a control signal for controlling the delay time of the variable delay circuit 108 according to the output of the low-pass filter 110, and the output controls the delay time of the variable delay circuit 108. On the other hand, in the VCO unit 106, the output Voff of the low-pass filter 110 and the control voltage Vcont are input to the second conversion circuit 105, and the output of the conversion circuit 105 has the same configuration as the variable delay circuit 108. It becomes the charge / discharge time control input of the VCO 104.

FIG. 2 shows an example of the variable delay circuit 108. The variable delay circuit 108 includes the conventional VCO shown in FIG. 4 and the VCO 104 of this embodiment except for the connection of some transistors. The configurations are almost the same. Therefore, the equivalent parts are denoted by the same reference numerals with A added.
That is, 1A, 2A, 3A, 4A, 9A, 10A, 11
A and 12A are all NPN transistors, transistors 1A and 2A form a differential circuit, a capacitor 17A is connected between the collectors of each, and the emitters of transistors 3A and 4A are connected to each collector. Further, each base is connected to the input ends 19A and 20A, respectively. Further, the respective emitters are connected to each other, and the current source 15A controlled by the output Voff of the low pass filter 110 is connected.

On the other hand, the base of the transistor 3A is connected to the emitter of the transistor 10A and the collector and base of the transistor 12A, and the base of the transistor 4A is connected to the emitter of the transistor 9A and the collector and base of the transistor 11A. Each transistor 3
The collectors of A and 4A are resistor 5A and diode 7 respectively.
It is connected to the power supply terminal 13A together with the collectors of the transistors 9A and 10A through the parallel circuit of A and the parallel circuit of the resistor 6A and the diode 8A. In addition, the transistor 9
An output end 17A is connected to the connection point of A and 11A, and an output end 18A is connected to the connection point of the transistors 10A and 12A. And, to each of the input terminals 19A and 20A,
The signals of the reference frequency Fref which are mutually inverted are input. Further, the output terminals 17A and 18A output mutually inverted signals and are input to one input of the phase comparator 109. Therefore, the output signal of the low-pass filter 110 changes the delay time of the variable delay circuit 108.

Next, the operation of the variable delay circuit 108 will be described with reference to FIG.
A brief description will be given with reference to the Timig diagram. At time t0, the transistor 1A is turned on and the transistor 2A is turned off as shown in the figure. At this time, the emitter voltage of the transistor 4A becomes constant and the emitter voltage of the transistor 3A gradually decreases as shown in the figure. When the emitter voltage of the transistor 3A decreases to a predetermined value, the transistor 3A turns from off to on and the transistor 4A Is turned off, and the outputs of the output terminals 17A and 18A change. Then, at time t1, the transistor 4A
When the emitter voltage of is reduced to a predetermined value, the transistor 4A is turned on, the transistor 3A is turned off, and the outputs of the output terminals 17A and 18A change. In this way, a signal with a constant delay time can be output to the input terminals 19A and 20A.

In the variable delay circuit 108, the current value of the current source 15A is IO, the capacitance value of the capacitor 17A is C ', and the voltage across the diodes 7A and 8A is VD.
′ And the period of the input reference frequency Fref is Tref, the delay time T1A of the variable delay circuit 108 is given by the following equation. T1A = 2C'VD '/ IO = Tref / 2 (2)

Next, the operation of the PLL section 111 will be described. Now, the delay time of the variable delay circuit 108 is Tre
When it is smaller than f / 2 (Tref is the period of Fref input), a signal subjected to phase comparison by the phase comparator 109 is output, the potential of the output Voff of the low-pass filter 110 is lowered, and the current source is supplied via the conversion circuit 107. The current value Io of 15 decreases. This increases the delay time T1A of the variable delay circuit 108. On the contrary, when the delay time of the variable delay circuit 108 is larger than Tref / 2, the phase-compared signal is output by the phase comparator 109, and the potential of the output Voff of the low-pass filter 110 rises, Conversion circuit 107
The current value Io of the current source 15 increases via the. This reduces the delay time T1A of the variable delay circuit 108. When the delay time of the variable delay circuit 108 becomes equal to Tref / 2 and the PLL loop is in the synchronous state,
The output Voff of the low-pass filter 110 becomes constant, and the delay amount of the variable delay circuit 108 remains constant. Therefore,
The delay time of the variable delay circuit 108 will be controlled very accurately.

On the other hand, in the VCO section 106, the control voltage Vcont and the output Voff of the low-pass filter 110 are converted into the conversion circuit 1.
By being converted by 05 and supplied to the current source 15, the current value I of the current source 15 is determined, and the oscillation frequency of the VCO 104 becomes constant. The oscillation frequency Fvco at this time is Fvco = I / 4CVd = (C '/ C) (1 / Tref) ± Icont / 4CVD (where VD' = VD, Icont is the amount of change of the current source 15 by Vcont input) . Therefore, the center frequency is C '
If determined by / C, an oscillation output with a stable center frequency can be obtained without depending on variations in manufacturing conditions. Further, if the level of the control voltage Vcont is changed, the current value of the current source 15 is changed by the conversion circuit 105 and the oscillation frequency Fvco is changed.

[0015]

As described above, the VCO of the present invention can determine the center frequency of the oscillation frequency by controlling the charging / discharging time of the charging / discharging circuit, and this charging / discharging time has the same configuration as the oscillator. Since it can be controlled with high precision by the phase locked loop including, it is possible to obtain a stable center frequency that does not depend on variations in manufacturing conditions. Further, the center frequency can be set arbitrarily by changing the delay time of the delay circuit, and the band of the oscillation frequency can be set arbitrarily.

[Brief description of drawings]

FIG. 1 is a block diagram of one embodiment of a VCO of the present invention.

FIG. 2 is a circuit diagram of an example of the variable delay circuit of FIG.

FIG. 3 is a timing chart for explaining the operation of the variable delay circuit.

FIG. 4 is a circuit diagram showing an example of a conventional VCO.

5 is a timing chart for explaining the operation of the VCO shown in FIG.

[Explanation of symbols]

1, 2, 3, 4, 9, 10, 11, 12, 1A, 2A,
3A, 4A, 9A, 10A, 11A, 12A NPN transistor 5, 6, 5A, 6A resistor 7, 8, 7A, 8A diode 14, 16, 14A, 16A constant current source 15, 15A control type current source 17, 17A capacitor 104 Voltage Controlled Oscillator 105 Second Conversion Circuit 106 Voltage Controlled Oscillation Unit 107 First Conversion Circuit 108 Variable Delay Circuit 109 Phase Comparator 110 Low-pass Filter 111 Phase Lock Loop Unit

Claims (1)

[Claims] 1. A phase-locked loop unit for inputting a reference frequency, performing feedback control so that the delay time of a variable delay circuit inside the loop is constant, and outputting a voltage associated with this feedback control, and the variable delay circuit. A voltage including a voltage controlled oscillator having substantially the same configuration as the circuit, and a voltage controlled oscillator having an oscillation frequency controlled based on an input control voltage and an output voltage from the phase locked loop unit. Control oscillator circuit.