JPH10271001A - Oscillation controller - Google Patents

Oscillation controller

Info

Publication number
JPH10271001A
JPH10271001A JP9068464A JP6846497A JPH10271001A JP H10271001 A JPH10271001 A JP H10271001A JP 9068464 A JP9068464 A JP 9068464A JP 6846497 A JP6846497 A JP 6846497A JP H10271001 A JPH10271001 A JP H10271001A
Authority
JP
Japan
Prior art keywords
oscillation
frequency
voltage
control
vco
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9068464A
Other languages
Japanese (ja)
Inventor
Shinobu Nakamura
忍 中村
Mamoru Akita
秋田  守
Yoshiharu Ito
義治 伊藤
Mamoru Kudo
守 工藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9068464A priority Critical patent/JPH10271001A/en
Publication of JPH10271001A publication Critical patent/JPH10271001A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00Stabilisation of generator output against variations of physical values, e.g. power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/10Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/104Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using an additional signal from outside the loop for setting or controlling a parameter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/06Phase locked loops with a controlled oscillator having at least two frequency control terminals

Landscapes

  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Rotational Drive Of Disk (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an oscillation controller in which C/N of a voltage controlled oscillator means is improved to correct a characteristic change due to manufacture tolerance and temperature, thereby attaining an oscillation operation suitable for the operating environment of a phase locked loop including the voltage controlled oscillator means. SOLUTION: A control section 106 gives a control signal CS to a selector 107 so as to' allow the selector 107 to give a control voltage Vc to a voltage controlled oscillator(VCO) 103 in the case of monitoring an oscillated frequency from the VCO 103 and a measurement section 105 measures the oscillated frequency of the VCO 103 at that time. Then the control section 106 recognizes the operating environment (opraating temperature) of the VCO 103 and manufacture tolerance of the VCO 103 itself based on the result FMR of the measurement by the measurement section 105 and a desired oscillating frequency and selects an optimum oscillating frequency band among pluralities of the oscillating frequency bands of the VCO 103 and gives a control signal CB to the VCO 103 so as to set the selected oscillating frequency band to the VCO 103.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電圧制御発振手段
を備えた発振制御装置に係り、特に、電圧制御発振手段
のC/Nを改善し、電圧制御発振手段の製造ばらつき及
び温度による特性変化を補正して使用環境に適合した発
振動作を可能とした発振制御装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation control device provided with a voltage controlled oscillator, and more particularly, to an improvement in the C / N ratio of the voltage controlled oscillator, and a variation in the characteristics of the voltage controlled oscillator due to manufacturing variations and temperature. The present invention relates to an oscillation control device that enables oscillation operation suitable for a use environment by correcting the above.

【0002】[0002]

【従来の技術】近年、電子機器の複雑化及び多用途化等
に伴い、多方面で使用されている電子機器において周波
数シンセサイザ、サーボ系の速度制御、或いは検波・復
調等に利用されている位相同期ループ(以下、PLL;
Phase-Locked Loopという)回路についても、発振周波
数が広範囲に亘る周波数帯域で使用可能であることが要
求されてきている。
2. Description of the Related Art In recent years, with the increasing complexity and versatility of electronic equipment, the phase used in frequency synthesizers, servo system speed control, detection / demodulation, etc. in electronic equipment used in various fields. Synchronous loop (hereinafter, PLL;
A phase-locked loop (circuit) is also required to be usable in an oscillation frequency band over a wide range.

【0003】例えば現在、CD−ROM市場はより高速
再生化へ進んでおり、CD−ROM用の信号処理LSI
では、1倍速からより高速再生を実現する超高速のn倍
速、例えば16倍速等まで対応可能なものが要求されて
いる。CD−ROM用の信号処理LSIでは、必要な発
振周波数を得るための手段としてPLL回路を内部に構
成しているが、高速再生を実現するためには、最大発振
周波数の高い電圧制御発振器(以下、VCO;Voltage
Controlled Oscillatorという)を内蔵しなければなら
ない。
For example, at present, the CD-ROM market is proceeding to higher-speed reproduction, and a signal processing LSI for CD-ROM is being used.
In this case, there is a demand for a device capable of handling an ultra-high speed n-times speed for realizing higher-speed reproduction, for example, a 16-times speed or the like. In a signal processing LSI for CD-ROM, a PLL circuit is internally provided as a means for obtaining a required oscillation frequency. However, in order to realize high-speed reproduction, a voltage-controlled oscillator (hereinafter, referred to as a high-frequency oscillator having a high maximum oscillation frequency). , VCO; Voltage
Controlled Oscillator).

【0004】この場合、n倍速時に必要な発振周波数f
nは、以下の式で求めることができる。
In this case, the oscillation frequency f required at the time of n times speed is
n can be obtained by the following equation.

【数1】 fn=4.3218×6×n[MHz] (1) 即ち、オーディオ再生を目的とした1倍速再生では、P
LL回路内部のVCOに要求される発振周波数は約25
[MHz]であり、また、16倍速のCD−ROM用信
号処理で必要となる発振周波数は約415[MHz]で
ある。つまり、1倍速から16倍速を動作させるために
は、VCOの制御電圧を電源電位VssからVddの間
で変化させた場合に、発振周波数を25[MHz]から
415[MHz]とする信号を出力するように構成しな
ければならない。
Fn = 4.3218 × 6 × n [MHz] (1) That is, in 1 × speed reproduction for the purpose of audio reproduction, P
The oscillation frequency required for the VCO inside the LL circuit is about 25
[MHz], and an oscillation frequency required for signal processing for a 16-times CD-ROM is about 415 [MHz]. In other words, in order to operate at 1 × to 16 × speed, when the control voltage of the VCO is changed between the power supply potential Vss and Vdd, a signal for changing the oscillation frequency from 25 [MHz] to 415 [MHz] is output. Must be configured to

【0005】図4には、PLL回路を備えた発振制御装
置における、PLL回路内のVCOの制御電圧Vc
[V]に対する発振周波数f[MHz]の特性を示す。
同図に示すように、電源電位Vdd=5[V]のとき
に、1倍速に要求される発振周波数F1=25[MH
z]を出力する場合の制御電圧Vcに対する発振周波数
faの特性における勾配Δfa/ΔVcは、16倍速に
要求される発振周波数F16=415[MHz]を出力
する場合の制御電圧Vcに対する発振周波数fbの特性
における勾配Δfb/ΔVcと比較して、
FIG. 4 shows a control voltage Vc of a VCO in a PLL circuit in an oscillation control device having a PLL circuit.
The characteristics of the oscillation frequency f [MHz] with respect to [V] are shown.
As shown in the figure, when the power supply potential Vdd = 5 [V], the oscillation frequency F1 required at 1 × speed is 25 [MH].
z], the gradient Δfa / ΔVc in the characteristic of the oscillation frequency fa with respect to the control voltage Vc is equal to the slope of the oscillation frequency fb with respect to the control voltage Vc when outputting the oscillation frequency F16 = 415 [MHz] required at 16 × speed. As compared with the gradient Δfb / ΔVc in the characteristic,

【0006】[0006]

【数2】 Δfa/ΔVc < Δfb/ΔVc (2) の関係があり、VCOに要求される発振周波数が広範囲
になる程、制御電圧Vcに対する発振周波数fの特性に
おける勾配Δf/ΔVcが急峻となり、微小な制御電圧
の変化ΔVcに対する周波数変化量Δfが大きくなる。
これにより、微小な基板ノイズが無視できなくなり、い
くら設計者がノイズを低減しても電子機器のプレイアビ
リティは改善されないという事態となる。
## EQU2 ## There is a relationship of Δfa / ΔVc <Δfb / ΔVc (2), and as the oscillation frequency required for the VCO becomes wider, the gradient Δf / ΔVc in the characteristic of the oscillation frequency f with respect to the control voltage Vc becomes steeper, The frequency change amount Δf with respect to the minute control voltage change ΔVc increases.
As a result, minute substrate noise cannot be ignored, and even if the designer reduces the noise, the playability of the electronic device will not be improved.

【0007】また、現在のプロセスでは、電源電位Vd
d=3.3[V]が主流となりつつあるが、この場合に
も同様に、図4に示すように、1倍速に要求される発振
周波数F1=25[MHz]を出力する場合の制御電圧
Vcに対する発振周波数fcの特性における勾配Δfc
/ΔVcは、16倍速に要求される発振周波数F16=
415[MHz]を出力する場合の制御電圧Vcに対す
る発振周波数fdの特性における勾配Δfd/ΔVcと
比較して、
In the current process, the power supply potential Vd
Although d = 3.3 [V] is becoming mainstream, in this case, similarly, as shown in FIG. 4, the control voltage for outputting the oscillation frequency F1 = 25 [MHz] required for 1 × speed is also used. Gradient Δfc in characteristics of oscillation frequency fc with respect to Vc
/ ΔVc is the oscillation frequency F16 =
Compared with the gradient Δfd / ΔVc in the characteristic of the oscillation frequency fd with respect to the control voltage Vc when outputting 415 [MHz],

【0008】[0008]

【数3】 Δfc/ΔVc < Δfd/ΔVc (3) の関係があり、しかも、電源電位Vdd=5[V]のと
きに比べて更に急峻な勾配となっている。このように、
微小な基板ノイズが無視できず、ノイズを低減しても電
子機器のプレイアビリティが改善されないという事態
は、今後製造プロセスが進んでいくに従って電源電位が
低くなるため、より顕著なものとなっていくと考えられ
る。
## EQU3 ## There is a relationship of Δfc / ΔVc <Δfd / ΔVc (3), and the gradient is steeper than when the power supply potential Vdd = 5 [V]. in this way,
The situation where small substrate noise cannot be ignored and the playability of electronic devices does not improve even if the noise is reduced will become more remarkable because the power supply potential decreases as the manufacturing process progresses in the future. it is conceivable that.

【0009】また、VCOには温度変化による特性の変
化があり、常温(25[℃])時の発振周波数に対して
信号処理LSIの推奨動作温度の下限および上限の発振
周波数の変動が大きい。以上のような温度による特性劣
化に加えて、更にVCOの製造ばらつきをも含めて考慮
する場合、最もクリティカルな条件で発振周波数を得る
ためには、VCO単体としては更に高い発振周波数帯域
を狙って設計する必要がある。このため、VCOの上記
の制御電圧対発振周波数特性の勾配はより急峻となり、
C/Nが悪化する事態となる。
The VCO has a characteristic change due to a temperature change, and the lower limit and the upper limit of the recommended operating temperature of the signal processing LSI greatly fluctuate with respect to the oscillation frequency at normal temperature (25 ° C.). In addition to the characteristic deterioration due to temperature as described above, when considering the manufacturing variation of the VCO, in order to obtain the oscillation frequency under the most critical conditions, aim for a higher oscillation frequency band for the VCO alone. Need to design. Therefore, the gradient of the control voltage vs. oscillation frequency characteristic of the VCO becomes steeper,
C / N deteriorates.

【0010】[0010]

【発明が解決しようとする課題】以上のように、従来の
発振制御装置においては、発振周波数を広範囲に亘る周
波数帯域での使用という近年のニーズに対応すべくVC
Oの発振周波数を広範囲とした場合、制御電圧対発振周
波数特性における勾配が急峻で、微小な制御電圧の変化
に対する周波数変化量が大きくなる。これにより、微小
な基板ノイズが無視できなくなり、いくら設計者がノイ
ズを低減しても電子機器のプレイアビリティは改善され
ないという事情があった。
As described above, in the conventional oscillation control device, the VC is required to meet the recent needs of using the oscillation frequency in a wide frequency band.
When the oscillation frequency of O is wide, the gradient in the control voltage vs. oscillation frequency characteristic is steep, and the amount of frequency change with respect to a minute change in the control voltage becomes large. As a result, minute substrate noise cannot be ignored, and the playability of the electronic device is not improved even if the designer reduces the noise.

【0011】また、上記事情は、今後製造プロセスが進
んでいくに従って電源電位が低くなるため、より顕著な
ものとなっていくと考えられ、また更に、VCOの温度
による特性劣化や製造ばらつきを考慮した場合、更に高
い発振周波数帯域を狙って設計する必要があることか
ら、VCOの制御電圧対発振周波数特性の勾配はより急
峻となり、C/Nが悪化するという事情があった。
In addition, the above situation is considered to become more remarkable because the power supply potential becomes lower as the manufacturing process progresses in the future, and furthermore, it is necessary to consider the characteristic deterioration and the manufacturing variation due to the temperature of the VCO. In such a case, it is necessary to design for a higher oscillation frequency band, so that the gradient of the control voltage vs. oscillation frequency characteristic of the VCO becomes steeper, and the C / N deteriorates.

【0012】本発明は、上記従来の事情に鑑みてなされ
たものであって、電圧制御発振手段を備えた発振制御装
置において、電圧制御発振手段のC/Nを改善し、製造
ばらつき及び温度による特性変化を補正して、電圧制御
発振手段を含む位相同期ループの使用環境に適合した発
振動作を可能とし、更には該位相同期ループが適用され
る電子機器のプレイアビリティを向上させる発振制御装
置を提供することを目的としている。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional circumstances, and in an oscillation control device provided with a voltage-controlled oscillation means, the C / N of the voltage-controlled oscillation means is improved, and the production control and the temperature are controlled. An oscillation control device that corrects a characteristic change, enables an oscillation operation suitable for a use environment of a phase locked loop including a voltage controlled oscillator, and further improves the playability of an electronic device to which the phase locked loop is applied. It is intended to provide.

【0013】[0013]

【課題を解決するための手段】上記課題を解決するため
に、本発明の発振制御装置は、制御電圧により発振周波
数が制御され、部分的な重なりを持つ複数の発振周波数
帯域を備える電圧制御発振手段と、前記電圧制御発振手
段の発振周波数を計測する計測手段と、前記計測手段に
よる計測結果及び所望の発振周波数に基づき、前記電圧
制御発振手段の発振周波数帯域を選択して設定する制御
手段とを具備するものである。
In order to solve the above-mentioned problems, an oscillation control apparatus according to the present invention is characterized in that an oscillation frequency is controlled by a control voltage and includes a plurality of oscillation frequency bands having a partially overlapping oscillation frequency band. Means, measuring means for measuring the oscillation frequency of the voltage-controlled oscillating means, and control means for selecting and setting the oscillation frequency band of the voltage-controlled oscillating means based on the measurement result and the desired oscillation frequency by the measuring means. It is provided with.

【0014】また、本発明の発振制御装置は、前記電圧
制御発振手段の出力信号を設定された分周比で分周する
分周手段を具備し、前記制御手段は、前記計測手段によ
る計測結果及び所望の発振周波数に基づき、前記電圧制
御発振手段の発振周波数帯域を選択して設定し、前記分
周手段の分周比を設定するものである。
Further, the oscillation control device of the present invention includes a frequency dividing means for dividing an output signal of the voltage controlled oscillation means at a set frequency dividing ratio, wherein the control means operates the measurement result by the measuring means. And an oscillation frequency band of the voltage controlled oscillator is selected and set based on a desired oscillation frequency, and a frequency division ratio of the frequency divider is set.

【0015】また、本発明の発振制御装置は、前記電圧
制御発振手段を含む位相同期ループのループ信号と所定
電位とを選択して、前記電圧制御発振手段への制御電圧
とする選択手段を具備し、前記制御手段は、前記選択手
段から所定電位の制御電圧が前記電圧制御発振手段に供
給されるときに、前記計測手段による計測結果を得るも
のである。
Further, the oscillation control device of the present invention includes a selection means for selecting a loop signal of a phase locked loop including the voltage controlled oscillation means and a predetermined potential, and setting the selected signal as a control voltage to the voltage controlled oscillation means. The control means obtains a measurement result by the measurement means when a control voltage of a predetermined potential is supplied from the selection means to the voltage controlled oscillation means.

【0016】また、本発明の発振制御装置は、前記電圧
制御発振手段の出力信号を設定された分周比で分周する
分周手段と、前記電圧制御発振手段を含む位相同期ルー
プのループ信号と所定電位とを選択して、前記電圧制御
発振手段への制御電圧とする選択手段とを具備し、前記
制御手段は、前記所望の発振周波数を変更するときは、
前記選択手段の選択制御を行って前記所定電位の制御電
圧を前記電圧制御発振手段に供給し、前記計測手段によ
る計測結果を得て、該計測結果及び前記所望の発振周波
数に基づき、前記電圧制御発振手段の発振周波数帯域を
選択して設定し、前記分周手段の分周比を設定するもの
である。
The oscillation control device according to the present invention further comprises a frequency dividing means for dividing an output signal of the voltage controlled oscillating means at a set division ratio, and a loop signal of a phase locked loop including the voltage controlled oscillating means. And selecting means for selecting a predetermined potential and setting the control voltage to the voltage-controlled oscillating means, wherein the control means, when changing the desired oscillation frequency,
The selection control of the selection unit is performed, the control voltage of the predetermined potential is supplied to the voltage control oscillation unit, a measurement result by the measurement unit is obtained, and the voltage control is performed based on the measurement result and the desired oscillation frequency. The oscillation frequency band of the oscillation means is selected and set, and the frequency division ratio of the frequency division means is set.

【0017】また、本発明の発振制御装置は、前記制御
手段が、前記電圧制御発振手段の発振周波数帯域の選択
を、該発振周波数帯域における前記計測結果の周波数よ
り高域の周波数マージンまたは前記計測結果の周波数よ
り低域の周波数マージンを考慮して行うものである。
Also, in the oscillation control device according to the present invention, the control means may select an oscillation frequency band of the voltage controlled oscillation means by selecting a frequency margin higher than a frequency of the measurement result in the oscillation frequency band or the measurement margin. This is performed in consideration of a frequency margin lower than the resultant frequency.

【0018】また、本発明の発振制御装置は、前記選択
手段に供給される所定電位を、前記電圧制御発振手段が
発振可能な最大発振周波数を得る第1の基準電位とした
ものである。
In the oscillation control apparatus according to the present invention, the predetermined potential supplied to the selection means is a first reference potential for obtaining a maximum oscillation frequency at which the voltage controlled oscillation means can oscillate.

【0019】更に、本発明の発振制御装置は、前記選択
手段に供給される所定電位を、前記電圧制御発振手段が
発振可能な最小発振周波数を得る第2の基準電位とした
ものである。
Further, in the oscillation control device according to the present invention, the predetermined potential supplied to the selection means is a second reference potential for obtaining a minimum oscillation frequency at which the voltage controlled oscillation means can oscillate.

【0020】本発明の発振制御装置では、電圧制御発振
手段が部分的な重なりを持つ複数の発振周波数帯域を備
えているので、電圧制御発振手段の発振周波数を広範囲
な周波数帯域で使用可能としても、個々の発振周波数帯
域における制御電圧対発振周波数特性の勾配を小さくす
ることができ、微小な制御電圧の変化に対する周波数変
化量を抑制できることにより、微小な基板ノイズを無視
可能とすることができ、電圧制御発振手段または電圧制
御発振手段を含む位相同期ループが適用される電子機器
のプレイアビリティを向上させることができる。
In the oscillation control apparatus of the present invention, the voltage controlled oscillation means has a plurality of partially overlapped oscillation frequency bands, so that the oscillation frequency of the voltage controlled oscillation means can be used in a wide frequency band. In addition, the slope of the control voltage versus oscillation frequency characteristic in each oscillation frequency band can be reduced, and the amount of frequency change with respect to minute control voltage change can be suppressed, so that minute substrate noise can be ignored. It is possible to improve the playability of the electronic device to which the voltage-controlled oscillation means or the phase-locked loop including the voltage-controlled oscillation means is applied.

【0021】また、本発明の発振制御装置では、計測手
段による電圧制御発振手段の発振周波数計測結果及び所
望の発振周波数に基づいて使用環境や電圧制御発振手段
自体の製造ばらつきを認識し、電圧制御発振手段の発振
周波数帯域及び分周手段の分周比を選択設定するので、
電圧制御発振手段の製造ばらつき及び温度による特性変
化を補正して、電圧制御発振手段または電圧制御発振手
段を含む位相同期ループの使用環境に適合した発振動作
を可能とし、電圧制御発振手段のC/Nを改善すること
ができる。
Further, the oscillation control device of the present invention recognizes the use environment and the manufacturing variation of the voltage controlled oscillator based on the measurement result of the oscillation frequency of the voltage controlled oscillator by the measuring unit and the desired oscillation frequency. Since the oscillation frequency band of the oscillating means and the dividing ratio of the dividing means are selectively set,
By correcting the manufacturing variation of the voltage controlled oscillating means and the characteristic change due to the temperature, the oscillation operation suitable for the use environment of the voltage controlled oscillating means or the phase locked loop including the voltage controlled oscillating means is enabled. N can be improved.

【0022】また、本発明の発振制御装置では、所望の
発振周波数を変更するときは、選択手段の選択制御を行
って所定電位の制御電圧を電圧制御発振手段に供給し、
その時の計測手段による計測結果を得て、該計測結果及
び所望の発振周波数に基づいて、使用環境や電圧制御発
振手段自体の製造ばらつきを認識し、電圧制御発振手段
の発振周波数帯域及び分周手段の分周比を選択設定する
ので、電圧制御発振手段の製造ばらつき及び温度による
特性変化を補正して、電圧制御発振手段のC/Nを改善
することができる。
Further, in the oscillation control device of the present invention, when changing the desired oscillation frequency, selection control of the selection means is performed to supply a control voltage of a predetermined potential to the voltage control oscillation means,
Obtaining a measurement result by the measuring means at that time, based on the measurement result and a desired oscillation frequency, recognizes a use environment and manufacturing variations of the voltage controlled oscillating means itself, and oscillates an oscillation frequency band and a frequency dividing means of the voltage controlled oscillating means. Since the frequency division ratio is selected and set, it is possible to correct the manufacturing variation of the voltage controlled oscillator and the characteristic change due to the temperature, and to improve the C / N of the voltage controlled oscillator.

【0023】また、本発明の発振制御装置では、選択手
段に供給される所定電位を、電圧制御発振手段が発振可
能な最大発振周波数を得る第1の基準電位、或いは、電
圧制御発振手段が発振可能な最小発振周波数を得る第2
の基準電位とし、制御手段による電圧制御発振手段の発
振周波数帯域の選択を、例えば、該発振周波数帯域にお
ける計測結果の周波数(最小発振周波数)より高域の周
波数マージンまたは計測結果の周波数(最大発振周波
数)より低域の周波数マージンを考慮して行うので、簡
単な制御シーケンスで選択制御を行うことができる。
Further, in the oscillation control device according to the present invention, the predetermined potential supplied to the selection means is set to the first reference potential for obtaining the maximum oscillation frequency at which the voltage controlled oscillation means can oscillate, or Second to obtain the lowest possible oscillation frequency
The selection of the oscillation frequency band of the voltage-controlled oscillation means by the control means is performed, for example, by selecting a frequency margin higher than the frequency of the measurement result (minimum oscillation frequency) or the frequency of the measurement result (maximum oscillation) in the oscillation frequency band. Since the control is performed in consideration of the frequency margin lower than the frequency, the selection control can be performed with a simple control sequence.

【0024】[0024]

【発明の実施の形態】以下、本発明の発振制御装置の実
施の形態について、図面を参照して詳細に説明する。図
1は本発明の一実施例に係る発振制御装置の基本的な構
成図である。同図において、本実施例の発振制御装置
は、位相比較器101、ローパスフィルタ(以下、LP
F;Low Pass Filterという)102、電圧制御発振器
(以下、VCOという)103、分周器104、計測部
105、制御部106及び選択器107を備えて構成さ
れている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an oscillation control device according to the present invention will be described below in detail with reference to the drawings. FIG. 1 is a basic configuration diagram of an oscillation control device according to one embodiment of the present invention. In the figure, the oscillation control device of the present embodiment includes a phase comparator 101, a low-pass filter (hereinafter, LP).
F; a Low Pass Filter) 102, a voltage controlled oscillator (VCO) 103, a frequency divider 104, a measuring unit 105, a control unit 106, and a selector 107.

【0025】位相比較器101、LPF102、VCO
103、分周器104及び選択器107は位相同期ルー
プ(PLL回路)を形成しており、この系に入力信号V
iが加わると、位相比較器101において該入力信号V
iと分周器104の出力である内部クロックICKの周
波数と位相差に対応する誤差電圧が発生する。この誤差
電圧はLPF102により高域成分が除去され、選択器
107を介してVCO103の制御電圧Vcとなり、入
力信号Viと内部クロックICKの周波数差が小さくな
るようにVCO103を制御する。この動作を繰り返し
た後、VCO103の周波数と入力信号Viの周波数と
が一致してロック状態となる。
Phase comparator 101, LPF 102, VCO
103, a frequency divider 104 and a selector 107 form a phase locked loop (PLL circuit), and an input signal V
i, the input signal V
An error voltage corresponding to i and the frequency and phase difference of the internal clock ICK output from the frequency divider 104 is generated. The high-frequency component of the error voltage is removed by the LPF 102 and becomes the control voltage Vc of the VCO 103 via the selector 107. The VCO 103 is controlled so that the frequency difference between the input signal Vi and the internal clock ICK becomes small. After repeating this operation, the frequency of the VCO 103 matches the frequency of the input signal Vi, and a lock state is established.

【0026】以上が位相同期ループの基本的動作である
が、本実施例の発振制御装置の第1の特徴として、VC
O103が部分的な重なりを持つ複数の発振周波数帯域
を備え、制御部106からの制御信号CBによって一の
発振周波数帯域を選択設定可能となっており、また、分
周器104の分周比も制御部106からの制御信号CD
によって選択設定可能となっていることが挙げられる。
The basic operation of the phase locked loop has been described above. The first feature of the oscillation control device of this embodiment is that
O103 is provided with a plurality of oscillation frequency bands having a partial overlap, one oscillation frequency band can be selectively set by a control signal CB from the control unit 106, and the frequency division ratio of the frequency divider 104 is also Control signal CD from control unit 106
Can be selected and set.

【0027】また、本実施例の発振制御装置の第2の特
徴としては、VCO103の入力段に選択器107を設
け、制御部106からの制御信号CSによって、VCO
103の制御電圧Vcとして位相同期ループのループ信
号(LPF102の出力)または所定電位とを選択供給
できるように構成し、例えば、所定電位として第1の電
源電位Vssまたは第2の電源電位Vddを与えること
で、それぞれVCO103の最大の発振周波数または最
小の発振周波数を、計測部105により計測可能となっ
ていることが挙げられる。
A second feature of the oscillation control apparatus of the present embodiment is that a selector 107 is provided at the input stage of the VCO 103, and the VCO 103
A configuration is such that a loop signal (output of LPF 102) of a phase locked loop or a predetermined potential can be selectively supplied as the control voltage Vc of 103, and for example, a first power supply potential Vss or a second power supply potential Vdd is applied as the predetermined potential This means that the measurement unit 105 can measure the maximum oscillation frequency or the minimum oscillation frequency of the VCO 103, respectively.

【0028】次に、図2に本実施例の発振制御装置の具
体的な構成図を示す。図2に示す本実施例の発振制御装
置は、従来の技術の説明においても例示したCD−RO
M用の信号処理LSIに適用したものであり、図1にお
ける位相比較器101、LPF102、VCO103、
分周器104、計測部105及び選択器107を、CD
−ROM用の信号処理LSI200の内部に構成して実
現し(但し、LPF102の一部は外付け)、図1にお
ける制御部106をマイクロプロセッサ等のCPU25
0で実現したものである。
Next, FIG. 2 shows a specific configuration diagram of the oscillation control device of this embodiment. The oscillation control device of the present embodiment shown in FIG. 2 is a CD-RO which has been exemplified in the description of the prior art.
This is applied to a signal processing LSI for M. The phase comparator 101, the LPF 102, the VCO 103 in FIG.
The frequency divider 104, the measuring unit 105, and the selector 107 are
-It is realized by being configured inside the signal processing LSI 200 for ROM (however, a part of the LPF 102 is externally provided), and the control unit 106 in FIG.
0.

【0029】即ち、信号処理LSI200は、位相比較
器101を位相比較器201に、VCO103をVCO
203に、分周器104を分周器204に、計測部10
5を周波数計測器205に、選択器107をセレクタ2
07にそれぞれ置き換え、位相比較器201の前段にプ
リスケーラ分周器221及び222を具備した構成であ
る。
That is, the signal processing LSI 200 includes the phase comparator 101 as the phase comparator 201 and the VCO 103 as the VCO
203, the frequency divider 104 to the frequency divider 204, the measuring unit 10
5 to the frequency measuring device 205 and the selector 107 to the selector 2
07, and prescaler frequency dividers 221 and 222 are provided before the phase comparator 201.

【0030】また、LPF102は、信号処理LSI2
00に外付けの抵抗212,213及び214、並び
に、容量素子215と、信号処理LSI200内部の演
算増幅器211とを備えたアクティブフィルタで構成し
ている。即ち、位相比較器201の出力を外部端子を介
して抵抗212の一端に接続し、抵抗212の他端と抵
抗213の一端を接続し、抵抗213の他端と容量素子
215の一端を接続し、容量素子215の他端と抵抗2
14の一端を接続し、抵抗214の他端を第2の電源電
位Vddに接続し、抵抗212及び213の接続点を外
部端子を介して演算増幅器211の入力とし、演算増幅
器211の出力を外部端子を介して容量素子215及び
抵抗214の接続点に接続した構成である。
The LPF 102 is a signal processing LSI 2
The active filter includes an external resistor 212, 213, and 214, a capacitive element 215, and an operational amplifier 211 inside the signal processing LSI 200. That is, the output of the phase comparator 201 is connected to one end of the resistor 212 via an external terminal, the other end of the resistor 212 is connected to one end of the resistor 213, and the other end of the resistor 213 is connected to one end of the capacitor 215. , The other end of the capacitive element 215 and the resistor 2
14 is connected, the other end of the resistor 214 is connected to the second power supply potential Vdd, the connection point of the resistors 212 and 213 is set as an input of the operational amplifier 211 via an external terminal, and the output of the operational amplifier 211 is connected to the external. In this configuration, the terminal is connected to a connection point between the capacitor 215 and the resistor 214 via a terminal.

【0031】また、CPU250から信号処理LSI2
00に供給される制御信号として、セレクタ207の選
択切換を制御する制御信号CS、VCO203の発振周
波数帯域を選択設定する制御信号CB、並びに、分周器
204の分周比1/Kを選択設定する制御信号CDがあ
り、これらの制御信号は、CPU250が発行する信号
処理LSI200の制御コマンドの制御コードである。
また、信号処理LSI200からCPU250に対して
は、周波数計測器205の計測結果FMRが供給され
る。尚、図中、Vssは第1の電源電位(接地電位GN
D)、Vddは第2の電源電位である。
The CPU 250 sends a signal processing LSI 2
As the control signals supplied to 00, a control signal CS for controlling selection switching of the selector 207, a control signal CB for selectively setting the oscillation frequency band of the VCO 203, and a frequency division ratio 1 / K of the frequency divider 204 are selectively set. Control signals CD, and these control signals are control codes of control commands of the signal processing LSI 200 issued by the CPU 250.
Further, the measurement result FMR of the frequency measuring device 205 is supplied from the signal processing LSI 200 to the CPU 250. In the figure, Vss is a first power supply potential (ground potential GN).
D), Vdd is a second power supply potential.

【0032】入力信号Viには、周波数fiが次式で与
えられる信号が供給され、プリスケーラ分周器221の
分周比は1/32、プリスケーラ分周器222の分周比
は1/98に設定されている。
A signal whose frequency fi is given by the following equation is supplied to the input signal Vi. The frequency division ratio of the prescaler frequency divider 221 is 1/32, and the frequency ratio of the prescaler frequency divider 222 is 1/98. Is set.

【数4】 fi=16.9344×2/n[MHz] (4) (n=1のとき8.4672[MHz]、n=16のと
き135.4752[MHz]) また、分周器204の分周比1/KがK=1で与えられ
るとすれば、内部クロックICKの周波数は、n=1の
とき25.9308[MHz]、n=16のとき41
4.8928[MHz]となる。
[Mathematical formula-see original document] fi = 16.9344 * 2 / n [MHz] (4) (8.4672 [MHz] when n = 1, 135.4752 [MHz] when n = 16) Also, the frequency divider 204 Is given by K = 1, the frequency of the internal clock ICK is 25.9308 [MHz] when n = 1, and 41.49 when n = 16.
4.8928 [MHz].

【0033】本実施例の発振制御装置では、VCO20
3は、図3に示すような部分的な重なりを持つ帯域A,
帯域B,帯域C及び帯域Dの4つの発振周波数帯域を備
えている。ここで、VCO203の帯域A,帯域B,帯
域C及び帯域Dの発振周波数帯域は、CPU250から
の制御信号CBによって一の発振周波数帯域が選択設定
される。尚、図3中の実線で描かれた特性は第2の電源
電位Vdd=5[V]における制御電圧対発振周波数の
特性であり、点線で描かれた特性は第2の電源電位Vd
d=3.3[V]における制御電圧対発振周波数の特性
である。
In the oscillation control device of this embodiment, the VCO 20
3 is a band A having a partial overlap as shown in FIG.
It has four oscillation frequency bands of band B, band C and band D. Here, one of the oscillation frequency bands of the VCO 203 is selected and set by the control signal CB from the CPU 250 as the oscillation frequency bands of the band A, the band B, the band C, and the band D. The characteristic drawn by the solid line in FIG. 3 is the characteristic of the control voltage versus the oscillation frequency at the second power supply potential Vdd = 5 [V], and the characteristic drawn by the dotted line is the second power supply potential Vd.
This is a characteristic of the control voltage versus the oscillation frequency when d = 3.3 [V].

【0034】また、分周器204における分周比1/K
についても、CPU250からの制御信号CDによっ
て、K=1,2,4,…と選択設定可能であり、VCO
203の発振周波数帯域の選択設定とは別に、PLL回
路としてより細かい設定が可能となっている。
Also, the frequency division ratio 1 / K in the frequency divider 204
Can be selected and set as K = 1, 2, 4,... By the control signal CD from the CPU 250.
In addition to the selection of the oscillation frequency band 203, more detailed settings are possible for the PLL circuit.

【0035】また、セレクタ207における選択切換の
制御は、CPU250からの制御信号CSによって行わ
れ、該選択切換により、VCO203の制御電圧Vcと
して位相同期ループのループ信号(LPFの出力)また
は第1の電源電位Vssとを選択供給できる構成であ
る。ここで、VCO203の制御電圧Vcを、制御信号
CSにより第1の電源電位Vss(接地電位GND)と
した場合には、周波数計測器205によってVCO20
3が発振可能な最大の発振周波数が計測されることとな
る。尚、セレクタ207の一方の入力である第1の電源
電位Vssを第2の電源電位Vddに変更して構成した
場合には、VCO203が発振可能な最小の発振周波数
が周波数計測器205によって計測されることとなる。
The selection switching in the selector 207 is controlled by a control signal CS from the CPU 250. By the selection switching, the control signal Vc of the VCO 203 is used as the loop signal (output of the LPF) of the phase locked loop or the first signal. The power supply potential Vss can be selectively supplied. Here, when the control voltage Vc of the VCO 203 is set to the first power supply potential Vss (ground potential GND) by the control signal CS, the frequency measuring device 205 uses the VCO 20
The maximum oscillating frequency at which 3 can oscillate is measured. When the first power supply potential Vss, which is one input of the selector 207, is changed to the second power supply potential Vdd, the minimum oscillation frequency at which the VCO 203 can oscillate is measured by the frequency measurement device 205. The Rukoto.

【0036】次に、本実施例の発振制御装置において行
われる、VCO203の発振周波数帯域の選択設定及び
分周器204の分周比の選択設定について説明する。こ
れらの選択設定は、CD−ROMの倍速設定が切り換え
られたときにCPU250が発行する制御コマンドによ
って行われる。
Next, the selection setting of the oscillation frequency band of the VCO 203 and the selection setting of the frequency division ratio of the frequency divider 204, which are performed in the oscillation control device of the present embodiment, will be described. These selection settings are made by a control command issued by the CPU 250 when the double speed setting of the CD-ROM is switched.

【0037】先ず、CPU250は、VCO203の最
大発振周波数をモニタリングするために、制御信号CS
によりセレクタ207の選択制御を行って、VCO20
3の制御電圧Vcとして第1の電源電位Vssを与え
る。この時、周波数計測器207によりVCO103の
最大発振周波数が計測され、計測結果FMRとしてCP
U250に送られる。
First, the CPU 250 controls the control signal CS to monitor the maximum oscillation frequency of the VCO 203.
Controls the selection of the selector 207 by the VCO 20
The first power supply potential Vss is given as the control voltage Vc of No. 3. At this time, the maximum oscillation frequency of the VCO 103 is measured by the frequency measuring device 207, and the measurement result FMR is CP.
Sent to U250.

【0038】次に、CPU250は、周波数計測器20
7の計測結果FMRに基づいて、使用環境(使用温度
等)による温度特性変化やVCO203個体の製造ばら
つきを認識し、その時にPLL回路が適用される電子機
器の所望の発振周波数をカバーし、且つ、使用温度によ
る特性変化や個体ばらつきに対して最適な発振周波数帯
域を、VCO203が備える帯域A,帯域B,帯域C及
び帯域Dの発振周波数帯域から1つ選択し、制御信号C
BによってVCO203を該選択された発振周波数帯域
に設定制御する。
Next, the CPU 250 controls the frequency
Based on the measurement result FMR of No. 7, a change in temperature characteristics due to a use environment (use temperature or the like) or a manufacturing variation of the VCO 203 is recognized, and a desired oscillation frequency of an electronic device to which a PLL circuit is applied at that time is covered. One of the optimum oscillation frequency bands for the characteristic change and individual variation due to the use temperature is selected from the oscillation frequency bands of the band A, the band B, the band C, and the band D provided in the VCO 203, and the control signal C
B controls the VCO 203 to the selected oscillation frequency band.

【0039】ここで、発振周波数の計測結果FMRが2
つの発振周波数帯域によってカバーされる場合には、そ
れぞれの発振周波数帯域について、該計測結果FMRの
周波数(最大発振周波数)より低域の周波数マージンが
どれだけあるかを比較して、周波数マージンが大きいほ
うを選択する。尚、周波数計測器207によってVCO
203の最小発振周波数を測定する構成とした場合に
は、それぞれの発振周波数帯域について、該計測結果F
MRの周波数(最小発振周波数)より高域の周波数マー
ジンがどれだけあるかを比較して、周波数マージンが大
きいほうを選択すればよい。
Here, the measurement result FMR of the oscillation frequency is 2
In the case of being covered by one oscillation frequency band, for each oscillation frequency band, a comparison is made between how much a frequency margin lower than the frequency (maximum oscillation frequency) of the measurement result FMR, and the frequency margin is large. Choose one. Note that the VCO is
In the case where the minimum oscillation frequency of 203 is measured, the measurement result F is obtained for each oscillation frequency band.
What is necessary is just to compare the frequency margin higher than the frequency of the MR (minimum oscillation frequency) and select the one with the larger frequency margin.

【0040】また、分周器204の分周比1/Kについ
ても、VCO203の発振周波数帯域の選択設定とは別
に、内部クロックICKが所望の発振周波数となるよう
に、制御信号CDによってK=1,2,4,…と選択設
定される。
The frequency division ratio 1 / K of the frequency divider 204 is also controlled by the control signal CD so that the internal clock ICK has a desired oscillation frequency, independently of the selection of the oscillation frequency band of the VCO 203. .. Are selected and set.

【0041】以上のように、本実施例の発振制御装置で
は、VCO203が部分的な重なりを持つ帯域A,帯域
B,帯域C及び帯域Dの発振周波数帯域を備えているの
で、VCO203の発振周波数を広範囲な周波数帯域で
使用可能としても、帯域A,帯域B,帯域C及び帯域D
の個々の発振周波数帯域における制御電圧対発振周波数
特性の勾配は小さいので、微小な制御電圧の変化に対す
る周波数変化量を抑制でき、これにより、微小な基板ノ
イズを無視可能とすることができ、PLL回路が適用さ
れる電子機器のプレイアビリティを向上させることがで
きる。
As described above, in the oscillation control apparatus of the present embodiment, the VCO 203 has the oscillation frequency bands of the bands A, B, C, and D having a partial overlap. Can be used in a wide frequency band, but band A, band B, band C and band D
Since the gradient of the control voltage vs. oscillation frequency characteristic in each of the oscillation frequency bands is small, the amount of frequency change with respect to a minute change in the control voltage can be suppressed, whereby minute substrate noise can be ignored. Playability of an electronic device to which the circuit is applied can be improved.

【0042】また、本実施例の発振制御装置では、周波
数計測器207によるVCO203の発振周波数計測結
果FMRに基づき、使用環境(使用温度等)やVCO2
03自体の製造ばらつきを認識し、その時のPLL回路
が適用される電子機器の所望の発振周波数をカバーし、
且つ、分周器204の使用温度による特性変化や個体ば
らつきに対して最適な発振周波数帯域を選択設定すると
共に、分周器204の分周比を選択設定するので、製造
ばらつき及び温度による特性変化を補正して、PLL回
路の使用環境に適合した発振動作を可能とし、VCO2
03のC/Nを改善することができる。
Further, in the oscillation control apparatus of the present embodiment, the operating environment (operating temperature, etc.) and the VCO2 based on the oscillation frequency measurement result FMR of the VCO 203 by the frequency measuring device 207.
03 recognizes the manufacturing variation of itself and covers the desired oscillation frequency of the electronic device to which the PLL circuit is applied at that time,
In addition, the optimum oscillation frequency band is selected and set for the characteristic change and individual variation due to the use temperature of the frequency divider 204, and the frequency division ratio of the frequency divider 204 is selected and set. Is corrected to enable an oscillation operation suitable for the usage environment of the PLL circuit.
03 C / N can be improved.

【0043】[0043]

【発明の効果】以上説明したように、本発明の発振制御
装置によれば、電圧制御発振手段のC/Nを改善し、電
圧制御発振手段の製造ばらつき及び温度による特性変化
を補正して、電圧制御発振手段または電圧制御発振手段
を含む位相同期ループの使用環境に適合した発振動作を
可能とし、更には適用される電子機器のプレイアビリテ
ィを向上させることができる。
As described above, according to the oscillation control apparatus of the present invention, it is possible to improve the C / N of the voltage controlled oscillator, correct the manufacturing variation of the voltage controlled oscillator, and change the characteristic due to temperature. Oscillation operation suitable for the use environment of the voltage-controlled oscillating means or the phase-locked loop including the voltage-controlled oscillating means can be performed, and further, the playability of the applied electronic device can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例に係る発振制御装置の基本的
な構成図である。
FIG. 1 is a basic configuration diagram of an oscillation control device according to an embodiment of the present invention.

【図2】実施例の発振制御装置の具体的な構成図であ
る。
FIG. 2 is a specific configuration diagram of an oscillation control device according to an embodiment.

【図3】実施例の発振制御装置におけるVCOの制御電
圧対発振周波数の特性を例示する説明図である。
FIG. 3 is an explanatory diagram illustrating characteristics of a control voltage of a VCO versus an oscillation frequency in the oscillation control device of the embodiment.

【図4】従来のVCOの制御電圧対発振周波数の特性を
示す説明図である。
FIG. 4 is an explanatory diagram showing characteristics of a control voltage versus an oscillation frequency of a conventional VCO.

【符号の説明】[Explanation of symbols]

101…位相比較器、102…ローパスフィルタ(LP
F;Low Pass Filter)、103…電圧
制御発振器(VCO;Voltage Control
led Oscillator)、104…分周器、1
05…計測部、106…制御部、107…選択器、20
0…CD−ROM用の信号処理LSI、201…位相比
較器、212,213,214…抵抗、215…容量素
子、211…演算増幅器、203…VCO、204…分
周器、205…周波数計測器、207…セレクタ、22
1,222…プリスケーラ分周器、250…CPU(マ
イクロプロセッサ)、Vi…入力信号、Vc…制御電
圧、ICK…内部クロック、CS,CB,CD…制御信
号、FMR…周波数計測器205の計測結果、Vss…
第1の電源電位(接地電位)、Vdd…第2の電源電
位。
101: phase comparator, 102: low-pass filter (LP
F; Low Pass Filter; 103 ... Voltage Controlled Oscillator (VCO; Voltage Control)
led Oscillator), 104: frequency divider, 1
05: measuring unit, 106: control unit, 107: selector, 20
0: Signal processing LSI for CD-ROM, 201: Phase comparator, 212, 213, 214: Resistance, 215: Capacitance element, 211: Operational amplifier, 203: VCO, 204: Frequency divider, 205: Frequency measuring instrument , 207 ... selector, 22
1,222: Prescaler frequency divider, 250: CPU (microprocessor), Vi: Input signal, Vc: Control voltage, ICK: Internal clock, CS, CB, CD: Control signal, FMR: Measurement result of frequency measuring device 205 , Vss ...
First power supply potential (ground potential), Vdd... Second power supply potential.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 工藤 守 神奈川県横浜市保土ヶ谷区神戸町134番地 ソニーLSIデザイン株式会社内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Mamoru Kudo 134 Kobe-cho, Hodogaya-ku, Yokohama, Kanagawa Prefecture Sony LSI Design Inc.

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 制御電圧により発振周波数が制御され、
部分的な重なりを持つ複数の発振周波数帯域を備える電
圧制御発振手段と、 前記電圧制御発振手段の発振周波数を計測する計測手段
と、 前記計測手段による計測結果及び所望の発振周波数に基
づき、前記電圧制御発振手段の発振周波数帯域を選択し
て設定する制御手段とを有する発振制御装置。
An oscillation frequency is controlled by a control voltage,
Voltage-controlled oscillating means having a plurality of oscillation frequency bands having partial overlap, measuring means for measuring the oscillating frequency of the voltage-controlled oscillating means, and the voltage based on the measurement result and the desired oscillating frequency by the measuring means A control means for selecting and setting an oscillation frequency band of the control oscillation means.
【請求項2】 前記電圧制御発振手段の出力信号を設定
された分周比で分周する分周手段を有し、 前記制御手段は、前記計測手段による計測結果及び所望
の発振周波数に基づき、前記電圧制御発振手段の発振周
波数帯域を選択して設定し、前記分周手段の分周比を設
定する請求項1記載の発振制御装置。
2. A frequency dividing means for dividing an output signal of the voltage controlled oscillating means at a set frequency dividing ratio, wherein the control means is configured to divide the output signal based on a result of measurement by the measuring means and a desired oscillation frequency. 2. The oscillation control device according to claim 1, wherein an oscillation frequency band of said voltage controlled oscillation means is selected and set, and a frequency division ratio of said frequency dividing means is set.
【請求項3】 前記電圧制御発振手段を含む位相同期ル
ープのループ信号と所定電位とを選択して、前記電圧制
御発振手段への制御電圧とする選択手段を有し、 前記制御手段は、前記選択手段から所定電位の制御電圧
が前記電圧制御発振手段に供給されるときに、前記計測
手段による計測結果を得る請求項1記載の発振制御装
置。
3. A control circuit for selecting a loop signal and a predetermined potential of a phase-locked loop including the voltage-controlled oscillating means and using the selected signal as a control voltage for the voltage-controlled oscillating means. 2. The oscillation control device according to claim 1, wherein a measurement result obtained by said measurement means is obtained when a control voltage of a predetermined potential is supplied from said selection means to said voltage controlled oscillation means.
【請求項4】 前記電圧制御発振手段の出力信号を設定
された分周比で分周する分周手段と、 前記電圧制御発振手段を含む位相同期ループのループ信
号と所定電位とを選択して、前記電圧制御発振手段への
制御電圧とする選択手段とを有し、 前記制御手段は、前記所望の発振周波数を変更するとき
は、前記選択手段の選択制御を行って前記所定電位の制
御電圧を前記電圧制御発振手段に供給し、前記計測手段
による計測結果を得て、該計測結果及び前記所望の発振
周波数に基づき、前記電圧制御発振手段の発振周波数帯
域を選択して設定し、前記分周手段の分周比を設定する
請求項1記載の発振制御装置。
4. A frequency dividing means for dividing an output signal of said voltage controlled oscillating means at a set frequency dividing ratio, a loop signal of a phase locked loop including said voltage controlled oscillating means and a predetermined potential are selected. Selecting means for setting a control voltage to the voltage-controlled oscillating means, wherein the control means, when changing the desired oscillation frequency, performs selection control of the selecting means to control the predetermined potential control voltage. Is supplied to the voltage-controlled oscillating means, a measurement result by the measuring means is obtained, and based on the measurement result and the desired oscillation frequency, an oscillation frequency band of the voltage-controlled oscillating means is selected and set. 2. The oscillation control device according to claim 1, wherein a frequency dividing ratio of the frequency dividing means is set.
【請求項5】 前記制御手段は、前記電圧制御発振手段
の発振周波数帯域の選択を、該発振周波数帯域における
前記計測結果の周波数より高域の周波数マージンまたは
前記計測結果の周波数より低域の周波数マージンを考慮
して行う請求項1記載の発振制御装置。
5. The control means selects the oscillation frequency band of the voltage controlled oscillation means by selecting a frequency margin higher than the frequency of the measurement result or a frequency lower than the frequency of the measurement result in the oscillation frequency band. 2. The oscillation control device according to claim 1, wherein the oscillation control is performed in consideration of a margin.
【請求項6】 前記選択手段に供給される所定電位は、
前記電圧制御発振手段が発振可能な最大発振周波数を得
る第1の基準電位である請求項3記載の発振制御装置。
6. The predetermined potential supplied to the selection means,
The oscillation control device according to claim 3, wherein the voltage control oscillation means is a first reference potential for obtaining a maximum oscillation frequency at which oscillation is possible.
【請求項7】 前記選択手段に供給される所定電位は、
前記電圧制御発振手段が発振可能な最小発振周波数を得
る第2の基準電位である請求項3記載の発振制御装置。
7. The predetermined potential supplied to the selection means,
4. The oscillation control device according to claim 3, wherein the voltage control oscillation means is a second reference potential for obtaining a minimum oscillation frequency at which oscillation is possible.
JP9068464A 1997-03-21 1997-03-21 Oscillation controller Pending JPH10271001A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9068464A JPH10271001A (en) 1997-03-21 1997-03-21 Oscillation controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9068464A JPH10271001A (en) 1997-03-21 1997-03-21 Oscillation controller

Publications (1)

Publication Number Publication Date
JPH10271001A true JPH10271001A (en) 1998-10-09

Family

ID=13374446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9068464A Pending JPH10271001A (en) 1997-03-21 1997-03-21 Oscillation controller

Country Status (1)

Country Link
JP (1) JPH10271001A (en)

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Publication number Priority date Publication date Assignee Title
JP2006279962A (en) * 2005-03-28 2006-10-12 Toshiba Corp Method to configure dividing ratio of phase-locked loop circuit
JP2008005141A (en) * 2006-06-21 2008-01-10 Sony Corp Voltage-controlled oscillation device and control method thereof
JP2009124737A (en) * 2009-01-19 2009-06-04 Renesas Technology Corp Phase synchronization circuit and semiconductor integrated circuit device employing it
WO2009101792A1 (en) * 2008-02-12 2009-08-20 Panasonic Corporation Synthesizer and reception device using the same
JP2009194428A (en) * 2008-02-12 2009-08-27 Panasonic Corp Synthesizer, receiver using the same and electronic apparatus
JP2012044274A (en) * 2010-08-13 2012-03-01 Sony Corp Phase synchronization circuit and radio communication device

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006279962A (en) * 2005-03-28 2006-10-12 Toshiba Corp Method to configure dividing ratio of phase-locked loop circuit
JP2008005141A (en) * 2006-06-21 2008-01-10 Sony Corp Voltage-controlled oscillation device and control method thereof
WO2009101792A1 (en) * 2008-02-12 2009-08-20 Panasonic Corporation Synthesizer and reception device using the same
JP2009194428A (en) * 2008-02-12 2009-08-27 Panasonic Corp Synthesizer, receiver using the same and electronic apparatus
US8384449B2 (en) 2008-02-12 2013-02-26 Panasonic Corporation Synthesizer and reception device using the same
JP2009124737A (en) * 2009-01-19 2009-06-04 Renesas Technology Corp Phase synchronization circuit and semiconductor integrated circuit device employing it
JP2012044274A (en) * 2010-08-13 2012-03-01 Sony Corp Phase synchronization circuit and radio communication device

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