JP2008005141A - Voltage-controlled oscillation device and control method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To easily and accurately adjust a voltage-controlled oscillation device provided with a discrete adjusting function of the oscillation frequency. <P>SOLUTION: The variation range of the oscillation frequency of a voltage-controlled oscillation unit is made adjustable in a plurality of stages by input of adjustment data. Further, the voltage-controlled oscillation device includes a control voltage generator which variably generates a control voltage for adjustment according to control voltage data. Then, the control voltage for adjustment is variably generated, the voltage-controlled oscillation unit is made to oscillate a settable maximum frequency and minimum frequency with the variably generated adjusting voltage, and the maximum frequency and minimum frequency are measured. A center frequency is calculated from measurement results, a suitable control voltage for adjustment of the voltage-controlled oscillation unit is set using the calculated center frequency, and while the control voltage is fixed at the set control voltage, the adjustment data is varied to set suitable adjustment data. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a voltage-controlled oscillation device in which an oscillation frequency is controlled by a voltage and a control method thereof, and more particularly to a technique for adjusting an oscillation frequency.

  With the increase in data communication transmission rate and transmission band frequency, the frequency handled by the transmission device and reception device has been increased, and the oscillation device that generates the clock required for transmission processing and reception processing, The thing corresponding to a high frequency is needed.

  As an oscillation device that requires this type of equipment, an integrated circuit voltage controlled oscillation device called an on-chip VCO (Voltage Controlled Oscillator) is being used. In the case of the voltage controlled oscillation device, in order to correct the non-uniformity of the element characteristics, a discrete adjustment function of the oscillation frequency is provided.

Here, a PLL (Phase-locked Loop) which is a typical application example of the VCO will be described with reference to FIG.
A reference oscillator 11 having a constant oscillation frequency and a voltage controlled oscillator (VCO) 16 whose oscillation frequency is controlled by inputting a control voltage are prepared. The oscillation output (oscillation frequency) of the voltage controlled oscillator 16 is supplied to the frequency divider 15 to divide the frequency by 1 / n. The outputs of the reference oscillator 11 and the frequency divider 15 are input to the phase comparator 12. The phase comparator 12 outputs a pulse corresponding to the phase difference between the two inputs to the charge pump / low pass filter 13. The charge pump / low pass filter 13 converts an input pulse into a direct current and outputs a VCO control voltage. The oscillation frequency of the VCO 16 is controlled by the output VCO control voltage.

With such a loop configuration, a PLL (Phase-locked loop) circuit is configured, and the oscillation frequency of the voltage controlled oscillator 16 becomes a specified frequency.
The voltage-controlled oscillator 16 needs to be able to oscillate at least at a prescribed frequency, and in order to ensure this, the above-described discrete adjustment function is often provided.

Patent Document 1 discloses an example of an oscillator provided with a function for discretely adjusting an oscillation frequency.
JP 2006-14352 A

  When using an oscillator provided with a discrete adjustment function of the oscillation frequency, there is a problem that adjustment of the oscillation frequency takes time and effort. In particular, a voltage-controlled oscillator having an oscillation frequency in the GHz band has a problem that the amount of change in the oscillation frequency due to the control voltage of the voltage-controlled oscillator cannot be increased, and there is a problem that it takes a long time for optimal adjustment.

  Further, when performing discrete adjustment of the oscillation frequency, conventionally, a fixed control voltage for adjustment is applied to the voltage-controlled oscillation device, and the deviation of the oscillation center frequency of the oscillation device is corrected accordingly. there were. Accordingly, a correction error due to the control voltage for adjustment has occurred.

  The present invention has been made in view of this point, and an object of the present invention is to enable easy and accurate adjustment of a voltage-controlled oscillation device provided with a discrete adjustment function of oscillation frequency.

  According to a first aspect of the present invention, the variable range of the oscillation frequency of the voltage controlled oscillation unit can be adjusted in a plurality of steps by inputting adjustment data. In addition, a control voltage generation unit that variably generates a control voltage for adjustment according to the control voltage data is provided. Then, by varying the control voltage data, the oscillation of the voltage controlled oscillation unit is set to the maximum frequency and the minimum frequency that can be set with the variably generated adjustment voltage, and the maximum frequency and the minimum frequency are measured. Calculate the center frequency from the measurement result, set the appropriate control voltage for adjustment of the voltage controlled oscillator using the calculated center frequency, and fix the control voltage to the set control voltage to change the adjustment data. To set the appropriate adjustment data.

  By doing in this way, the operation | work which variably sets a control voltage and adjusts an appropriate control voltage, and the variable operation | work of the adjustment data which determines the subsequent oscillation frequency range come to be performed.

  In the second aspect of the invention, the comparison unit counts the difference between the oscillation frequency of the reference oscillation unit and the oscillation frequency of the voltage controlled oscillation unit, variably generates control voltage data, and the current control voltage data is finally obtained from the count result. If it is determined whether or not it can be a candidate, and it is determined that it cannot be a final candidate, information on which oscillation frequency is earlier or later is used to determine the control voltage data to be the next candidate. When it is determined that it can be the final candidate, the process of determining the count result is performed again, and the process of setting the candidate value with the smallest difference as the appropriate control voltage data in the comparison unit Do.

  In the third aspect of the invention, the comparison unit counts the difference between the oscillation frequency of the reference oscillation unit and the oscillation frequency of the voltage controlled oscillation unit, variably generates adjustment data, and the current adjustment data is determined as the final candidate from the count result. If it is determined whether or not it can be, and it is determined that it cannot be the final candidate, information on which oscillation frequency is earlier or later is used, and adjustment data that is the next candidate is used. When it moves to measurement and it judges that it can become a final candidate, the process which judges a count result again is performed, and the process which sets the candidate value with the smallest difference as appropriate adjustment data in a comparison part is performed.

  By doing so, it is possible to detect appropriate control voltage data and appropriate adjustment data by so-called binary search.

  According to the first invention, the control voltage is variably set to generate an appropriate adjustment control voltage, and the adjustment data is subsequently changed to determine the oscillation frequency range. Then, the adjustment data for determining the oscillation frequency range is optimized, and the optimum adjustment becomes possible.

  According to the second and third inventions, proper control voltage data and proper adjustment data can be detected by so-called binary search, and adjustment time can be shortened while maintaining accuracy. .

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

FIG. 1 is a diagram showing a configuration example in which the voltage controlled oscillation device of this example is applied to a PLL circuit.
A PLL 10 and an adjustment block 20 are included.
A PLL (Phase-locked loop) 10 includes a reference oscillator 11, a phase comparator 12, a charge pump / low pass filter 13, frequency dividers 14 and 15, a voltage controlled oscillator (VCO) 16, and a switch 17. The output of the voltage controlled oscillator 16 is divided by the frequency divider 15 and further divided by the frequency divider 14. The frequency-divided output of the frequency divider 14 is supplied to the phase comparator 12.

  The switch 17 is a switch for switching between an output of the charge pump / low-pass filter 13 and an output of a digital / analog converter 27 for generating a control voltage described later. The signal selected by the switch 17 is supplied to the voltage controlled oscillator 16 as a control voltage.

Here, the voltage controlled oscillator 16 of this example can adjust the variable range of the oscillation frequency by the control voltage in a plurality of stages, and the capacitance of the capacitor in the voltage controlled oscillator 16 can be adjusted in a plurality of stages by the capacity bank adjustment data Fc. Thus, the variable range of the oscillation frequency can be adjusted in a plurality of stages. In the case of this example, the capacity bank adjustment data Fc is 2-bit or 3-bit data, and is adjusted to an appropriate value in an adjustment process described later.
The selection of appropriate capacity bank adjustment data Fc is hereinafter referred to as oscillation frequency adjustment.

  The adjustment block 20 is used to adjust the oscillation frequency of the voltage controlled oscillator 16 in the PLL 10. The frequency dividers 21 and 22, the frequency comparison unit 23, the determination / control unit 24, and the control voltage generation digital / analog converter. (D / A) 27. The frequency divider 21 divides the output of the reference oscillator 11. The frequency divider 22 divides the output of the frequency divider 15. The frequency-divided signal and the output of the frequency divider 15 are supplied to the frequency comparator 23.

When adjusting the oscillation frequency, as shown in FIG. 2A, the switch 17 is closed to the adjustment block 20 side (output of the D / A 27), and when the adjustment is completed, as shown in FIG. The switch 17 is closed to the charge pump / low pass filter 13 side. The control of the switch 17 is performed by the determination / control unit 24 in the automatic adjustment block 20.
Further, the frequency divider of the PLL 10 is divided into 14 and 15 in order to generate a frequency necessary for the adjustment block 20.

The operation of the PLL 10 during the closed loop is as described above.
The oscillation output (oscillation frequency) of the reference oscillator 11 having a constant oscillation frequency is supplied to the frequency divider 21, and the frequency is divided into 1 / n ₁ (n ₁ is an arbitrary integer). The frequency-divided signal is supplied to the frequency comparison unit 23. The oscillation output (oscillation frequency) of the voltage controlled oscillator 16 whose oscillation frequency is controlled by the input of the control voltage is supplied to the frequency divider 15 and the frequency is divided by 1 / n ₂ . The frequency division ratios of the frequency dividers 14, 15, 21, and 22 are not necessarily equal. The output of the frequency divider 15 and the frequency divided by the frequency divider 22 are supplied to the frequency comparison unit 23.

The frequency comparison unit 23 compares the two oscillation frequencies (outputs of the frequency dividers 21 and 22), counts the frequency difference based on the output of the division period 15, and outputs the result. The result of counting the frequency difference is supplied to the determination / control unit 24.
The determination / control unit 24 adjusts the oscillation frequency by variably outputting the capacity bank adjustment data Fc and the voltage control data AUTO_VFIX based on the input count result.
The control voltage generation D / A 27 generates an analog voltage based on the voltage control data AUTO_VFIX, and supplies the control voltage input terminal of the voltage controlled oscillator 16 via the switch 17 when adjusting the oscillation frequency, thereby controlling the oscillation frequency.
The adjustment value obtained by the adjustment is stored, for example, in a register (not shown) in the determination / control unit 24, and the value is set and operated.

  Note that the control voltage generation D / A 27 of this example desirably has a circuit configuration having a temperature characteristic that cancels the temperature change of the center frequency of the voltage controlled oscillator 16. For example, when the temperature is raised, the oscillation frequency with respect to a certain control voltage is lowered, so that the control voltage generating D / A 27 increases the oscillation frequency when the temperature is raised in order to cancel it (keep the oscillation frequency constant). The circuit configuration is such that the output changes.

  FIG. 3 is a characteristic diagram showing an example of the relationship between the oscillation frequency of the voltage controlled oscillator 16 and the control voltage. In this example, the capacity bank adjustment data Fc is an example of 2 bits, and there are four types of Fc = 00, Fc = 01, Fc = 10, and Fc = 11. By changing the control voltage for each data as shown in FIG. 3, the oscillation frequency changes within a certain range. The center frequency of each characteristic is indicated by a circle. The range in which the oscillation frequency changes partially overlaps. If the desired frequency variable range can be covered, it may be set to the characteristics of any frequency range that includes the desired frequency variable range. The frequency is preferably close to the operating frequency. In addition, the oscillation frequency range for each oscillator varies depending on variations in the characteristics of elements constituting the voltage controlled oscillator 16.

  Next, a process for adjusting the oscillation frequency of the voltage controlled oscillator shown in FIG. 1 will be described. The adjustment process of this example is performed as shown in the flowchart of FIG. That is, first, adjustment is performed to optimize the control voltage generated by the control voltage generation D / A 27 (step S1). Thereafter, the capacity bank adjustment data Fc of the voltage controlled oscillator 16 is adjusted, the oscillation frequency range of the voltage controlled oscillator 16 is optimized (step S2), and the process is terminated.

FIG. 5 is a diagram showing an adjustment process example for optimizing the control voltage in step S1 of the flowchart of FIG. FIG. 5A is a flowchart of the adjustment process, and FIG. 5B is a diagram illustrating a state during adjustment. In this example, the capacity bank adjustment data Fc is 4 bits and the voltage control data AUTO_VFIX is 5 bits.
First, the value of the capacity bank is set to a fixed value (Fc = 4′b1000 here) (step S11). In this state, the control voltage Vcont is set to 0 [V], and the determination / control unit 24 counts the oscillation frequency of the voltage controlled oscillator 16 (step S12). The frequency counted at this time becomes the minimum frequency Fmin. Subsequently, the control voltage Vcont is set to the maximum voltage VDD (= 1.8) [V], and the oscillation frequency of the voltage controlled oscillator 16 is counted (step S13). The frequency counted at this time becomes the maximum frequency Fmax. Then, the intermediate frequency Fcenter is calculated by dividing the minimum frequency Fmin and the maximum frequency Fmax (step S14).

  When the intermediate frequency Fcenter is calculated, control voltage adjustment data AUTOVFIX [4: 0] that is closest to the calculated intermediate frequency Fcenter is searched by binary search (step S15). An example of binary search will be described later. Then, the value of AUTOVFIX [4: 0] is held as a register value (step S15). Here, the reason why Fc = 4′b1000 is used in the above-described example is that the optimum control voltage hardly depends on the capacity bank adjustment data Fc as shown in FIG.

FIG. 6 is a diagram showing an example of an adjustment process for optimizing the capacity bank adjustment data Fc of the voltage controlled oscillator 16 in step S2 of the flowchart of FIG. FIG. 6A is a flowchart of the adjustment process, and FIG. 6B is a diagram showing a state during adjustment. In this example, the capacity bank adjustment data Fc is 4 bits and the voltage control data AUTO_VFIX is 5 bits.
First, the value of AUTOVFIX [4: 0] obtained by the previous control voltage adjustment (the process of the flowchart of FIG. 5) is read (step S21). Next, the capacitor bank value Fc [3: 0] is searched by a binary search so that the oscillation frequency of the voltage controlled oscillator 16 becomes the center frequency (for example, 4 GHz) (step S22). Then, the searched value of the capacity bank value Fc [3: 0] is held as a register value (step S23).

  When the adjustment is completed in this way, the switch 17 (FIG. 1) is disconnected from the adjustment block 20 and closed to the charge pump 13 side, and the loop of the PLL 10 shown in FIG. 1 is closed.

  Note that the control voltage adjustment and the capacity bank adjustment are not necessarily performed at the same frequency. That is, for example, as shown in the flowchart of FIG. 7, control voltage adjustment is performed in advance when the system including the voltage control device is turned on (step S31). Then, it is determined whether or not the state of the voltage controlled oscillation device has shifted from the sleep mode (the state where the oscillator is stopped) to the save mode (the state where the data is not transmitted but the oscillator is operating). (Step S32). If it is determined that the mode has shifted to the save mode, the capacity bank is adjusted (step S33). Thereafter, until the power is turned off, the capacity bank adjustment may be repeated every time the sleep mode is shifted to the save mode.

Next, an example of the binary search in step S15 of the flowchart of FIG. 5 and the binary search in step S22 of the flowchart of FIG. 6 will be described.
First, the principle of the binary search will be described with reference to the flowchart of FIG. 8. For example, when performing a binary search with 3-bit data, first, the reference 3 bits (in this case, value 100) are set (step 100). S41). Then, it is determined whether or not the result of setting the value is faster than the target (step S42). If it is faster than the target, the value 010 is set (step S43), and it is determined whether it is faster than the target (step S44). If it is faster than the target, the value 001 is set (step S45), and it is further determined whether or not it is faster than the target (step S46). If it is determined that the speed is faster than the target, the value 000 is set and the process ends (step S47).

  If it is not faster than the target in step S44, 011 is set and the process ends (step S48). If it is not faster than the target in step S42, 110 is set (step S49), and it is determined whether it is faster than the target (step S50). If it is faster than the target, the value 101 is set and the process ends (step S51). If it is not faster than the target in step S50, 111 is set and the process ends (step S52).

  In this way, for the desired high accuracy, the comparison needs to be performed on the fastest and slowest objects closest to the target, and it must have a resolution that can be used to determine which is closer. It is. Therefore, binary search is suitable for the adjustment candidate value setting algorithm. The binary search is a method of starting from the most significant bit MSB = 1 and the other bits = 0 to obtain an optimum value. In this case, assuming that the data is N bits, the trial before and after the optimum value can be executed by comparing the N bits N times + (once).

  The flowchart of FIG. 9 shows an example (Example 1) of the adjustment scheme by binary search of this example. First, it is assumed that the time required for the comparison is M * N Clock (step S61), and the set value is updated according to the binary search. The comparison with the accuracy of the M * N count is only necessary in the end, so only two near the ideal value are needed, so in other parts it is faster or slower than the ideal value required for binary search. It ’s just an indicator.

  Therefore, every time the frequency difference is counted N by the comparison unit 13 (step S62), a comparison is made as to whether or not the final setting can be achieved (step S63). If the final setting is not possible, return to the setting update. When the final setting can be reached, the next N count is performed (step S64), and similarly, whether the final setting can be reached is compared (step S65). In this way, the comparison is performed up to the M * N count (step S66).

  Then, after counting M * N, it is determined whether or not the difference is 0 (step S67). If the difference is 0, the current setting is set as the optimum value and the comparison is terminated (step S68). If the difference is not 0, it is determined whether or not the difference is the smallest so far (step S69). If the difference is the smallest, the current setting is updated as the temporary optimum setting (step S70). Based on the binary search, it is determined whether or not the setting is final (step S71). If the setting is final, the current temporary optimum setting is set as the optimum setting and the adjustment is terminated (step S72). If it is not final, the process returns to step S61.

  In this way, the control voltage adjustment data AUTOVFIX or the capacity bank value Fc can be obtained by binary search.

In the flowchart of FIG. 9, it is determined whether or not the final setting can be made in step S63, step S65, or the like. As a specific process of this, the difference value counted by the comparison unit 13 is less than a certain amount. It is the simplest to determine whether or not.
The flowchart of FIG. 10 shows an example of this case. First, when the setting is updated (step S81), each time the frequency difference is counted N by the comparison unit 13 (step S82), a comparison is made as to whether or not the difference value is equal to or less than a certain amount L (step S83). Only in the case of L or less, the process proceeds to the next step. If it is equal to or less than a certain amount L, the next N count is performed (step S84), and similarly, it is compared whether the difference value is equal to or less than a certain amount L (step S85). In this way, the comparison is performed up to the M * N count (step S86).

  Then, after the M * N count, it is determined whether or not the difference is 0 (step S87). If it is 0, the current setting is set as the optimum value and the comparison is terminated (step S88). If the difference is not 0, it is determined whether or not the difference is the smallest (step S89). If the difference is the smallest, the difference of the current setting is updated as a temporary optimum setting (step S90). Based on the binary search, it is determined whether or not the setting is final (step S91). If the setting is final, the current temporary optimal setting is set as the optimal setting and the adjustment is terminated (step S92). If it is not final, the process returns to step S81.

Note that the fixed amount L shown in the flowchart of FIG. 10 is not necessarily a fixed value, and may be varied according to the stage. An example of changing according to this stage will be described. First, let L_last be a fixed reference for determining whether or not the final candidate value is reached.
L_last is an error after comparison of N * M counts corresponding to the step interval of the voltage controlled oscillator 14 as L_step, an error due to asynchronization is E0 (typically 1), and a margin is L_ma. Become.
L_last = L_step / 2 + E0 + L_ma
Although this can be applied to all steps, for example, after N * 2 counts, it is possible to quickly determine that it cannot be a final candidate by setting the following.
L_2 = (L_step / 2) / (M / 2) + E0 + L_ma
In the above description, L_ma is constant, but it can be changed.

  Considering the case of actual mounting, it takes a certain time for other analog blocks such as an oscillator to reach a steady state after the setting is updated. Basically, wait until the start of comparison to avoid this problem, but it is not perfect. Therefore, in the setting as described above, when M is small (determined in a short time), it is effective to make L_ma large.

Further, in the flowchart of FIG. 9, when determining whether the difference in step S69 is the smallest so far, if it is the same as the optimum value so far, the frequency change of the subsequent voltage controlled oscillator is taken into consideration. It is effective to take the smaller setting value.
That is, as shown in the flowchart of FIG. 11, when the difference is not 0 in step S67, it is determined whether or not the difference is equal to the current minimum (step S73). Is larger than the optimum setting so far (step S74), if not, the process proceeds to step S70, where the current setting and the difference are updated as a temporary optimum setting. If it is not equal to the minimum in step S73, the process proceeds to step S69. If it is determined in step S74 that it is larger than the optimum setting so far, the process proceeds to step S71 as in the case where it is determined after step S70 and not the minimum in step S69. Other processes are the same as those in the flowchart of FIG.

  The processing of the flowchart of FIG. 11 is effective when, for example, the power consumption differs during adjustment and system operation, and a shift in the oscillation frequency of the voltage controlled oscillator can be expected.

In addition, regarding the determination of whether or not the final candidate described in the examples so far, the determination of whether the difference is 0, or the determination of whether the difference is the smallest so far, these are not necessarily the differences themselves, A value having a certain offset may be used.
That is, for example, as shown in the flowchart of FIG. 12 corresponding to the flowchart of FIG. 10, in step S83 ′ and step S85 ′, it is determined whether the difference + D is L or less, and in step 87 ′, it is determined whether the difference + D is 0. In step 89 ′, it is determined whether the difference + D is the smallest. The difference + D is a value obtained by adding an offset (+ D) to the difference. Other parts are the same as those in the flowchart of FIG.

It is a block diagram which shows the structural example by one embodiment of this invention. It is explanatory drawing which shows the switching state of the switch by one embodiment of this invention. It is a characteristic view which shows the example of a change of the frequency-control voltage by one embodiment of this invention. It is a flowchart which shows the example of VCO center frequency control by one embodiment of this invention. It is a flowchart which shows the example of control voltage adjustment by one embodiment of this invention. It is a flowchart which shows the capacity bank adjustment example by one embodiment of this invention. It is a flowchart which shows the example of control by the modification (example at the time of mode change) of one embodiment of this invention. It is a flowchart which shows the principle of the binary search by one embodiment of this invention. It is a flowchart which shows the example (example 1) of the binary search by one embodiment of this invention. It is a flowchart which shows the example (example 2) of the binary search by one embodiment of this invention. It is a flowchart which shows the example (Example 3) of the binary search by one embodiment of this invention. It is a flowchart which shows the example (Example 4) of the binary search by one embodiment of this invention. It is a block diagram which shows the structural example of the conventional PLL.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... PLL, 11 ... Reference oscillator, 12 ... Phase comparator, 13 ... Charge pump low pass filter, 14, 15 ... Frequency divider, 16 ... Voltage controlled oscillator (VCO), 17 ... Switch, 20 ... Adjustment block, 21 , 22 ... frequency divider, 23 ... frequency comparison unit, 24 ... determination / control unit, 27 ... digital / analog converter for generating control voltage

Claims (6)

The oscillation frequency is controlled by the input voltage, and a voltage-controlled oscillation unit that can adjust the variable range of the oscillation frequency in multiple stages by inputting adjustment data;
A reference oscillation unit for oscillating a reference frequency;
A comparison unit that compares the oscillation frequency of the voltage-controlled oscillation unit and the oscillation frequency of the reference oscillation unit;
In the voltage controlled oscillator that sets appropriate adjustment data according to the comparison result in the comparison unit,
In the process of appropriately setting the adjustment data, a control voltage generator that variably generates an adjustment control voltage to be applied to the voltage control oscillation unit according to the control voltage data;
A control unit for setting the control voltage data and the adjustment data;
The control unit sets the oscillation of the voltage controlled oscillation unit to a maximum frequency and a minimum frequency, measures the maximum frequency and the minimum frequency based on a comparison result of the comparison unit, calculates a center frequency from the measurement result, and calculates Set the control voltage data to generate the appropriate adjustment control voltage using the center frequency
Using the control voltage for adjustment, the adjustment data is varied to set appropriate adjustment data. The voltage controlled oscillator according to claim 1, wherein
The comparison unit counts a difference between an oscillation frequency of the reference oscillation unit and an oscillation frequency of the voltage controlled oscillation unit,
The control unit determines whether the current control voltage data can be a final candidate from the count result as a process of variably generating the control voltage data, and determines that the control voltage data cannot be a final candidate. When the information about which oscillation frequency is faster or slower is used to move to measurement using control voltage data as the next candidate, and when it is determined that it can be the final candidate, the determination of the count result is performed again. A voltage-controlled oscillation device characterized in that a candidate value having the smallest difference is set as appropriate control voltage data in the comparison unit. The voltage controlled oscillator according to claim 1, wherein
The comparison unit counts a difference between an oscillation frequency of the reference oscillation unit and an oscillation frequency of the voltage controlled oscillation unit,
The control unit determines whether the current adjustment data can be a final candidate from the count result as a process for variably generating the adjustment data. Using the information on whether the oscillation frequency is early or late, the process moves to measurement using the adjustment data as the next candidate, and when it is determined that it can be the final candidate, the process of determining the count result again And a candidate value having the smallest difference in the comparison unit is set as appropriate adjustment data. The oscillation frequency is controlled by the input voltage, and a voltage-controlled oscillation unit that can adjust the variable range of the oscillation frequency in multiple stages by inputting adjustment data;
A reference oscillation unit for oscillating a reference frequency;
A comparison unit that compares the oscillation frequency of the voltage-controlled oscillation unit and the oscillation frequency of the reference oscillation unit;
In the voltage controlled oscillator that sets appropriate adjustment data according to the comparison result in the comparison unit,
In the process of appropriately setting the adjustment data, a control voltage generator for generating an adjustment control voltage to be applied to the voltage controlled oscillator;
A control unit for setting the adjustment data,
The comparison unit counts a difference between an oscillation frequency of the reference oscillation unit and an oscillation frequency of the voltage controlled oscillation unit,
The control unit determines whether the current adjustment data can be a final candidate from the count result as a process for variably generating the adjustment data. Using the information on whether the oscillation frequency is early or late, the process moves to measurement using the adjustment data as the next candidate, and when it is determined that it can be the final candidate, the process of determining the count result again And a candidate value having the smallest difference in the comparison unit is set as appropriate adjustment data. The oscillation frequency is controlled by the input voltage, and a voltage-controlled oscillation unit that can adjust the variable range of the oscillation frequency in multiple stages by inputting adjustment data;
A reference oscillation unit for oscillating a reference frequency;
A comparison unit that compares the oscillation frequency of the voltage-controlled oscillation unit and the oscillation frequency of the oscillation unit;
In the control method of the voltage controlled oscillator that sets appropriate adjustment data according to the comparison result in the comparison unit,
In the process of setting the adjustment data appropriately, the control voltage for adjustment to be applied to the voltage controlled oscillator is variably generated according to the control voltage data,
When setting the control voltage data and the adjustment data, the oscillation of the voltage controlled oscillation unit is set to the maximum frequency and the minimum frequency, and the maximum frequency and the minimum frequency are measured by the comparison result of the comparison unit, and the measurement result Calculate the center frequency from, set the control voltage data to generate the appropriate adjustment control voltage using the calculated center frequency,
A control method for a voltage-controlled oscillation device, wherein the adjustment data is varied using the adjustment control voltage to set appropriate adjustment data. The oscillation frequency is controlled by the input voltage, and a voltage-controlled oscillation unit that can adjust the variable range of the oscillation frequency in multiple stages by inputting adjustment data;
A reference oscillation unit for oscillating a reference frequency;
A comparison unit that compares the oscillation frequency of the voltage-controlled oscillation unit and the oscillation frequency of the reference oscillation unit;
In the control method of the voltage controlled oscillation device that sets appropriate adjustment data according to the comparison result in the comparison unit,
In the process of appropriately setting the adjustment data, generating a control voltage for adjustment to be applied to the voltage controlled oscillation unit,
Count the difference between the oscillation frequency of the reference oscillation unit and the oscillation frequency of the voltage controlled oscillation unit,
As a process of generating the adjustment data variably, it is determined from the count result whether the current adjustment data can be the final candidate, and when it is determined that the adjustment data cannot be the final candidate, which oscillation frequency is faster Or the information about whether it is late or not, move to the measurement using the adjustment data to be the next candidate, and when it is determined that it can be the final candidate, perform the process of determining the count result again, and the comparison A method for controlling a voltage controlled oscillation device, characterized in that a candidate value having the smallest difference in a section is set as appropriate adjustment data.

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