JPH06139201A - Method for transmitting information via shared memory - Google Patents
Method for transmitting information via shared memoryInfo
- Publication number
- JPH06139201A JPH06139201A JP12115392A JP12115392A JPH06139201A JP H06139201 A JPH06139201 A JP H06139201A JP 12115392 A JP12115392 A JP 12115392A JP 12115392 A JP12115392 A JP 12115392A JP H06139201 A JPH06139201 A JP H06139201A
- Authority
- JP
- Japan
- Prior art keywords
- area
- information
- amount
- data
- shared memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は主にFA機器におけるC
PU間のデータ受渡し方法に関する。BACKGROUND OF THE INVENTION The present invention is mainly used in FA equipment.
The present invention relates to a method of passing data between PUs.
【0002】[0002]
【従来の技術】従来例を図3に示して説明する。CPU
1は例えばコマンド等の情報を2ポートRAM(共有メ
モリ)を介してCPU2に受け渡す。CPU1が情報を
2ポートRAM3の中継領域4に書き込むと、CPU2
に割り込みがかかる。CPU2は割り込みルーチンによ
って中継領域4を読み出し、情報を受け取る。2. Description of the Related Art A conventional example will be described with reference to FIG. CPU
1 transfers information such as a command to the CPU 2 via a 2-port RAM (shared memory). When the CPU 1 writes information to the relay area 4 of the 2-port RAM 3, the CPU 2
Interrupts. The CPU 2 reads the relay area 4 by an interrupt routine and receives information.
【0003】[0003]
【発明が解決しようとする課題】一般にCPU間のデー
タ伝送において一度に渡すデータ量は、受け渡し毎にデ
ータ量が異なる場合がある。またデータの受け渡し頻度
が高い場合は、その伝送効率を向上させることが非常に
重要である。前記従来例では、データ量の多少にかかわ
らず領域4の大きさによって、伝送効率が一意に決まっ
てしまう。2つのCPU間で受け渡ししたいデータ量が
大きい時、上に示した従来の考えかたでは受け渡し領域
を大きくとるしか方法はない。そうすると、今度は受け
渡しデータ量が少ない場合、無駄な読み書き動作が増
え、全体的に伝送効率が悪くなる。これは、受け渡すデ
ータ量が多くなる程顕著になる。すなわち、従来例で
は、データの受渡し毎にデータ量が異なる場合、常に最
大のデータ量を送る場合と同等な伝送効率となり、伝送
効率の向上が望めず、非常に大量のデータを送る(但
し、データの受渡し毎にデータ量は異なる)場合伝送効
率が著しく低下するという大きな問題点がある。一方、
特開昭60−169970号公報に示されるようなメモ
リ空間の拡張を行うものは、メモリとその周辺回路の構
成が複雑になる。そこで、本発明は、渡すべき情報を渡
すべき量だけ効率的に渡すことができるデータ受渡し方
法を提供することを目的とする。Generally, in the data transmission between CPUs, the data amount to be transferred at one time may be different for each transfer. In addition, when the frequency of data transfer is high, it is very important to improve the transmission efficiency. In the above-mentioned conventional example, the transmission efficiency is uniquely determined by the size of the area 4 regardless of the amount of data. When the amount of data to be transferred between the two CPUs is large, the conventional way of thinking given above is to use a large transfer area. Then, if the amount of data to be transferred is small this time, the number of unnecessary read / write operations will increase, and the overall transmission efficiency will deteriorate. This becomes remarkable as the amount of data to be transferred increases. That is, in the conventional example, when the data amount is different for each data transfer, the transmission efficiency is the same as when the maximum data amount is always sent, and it is not possible to improve the transmission efficiency, and a very large amount of data is sent (however, If the amount of data is different for each data delivery), there is a big problem that the transmission efficiency is significantly reduced. on the other hand,
In the case of expanding the memory space as shown in JP-A-60-169970, the configuration of the memory and its peripheral circuits becomes complicated. Therefore, it is an object of the present invention to provide a data transfer method capable of efficiently transferring the information to be transferred by the amount to be transferred.
【0004】[0004]
【課題を解決するための手段】本発明では、共有メモリ
を介して一方のプロセッサから他方のプロセッサへ情報
を受け渡すシステムにおいて、共有メモリに固定長領域
である第1領域と多量情報格納用領域である第2領域を
確保し、前記第2領域を使用の有無を示す情報を書き込
む第3領域を前記固定長領域に定義し、受け渡しデータ
量が小さい場合、前記第3領域に前記第2領域を未使用
とする情報を書き込み、受け渡しデータ量が大きい場合
は前記第3領域に前記第2領域の使用を示す情報を書き
込む。According to the present invention, in a system for passing information from one processor to another processor via a shared memory, a first area which is a fixed length area and a large amount information storage area are provided in the shared memory. The second area is defined as the fixed length area, and the second area is stored in the third area when the transfer data amount is small. Information indicating that the second area is used is written in the third area when the amount of transferred data is large.
【0005】[0005]
【作用】本発明では、共有メモリの領域に必要最小限の
固定長領域と多量情報格納用領域の2つの領域を用意
し、受け渡しデータ量が小さい場合前記固定長領域のみ
を使用し、受け渡しデータ量が大きい場合は前記固定長
領域に前記多量情報格納用領域を使用する旨を示す情報
を書き込んでおくことにより、前記多量情報格納用領域
をも使用することができ、受け渡しデータ量の増減に従
って2ポートRAMの領域の大きさを切り替えるので、
データの伝送効率の向上が可能となり、上記課題が解決
するものである。According to the present invention, two areas, that is, a minimum fixed-length area and a large-volume information storage area are prepared in the shared memory area, and when the transfer data amount is small, only the fixed-length area is used. If the amount is large, by writing information indicating that the large amount information storage region is used in the fixed length region, the large amount information storage region can also be used, and as the amount of handed-over data increases or decreases. Since the size of the 2-port RAM area is switched,
The data transmission efficiency can be improved, and the above problems can be solved.
【0006】[0006]
【実施例】以下、具体的実施例を説明する。図1または
図2において、CPU1からCPU2へコマンド等の情
報を渡すことを考える。ここでは、図2の第3領域は、
第1領域内に設けた場合で説明する。このようにする
と、受け取り側CPUが最初に読み出す領域に、どの領
域を使用しているかが書き込まれているので読出のため
の特別の処理が不要になり便利である。図1は第3領域
を第1領域外に設けた場合である。さて、渡すべき情報
が少ない場合は2ポートRAM3上の固定長領域(第1
領域)5のみが利用される。CPU1が固定長領域5に
コマンド等の情報を書き込むとCPU2に割り込みがか
かる。CPU2は割り込みルーチン中で固定長領域5を
読みだし、その情報を受け取る。ここまでは従来と同じ
である。渡すべき情報が多くて固定長領域5だけでは足
りない場合、詳細情報を受け渡すため多量情報格納用領
域(第2領域)である領域6も利用される。この場合、
CPU1は先ず詳細情報を領域6へ書き込み、その後、
領域4にコマンド等の情報を書き込む。ここにはCPU
1が領域6をも利用している旨の情報が含まれている。
領域6への情報の書き込みで割り込みのかかったCPU
2は、その割り込みルーチンのなかで先ず領域7(第3
領域)を読みだし解釈して領域6が有効であることを知
る。そして次は領域6を読みだす。使用するコマンドを
追加する場合を考える。渡せるデータ量の範囲は広いの
で、付加されるコマンドへの束縛条件は少ない。また、
コマンド数が多くなり、領域5の領域だけでは足りなく
なったような場合、領域6に拡張コマンドを書き込み、
その旨を領域5に示すこともできる。EXAMPLES Specific examples will be described below. Consider passing information such as a command from the CPU 1 to the CPU 2 in FIG. 1 or 2. Here, the third area in FIG.
The case where it is provided in the first region will be described. In this case, since which area is being used is written in the area first read by the receiving CPU, no special processing for reading is required, which is convenient. FIG. 1 shows a case where the third region is provided outside the first region. If there is little information to be passed, the fixed length area (first area) on the 2-port RAM 3
Only area 5 is used. When the CPU 1 writes information such as a command in the fixed length area 5, the CPU 2 is interrupted. The CPU 2 reads the fixed length area 5 in the interrupt routine and receives the information. Up to this point, the process is the same as the conventional one. When there is a large amount of information to be passed and the fixed length area 5 is not enough, the area 6 which is a large amount information storage area (second area) is also used to transfer detailed information. in this case,
The CPU 1 first writes the detailed information in the area 6, and then
Information such as a command is written in the area 4. CPU here
Information that 1 also uses the area 6 is included.
CPU interrupted by writing information to area 6
2 is the area 7 (3rd area) in the interrupt routine.
(Area) is read and interpreted to know that area 6 is effective. Then, the area 6 is read out. Suppose you want to add a command to use. Since the range of data that can be passed is wide, there are few constraints on the added commands. Also,
If the number of commands increases and the area 5 is not enough, write the extended command in area 6,
This can be shown in the area 5.
【0007】[0007]
【発明の効果】本発明によれば、渡すべき情報を渡すべ
き量だけ効率的に渡すことができ、受渡し効率の向上が
実現できる。また、コマンド体系の変更等に対しても柔
軟なシステムを実現できる。According to the present invention, the amount of information to be passed can be efficiently passed, and the delivery efficiency can be improved. Moreover, a flexible system can be realized even when the command system is changed.
【図1】本発明の実施例FIG. 1 Example of the present invention
【図2】本発明の他の実施例FIG. 2 is another embodiment of the present invention.
【図2】従来例FIG. 2 Conventional example
1,2 CPU 3 2ポートRAM 4 中継領域 5 固定長領域(第1領域) 6 多量情報格納用領域(第2領域) 7 多量情報格納用領域の使用の有無を示す領域(第3
領域)1, 2 CPU 3 2-port RAM 4 Relay area 5 Fixed length area (first area) 6 Large amount information storage area (second area) 7 Area indicating whether or not the large amount information storage area is used (third area)
region)
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成5年10月27日[Submission date] October 27, 1993
【手続補正1】[Procedure Amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】図面の簡単な説明[Name of item to be corrected] Brief description of the drawing
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図面の簡単な説明】[Brief description of drawings]
【図1】本発明の実施例FIG. 1 Example of the present invention
【図2】本発明の他の実施例FIG. 2 is another embodiment of the present invention.
【図3】従来例FIG. 3 Conventional example
【符号の説明】 1,2 CPU 3 2ポートRAM 4 中継領域 5 固定長領域(第1領域) 6 多量情報格納用領域(第2領域) 7 多量情報格納用領域の使用の有無を示す領域(第3
領域)[Explanation of Codes] 1, 2 CPU 3 2-port RAM 4 Relay area 5 Fixed length area (first area) 6 Large amount information storage area (second area) 7 Area indicating whether or not the large amount information storage area is used ( Third
region)
Claims (2)
ら他方のプロセッサへ情報を受け渡すシステムにおい
て、前記共有メモリの記憶領域内に、 固定長領域である第1領域と、 多量情報格納用領域である第2領域と、 前記第2領域使用の有無を示す情報を書き込む第3領域
とを設け、 受け渡しデータ量が小さい場合は前記第3領域に前記第
2領域を未使用とする情報を書き込み、受け渡しデータ
量が大きい場合は前記第3領域に前記第2領域の使用を
示す情報を書き込むとともに、情報受渡し開始時にまず
前記第3領域の情報を読み出して、前記第3領域で指定
された領域に受渡すべき情報を書き込むようにすること
を特徴とする共有メモリを介する情報の受渡し方法。1. In a system for passing information from one processor to another processor via a shared memory, in a storage area of the shared memory, a first area which is a fixed length area and an area for storing a large amount of information are provided. A certain second area and a third area for writing information indicating whether or not the second area is used are provided, and when the amount of transferred data is small, the information that the second area is unused is written in the third area, When the amount of transferred data is large, the information indicating the use of the second area is written in the third area, and the information in the third area is first read at the start of the information transfer to the area designated by the third area. A method for passing information through a shared memory, characterized in that information to be passed is written.
領域内に設けたことを特徴とする請求項1記載の共有メ
モリを介する情報受渡し方法。2. The third region of claim 1 is the first region of claim 1.
The information passing method via a shared memory according to claim 1, wherein the method is provided in an area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12115392A JPH06139201A (en) | 1992-04-14 | 1992-04-14 | Method for transmitting information via shared memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12115392A JPH06139201A (en) | 1992-04-14 | 1992-04-14 | Method for transmitting information via shared memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06139201A true JPH06139201A (en) | 1994-05-20 |
Family
ID=14804167
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12115392A Pending JPH06139201A (en) | 1992-04-14 | 1992-04-14 | Method for transmitting information via shared memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH06139201A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2512443A (en) * | 2013-03-25 | 2014-10-01 | Ge Aviat Systems Llc | Method of hybrid message passing with shared memory |
-
1992
- 1992-04-14 JP JP12115392A patent/JPH06139201A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2512443A (en) * | 2013-03-25 | 2014-10-01 | Ge Aviat Systems Llc | Method of hybrid message passing with shared memory |
GB2512443B (en) * | 2013-03-25 | 2017-11-08 | Ge Aviation Systems Llc | Method of hybrid message passing with shared memory |
US10069779B2 (en) | 2013-03-25 | 2018-09-04 | Ge Aviation Systems Llc | Method of hybrid message passing with shared memory |
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