JPH06132741A - Offset correction circuit for differential amplifier - Google Patents

Abstract

PURPOSE:To reduce consumption current without being affected by the dispersion of a current source in the offset correction circuit of a differential amplifier. CONSTITUTION:In a differential amplifier circuit where the base of a transistor Q1 in which a collector is grounded is connected to one output terminal A of a differential amplifier 1, a dummy transistor Q2 where a collector is connected to the emitter of the transistor Q1 and an emitter is connected to a constant current source 2 is provided and a first diode D1 is connected between the base of the dummy transistor Q2 and the other output terminal B of the differential amplifier 1 so as to constitute the offset correction circuit of the differential amplifier.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an offset correction circuit for a differential amplifier, and more particularly to a circuit for correcting an offset generated by a base current of a transistor connected to an output terminal of a differential amplifier.

[0002]

2. Description of the Related Art As a circuit for correcting an offset generated by a base current of a transistor connected to an output terminal of a differential amplifier, a circuit having a structure shown in FIG. 4 is conventionally known. This offset correction circuit is composed of transistors 101,
Transistor 10 in a differential amplifier circuit in which the base of a transistor 106 whose collector is grounded is connected to one output terminal of the differential amplifier consisting of 102, 103, 104 and 105.
In order to correct the offset generated by the base current of 6, a dummy transistor 107 whose collector is grounded and whose base is connected to the other output terminal of the differential amplifier is provided, and the transistor 107 has a base equal to the base current of the transistor 106. The constant current I _{2 is made} to flow as well as the current is made to flow, whereby the base current of the transistor 106 is canceled and the offset is corrected. The transistors 108, 109 and 110 form a Miller constant current circuit together with the transistor 105.
111 is a reference current source.

[0003]

By the way, in the conventional offset correction circuit of the differential amplifier shown in FIG.
The current I ₁ flowing through the transistor 106 and the transistor 107
If the current I ₂ flowing through is equal, the offset is completely corrected, but the transistor 109 forming the constant current source is corrected.
, 110 and their emitter resistances R ₂ and R _{4 and} the like cause variations in the constant current sources of the transistors 106 and 107, and when I ₁ ≠ I ₂ , the offset is not corrected and the differential amplifier There is a problem that offset occurs. Further, the dummy circuit formed by the transistor 107 causes an increase in current consumption.

The present invention has been made in order to solve the above problems in the offset correction circuit of the conventional differential amplifier, and is not affected by the variation of the constant current source and does not increase the current consumption. An object is to provide an offset correction circuit for an amplifier.

[0005]

In order to solve the above problems, according to the present invention, as shown in the conceptual diagram of FIG. 1, the output terminal A of the differential amplifier 1 includes a transistor Q1 whose collector is grounded. In the differential amplifier circuit with the base connected, a collector is connected to the emitter of the transistor Q1 and a dummy transistor Q2 having the emitter connected to the constant current source 2 is provided, and the base of the dummy transistor Q2 and the differential amplifier 1 are provided. The first diode D1 is connected between the other output terminal B of the above, and the offset correction circuit of the differential amplifier is configured.

In the offset correction circuit thus constructed, the dummy transistor Q2 is used as a grounded base, and functions as a buffer for flowing the constant current I from the constant current source 2 to the transistor Q1. Since the base of the dummy transistor Q2 is connected to the other output terminal B of the differential amplifier 1, the base current of the transistor Q1 is canceled to correct the offset. At this time, the emitter terminal of the transistor Q1 normally has a bias voltage of about 2
Since it is set to V _BE , V of the dummy transistor Q2
_{In order} to hold _CE and operate the transistor, the first diode D1 connected between the transistor Q2 and the output terminal B of the differential amplifier 1 functions as a level shift element.

Since the current flowing through the transistor Q1 and the current flowing through the dummy transistor Q2 are common, the problem of current source variation is eliminated and the influence on the offset is eliminated. Further, since the current source is shared, the dummy current is reduced and the constituent elements of the current source are also reduced.

[0008]

EXAMPLES Next, examples will be described. FIG. 2 is a circuit configuration diagram showing an embodiment of the offset correction circuit of the differential amplifier according to this embodiment. In this embodiment, the present invention is applied to an NPN input type differential amplifier. The base of the transistor Q1 is connected to one output terminal A of the differential amplifier 11 composed of the transistors Q3 to Q7, and the dummy transistor Q2 is connected to the emitter of the transistor Q1.
Connect the collector of. And the dummy transistor Q
V _{CE of} the transistor Q1 and the dummy transistor Q are provided between the base of the second amplifier 2 and the other output terminal B of the differential amplifier 11.
The level shifting diodes D1 and D2 are connected to make V _{CE of} 2 substantially the same. In addition, in FIG.
Q7, Q8 are current source transistors, Q9 is a biasing transistor, and Q7, Q8, Q9 form a current mirror type constant current circuit. 12 is a reference current source.

The offset correction circuit of the differential amplifier configured as described above is basically the same as that shown in the conceptual diagram of FIG. 1, the same operation is performed, and the offset variation of the differential amplifier is corrected. To be done. In this embodiment, the bias current of the transistors Q1 and Q2 is the collector current _IQ8 of the transistor _Q8 , and
And the base current of Q2 becomes I _Q8 / β _NPN .

FIG. 3 is a circuit configuration diagram showing a second embodiment. In this embodiment, the present invention is applied to a PNP input type differential amplifier, and the same or corresponding members as those in the first embodiment shown in FIG. This is the same as in the first embodiment.

In the above embodiment, two diodes D1 and D2 are connected between the dummy transistor Q2 and the output terminal B of the differential amplifier 11, but the level shift diode is used for dummy. At least one transistor is required to operate the transistor by setting V _CE of the transistor Q2 to about 0.4V or more. However, as in the above embodiment,
By using two diodes, the transistor Q1
And Q2 of V _CE is approximately equal, the effect of correcting the base current is increased.

[0012]

As described above on the basis of the embodiments,
According to the present invention, the transistors connected to the output terminals of the differential amplifier and the dummy transistor are configured to have the same current, so that the problem of current source variation is eliminated and the offset variation is eliminated. Further, since the current source is common, the current consumption is reduced, and the number of elements forming the current source is also reduced.

[Brief description of drawings]

FIG. 1 is a conceptual diagram for explaining an offset correction circuit of a differential amplifier according to the present invention.

FIG. 2 is a circuit configuration diagram showing a first embodiment of the present invention.

FIG. 3 is a circuit configuration diagram showing a second embodiment of the present invention.

FIG. 4 is a circuit configuration diagram showing a configuration example of an offset correction circuit of a conventional differential amplifier.

[Explanation of symbols]

 1 Differential amplifier 2 Constant current source Q1 transistor Q2 Dummy transistor

Claims (2)

[Claims] 1. A dummy amplifier circuit in which a collector of the differential amplifier is connected to the base of a transistor whose collector is grounded, and the emitter of the transistor is connected to the collector and the emitter is connected to a constant current source. An offset correction circuit for a differential amplifier, wherein a transistor is provided and a first diode is connected between the base of the dummy transistor and the other output terminal of the differential amplifier. 2. The offset correction circuit according to claim 1, further comprising a second diode connected between the base of the dummy transistor and the first diode. circuit.