JPH0613258A - Forming method for pattern of thin film laminated capacitor - Google Patents
Forming method for pattern of thin film laminated capacitorInfo
- Publication number
- JPH0613258A JPH0613258A JP3338100A JP33810091A JPH0613258A JP H0613258 A JPH0613258 A JP H0613258A JP 3338100 A JP3338100 A JP 3338100A JP 33810091 A JP33810091 A JP 33810091A JP H0613258 A JPH0613258 A JP H0613258A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- substrate
- metal
- dielectric
- pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 61
- 239000003990 capacitor Substances 0.000 title claims abstract description 28
- 238000000034 method Methods 0.000 title claims abstract description 28
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- 238000001704 evaporation Methods 0.000 claims abstract description 24
- 230000008020 evaporation Effects 0.000 claims abstract description 23
- 229920003002 synthetic resin Polymers 0.000 claims abstract description 22
- 239000000057 synthetic resin Substances 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims description 50
- 238000007740 vapor deposition Methods 0.000 claims description 7
- 229920001807 Urea-formaldehyde Polymers 0.000 claims description 2
- 239000010408 film Substances 0.000 abstract description 11
- 238000000151 deposition Methods 0.000 abstract description 6
- 230000008021 deposition Effects 0.000 abstract description 5
- 101100269850 Caenorhabditis elegans mask-1 gene Proteins 0.000 abstract description 4
- 238000010030 laminating Methods 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 229920005989 resin Polymers 0.000 abstract 1
- 239000011347 resin Substances 0.000 abstract 1
- 238000001883 metal evaporation Methods 0.000 description 9
- 230000000052 comparative effect Effects 0.000 description 8
- 238000009826 distribution Methods 0.000 description 5
- 239000000178 monomer Substances 0.000 description 5
- 239000002994 raw material Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 238000005259 measurement Methods 0.000 description 3
- 238000001771 vacuum deposition Methods 0.000 description 3
- UPMLOUAZCHDJJD-UHFFFAOYSA-N 4,4'-Diphenylmethane Diisocyanate Chemical compound C1=CC(N=C=O)=CC=C1CC1=CC=C(N=C=O)C=C1 UPMLOUAZCHDJJD-UHFFFAOYSA-N 0.000 description 2
- YBRVSVVVWCFQMG-UHFFFAOYSA-N 4,4'-diaminodiphenylmethane Chemical compound C1=CC(N)=CC=C1CC1=CC=C(N)C=C1 YBRVSVVVWCFQMG-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電気回路部品として用
いられる薄膜積層コンデンサのパターン形成方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pattern forming method for a thin film multilayer capacitor used as an electric circuit component.
【０００２】[0002]
【従来の技術】従来、真空蒸着により基体表面に誘電体
となる合成樹脂薄膜と内部電極となる金属薄膜を交互に
形成、積層する薄膜積層コンデンサのパターン形成方法
としては、シルクスクリーン印刷やホトレジストを用い
て基体表面にネガ画像を形成し、その後、誘電体となる
合成樹脂薄膜あるいは内部電極となる金属薄膜を全面に
付け、さらにネガ画像形成材料を溶解する溶液中でネガ
画像形成材料を溶解すると共に、その上に付いている合
成樹脂薄膜あるいは内部電極となる金属薄膜を取り去り
パターン形成することを繰り返し行なって積層する「リ
フトオフ法」、基体表面全面に誘電体となる合成樹脂薄
膜あるいは内部電極となる金属薄膜を付けた上に、シル
クスクリーン印刷やホトレジストを用いてポジパターン
を形成し、その後、露出部をウェットエッチングやドラ
イエッチング等により除去、さらにポジパターン形成材
料を溶解する溶液等でポジパターン形成材料を除去しパ
ターン形成することを繰り返し行なって積層する「ホト
エッチング法」、基体表面にネガパターン状のマスクを
密着させ、その後、誘電体となる合成樹脂薄膜あるいは
内部電極となる金属薄膜を全面に付け、さらにマスクを
取り外しパターン形成することを繰り返し行なって積層
する「マスク法」、等が知られている。2. Description of the Related Art Conventionally, silk screen printing or photoresist has been used as a pattern forming method for a thin film multilayer capacitor in which a synthetic resin thin film as a dielectric and a metal thin film as an internal electrode are alternately formed and laminated on the surface of a substrate by vacuum deposition. A negative image is formed on the surface of the substrate by using it, and then a synthetic resin thin film as a dielectric or a metal thin film as an internal electrode is attached to the entire surface, and the negative image forming material is dissolved in a solution for dissolving the negative image forming material. At the same time, the "lift-off method" is repeated in which the synthetic resin thin film or the metal thin film to be the internal electrode that is attached on top of it is repeatedly formed and laminated to form a pattern. After applying a thin metal film that will become a positive pattern using silk screen printing or photoresist, The exposed part is removed by wet etching or dry etching, and the positive pattern forming material is removed by a solution that dissolves the positive pattern forming material to form a pattern. A "mask method" is used, in which a patterned mask is adhered, then a synthetic resin thin film that becomes a dielectric or a metal thin film that becomes an internal electrode is attached to the entire surface, and then the mask is removed and pattern formation is repeated to stack. Are known.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上記の
薄膜積層コンデンサのパターン形成方法では、「リフト
オフ法」「ホトエッチング法」の場合はパターン形成工
程が複雑で積層膜の加工が複雑になる等の課題を有して
いた。また「マスク法」の場合はパターン形成工程が簡
単で積層膜の加工が容易なものの、マスクの密着と取り
外しを繰り返す際、特に２種類以上のマスクを使用する
必要があり、マスクの位置合わせ精度の確保が難しい等
の課題を有していた。However, in the pattern forming method for the above-mentioned thin film multilayer capacitor, in the case of the "lift-off method" and "photoetching method", the pattern forming process is complicated and the processing of the laminated film is complicated. Had challenges. Further, in the case of the "mask method", although the pattern forming process is simple and the laminated film can be easily processed, it is necessary to use two or more kinds of masks especially when repeating the adhesion and the removal of the mask, and the mask alignment accuracy is increased. It was difficult to secure
【０００４】本発明は、上記従来の課題を解決するもの
で、パターン形成工程が簡単で積層膜の加工が容易であ
り、位置精度の確保も容易な薄膜積層コンデンサのパタ
ーン形成方法を提供することを目的とする。The present invention solves the above-mentioned conventional problems, and provides a pattern forming method for a thin film multilayer capacitor, in which the pattern forming process is simple, the laminated film can be easily processed, and the positional accuracy can be easily ensured. With the goal.
【０００５】[0005]
【課題を解決するための手段】上記目的を達成するため
に本発明の薄膜積層コンデンサのパターン形成方法は、
真空蒸着により基体表面に合成樹脂誘電体薄膜と一端ま
たは他端に外部電極引き出し部を有する内部電極金属薄
膜を交互に形成、積層する工程において、開口部エッジ
の勾配が基体表面の法線方向より基体蒸着面に向って内
方向に２０゜以上７０゜以下である金属マスク１枚を用
い、また誘電体となる合成樹脂の蒸発源の位置する角度
が基体表面の法線方向であり、内部電極となる金属の蒸
発源の位置する角度が基体表面の法線方向に対し外部電
極引き出し部とは逆の方向に２０゜以上７０゜以下であ
る構成でパターン形成することである。In order to achieve the above object, a pattern forming method for a thin film multilayer capacitor according to the present invention comprises:
In the process of alternately forming and laminating the synthetic resin dielectric thin film and the internal electrode metal thin film having the external electrode lead-out portion at one end or the other end on the surface of the substrate by vacuum deposition, the gradient of the opening edge is more than the normal direction of the substrate surface. Using one metal mask which is 20 ° or more and 70 ° or less inward toward the vapor deposition surface of the substrate, the angle at which the evaporation source of the synthetic resin as the dielectric is located is the normal direction of the substrate surface, and the internal electrode The pattern is formed in such a manner that the angle at which the metal evaporation source is positioned is 20 ° or more and 70 ° or less in the direction opposite to the external electrode lead portion with respect to the normal line direction of the substrate surface.
【０００６】[0006]
【作用】本発明の薄膜積層コンデンサのパターン形成方
法は上記構成とすることにより、蒸着の指向性を利用す
ることで１枚の金属マスクを基体から取り外すことなく
密着したままで、基体表面に誘電体となる合成樹脂薄膜
と内部電極となる金属薄膜を交互に形成、積層すること
ができることとなる。The pattern forming method for a thin film multilayer capacitor according to the present invention has the above-mentioned structure, and by utilizing the directivity of vapor deposition, one metal mask is kept in close contact without being removed from the base, and the dielectric is applied to the surface of the base. The synthetic resin thin film as the body and the metal thin film as the internal electrode can be alternately formed and laminated.
【０００７】以下図面を参照しながら作用に付いて詳細
に説明する。図１は、本発明の薄膜積層コンデンサのパ
ターン形成方法を説明するための概略断面図であり、図
１に示すように開口部エッジの勾配２が基体６表面の法
線方向に対し基体蒸着面に向って内方向に２０゜及至７
０゜である金属マスク１を基体６の表面に密着させ、内
部電極となる金属薄膜４を形成する際には、金属の蒸発
源１９の位置する角度５が基体６表面の法線方向に対し
て外部電極引き出し部とは逆の方向に２０゜以上７０゜
以下の位置となるように設定することにより、金属薄膜
４は金属マスク１に対し外部電極引き出し部方向にシフ
トした位置の基体６上に形成される（図１ａ）。The operation will be described in detail below with reference to the drawings. FIG. 1 is a schematic cross-sectional view for explaining the pattern forming method of the thin film multilayer capacitor of the present invention. As shown in FIG. 1, the gradient 2 of the edge of the opening is the vapor deposition surface of the substrate with respect to the normal direction of the surface of the substrate 6. 20 ° to 7 inward toward
When the metal mask 1 of 0 ° is brought into close contact with the surface of the substrate 6 to form the metal thin film 4 to be the internal electrode, the angle 5 at which the metal evaporation source 19 is located is with respect to the direction normal to the surface of the substrate 6. The metal thin film 4 is set on the substrate 6 at a position shifted in the direction of the external electrode lead-out portion with respect to the metal mask 1 by setting the position to be 20 ° or more and 70 ° or less in the direction opposite to the external electrode lead-out portion. Formed (Fig. 1a).
【０００８】誘電体となる合成樹脂薄膜３を形成する際
は、図１ｂに示すように、上記金属マスク１を密着させ
たままとし、合成樹脂の蒸発源１７を基体表面の法線方
向に設定することにより、合成樹脂薄膜３は金属マスク
開口部中央位置に対応する基体６上に形成される。ま
た、金属薄膜４の対向電極である金属薄膜４’も同様に
形成する（図１ｃ）。When forming the synthetic resin thin film 3 to be a dielectric, as shown in FIG. 1b, the metal mask 1 is kept in close contact, and the synthetic resin evaporation source 17 is set in the direction normal to the substrate surface. By doing so, the synthetic resin thin film 3 is formed on the substrate 6 corresponding to the central position of the metal mask opening. Further, a metal thin film 4'which is an opposite electrode of the metal thin film 4 is similarly formed (FIG. 1c).
【０００９】以上を繰り返す事により、金属マスクを基
体より取り外す事なく薄膜積層コンデンサのパターンが
形成可能となる。By repeating the above, the pattern of the thin film multilayer capacitor can be formed without removing the metal mask from the substrate.
【００１０】また、金属マスクの開口部エッジの勾配は
基体表面の法線方向より基体蒸着面に向って内方向に２
０゜以上７０゜以下の角度であり、また内部電極となる
金属の蒸発源は基体表面の法線方向に対し、外部電極引
き出し部とは逆の方向に２０゜以上７０゜以下の位置に
設定する必要がある。２０゜未満であると内部電極のシ
フト量（外部電極引き出し量）が十分でなく、外部電極
との接続が不十分になり誘電正接異常となる。また、金
属マスクの開口部エッジの勾配が７０゜を越えると、金
属マスクの強度低下による変形が起き、高精度なパター
ンが形成できなくなる。また内部電極となる金属の蒸発
源の位置角度が基体表面の法線方向に対し７０゜を越え
ると金属薄膜の付着効率が著しく低下し好ましくない。The gradient of the opening edge of the metal mask is 2 inward from the normal line of the substrate surface toward the substrate deposition surface.
The angle is 0 ° or more and 70 ° or less, and the evaporation source of the metal serving as the internal electrode is set at a position of 20 ° or more and 70 ° or less in the direction opposite to the external electrode lead portion with respect to the normal line direction of the substrate surface. There is a need to. If it is less than 20 °, the shift amount of the internal electrodes (external electrode extraction amount) is not sufficient and the connection with the external electrodes becomes insufficient, resulting in dielectric loss tangent abnormality. Further, when the inclination of the edge of the opening of the metal mask exceeds 70 °, the metal mask is deformed due to a decrease in strength, so that a highly accurate pattern cannot be formed. Further, if the position angle of the evaporation source of the metal serving as the internal electrode exceeds 70 ° with respect to the direction normal to the surface of the substrate, the deposition efficiency of the metal thin film is significantly reduced, which is not preferable.
【００１１】[0011]
【実施例】以下本発明の一実施例に付いて図面を参照し
ながら説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.
【００１２】図２は本発明の薄膜積層コンデンサのパタ
ーン形成方法を実施するために使用する装置の概略断面
図である。図２に示すように、薄膜積層コンデンサを形
成させるための基体６には、基体表面の法線方向より基
体蒸着面に向って内方向に勾配を持つ金属マスク７が密
着してあり、基体ホルダー８によって下向きに保持され
ている。また、真空排気系９に接続された真空槽１０内
は３つのチャンバー１１，１４及び１９に分割してあ
り、基体ホルダー８は金属マスク７を密着させたままの
状態で基体６と共に各チャンバーに移動し、基体６と金
属マスク７に所定の傾斜を与えることができるようにな
っている。チャンバー１１の下部には内部電極となる金
属の蒸発源１２と加熱用のＥＢガン（図示せず）が設け
られ、シャッター１３により所定の膜厚に調整される。
そしてチャンバー１４の下部には２種類の原料モノマー
をそれぞれ蒸発させるための蒸発源１５，１６が設けら
れ、それぞれヒーター（図示せず）と熱電対（図示せ
ず）とによって各原料モノマーの蒸発量が一定となる所
定温度に制御される。そして、それぞれの蒸発源より蒸
発した原料モノマーは噴き出し口１７より噴出する。吹
き出し口１７の上部にはシャッター１８が設けられてお
り、その開閉により基体６に形成される合成樹脂薄膜の
膜厚が調整される。チャンバー１９は、チャンバー１１
と同様に、下部には内部電極となる金属の蒸発源２０と
加熱用のＥＢガン（図示せず）が設けられ、それぞれシ
ャッター２１により所定の膜厚に調整される。ただし、
基体ホルダー８の傾斜の方向が、チャンバー１１とチャ
ンバー１９とでは逆向きになるようになっている。FIG. 2 is a schematic sectional view of an apparatus used for carrying out the pattern forming method of the thin film multilayer capacitor of the present invention. As shown in FIG. 2, a metal mask 7 having a gradient inward from the normal direction of the substrate surface toward the substrate deposition surface is in close contact with the substrate 6 for forming the thin film multilayer capacitor. It is held downward by 8. Further, the inside of the vacuum chamber 10 connected to the vacuum exhaust system 9 is divided into three chambers 11, 14 and 19, and the substrate holder 8 is provided in each chamber together with the substrate 6 with the metal mask 7 kept in close contact. By moving, the base 6 and the metal mask 7 can be given a predetermined inclination. A metal evaporation source 12 serving as an internal electrode and an EB gun (not shown) for heating are provided below the chamber 11, and a shutter 13 adjusts the film thickness to a predetermined value.
Evaporation sources 15 and 16 for evaporating the two types of raw material monomers are provided in the lower part of the chamber 14, and the evaporation amount of each raw material monomer is respectively provided by a heater (not shown) and a thermocouple (not shown). Is controlled to a predetermined temperature at which is constant. Then, the raw material monomers evaporated from the respective evaporation sources are ejected from the ejection port 17. A shutter 18 is provided above the outlet 17, and the thickness of the synthetic resin thin film formed on the substrate 6 is adjusted by opening and closing the shutter 18. The chamber 19 is the chamber 11
Similarly, a metal evaporation source 20 serving as an internal electrode and an EB gun (not shown) for heating are provided in the lower part, and each is adjusted to a predetermined film thickness by a shutter 21. However,
The inclination directions of the substrate holder 8 are opposite in the chamber 11 and the chamber 19.
【００１３】次に上記装置を用いた重付加反応による尿
素樹脂薄膜による薄膜積層コンデンサのパターン形成方
法の一例を説明する。Next, an example of a method of forming a pattern of a thin film multilayer capacitor by a urea resin thin film by a polyaddition reaction using the above apparatus will be described.
【００１４】１０cm角のガラス板を基体６とし、誘電体
となる合成樹脂原料モノマーとして、蒸発源１５に４，
４’メチレン・ジアニリンを、蒸発源１６に４，４’ジ
フェニル・メタン・ジイソシアネートを充填し、内部電
極となる金属材料として、蒸発源１２、２０のそれぞれ
にアルミニウムを充填した。シャッター１３、１８、２
１のそれぞれを閉じた状態で、チャンバー１１、１４、
１９内のいずれもが雰囲気ガスの全圧が１０-3Pa以下に
なるまで真空排気系９により排気する。なお、基体６の
中心点から合成樹脂原料モノマーの蒸発源噴き出し口１
７の中心までの距離は３０cm、蒸発源噴き出し口１７の
内径は３cmであった。また、基体６の中心点から金属電
極材料の蒸発源１２、２０の中心までの距離は３５cmで
あった。また、金属の蒸発源位置は基体表面の法線方向
に対し外部電極引き出し部とは逆の方向に２０゜の角度
にあった。また、金属マスクの厚みは０．２mmであり、
基体蒸着面に向って内方向の勾配は２０゜であった。次
いで、蒸発源１５および１６のヒーターを制御して、
４，４’メチレン・ジアニリンを１１０±１℃に、４，
４’ジフェニル・メタン・ジイソシアネートを８０±１
℃に加熱した。この状態で合成樹脂薄膜と金属薄膜を交
互に形成、積層し、外部電極としては亜鉛を金属溶射
し、基体上に誘電体厚みが１層当たり４０００Å、内部
電極厚みが１層当たり１０００Å、積層数１００の薄膜
積層コンデンサを得た。A glass plate having a size of 10 cm is used as a base 6, and a synthetic resin raw material monomer that serves as a dielectric is used as an evaporation source 15.
The evaporation source 16 was filled with 4'methylene dianiline, and the evaporation source 16 was filled with 4,4 'diphenyl methane diisocyanate, and aluminum was filled in each of the evaporation sources 12 and 20 as a metal material to be an internal electrode. Shutters 13, 18, 2
1 in the closed state, the chambers 11, 14,
All of the inside 19 are exhausted by the vacuum exhaust system 9 until the total pressure of the atmospheric gas becomes 10 −3 Pa or less. It should be noted that from the center point of the substrate 6, the evaporation source ejection port 1 of the synthetic resin raw material monomer
The distance to the center of 7 was 30 cm, and the inner diameter of the evaporation source jet 17 was 3 cm. The distance from the center point of the substrate 6 to the centers of the evaporation sources 12 and 20 of the metal electrode material was 35 cm. Further, the metal evaporation source position was at an angle of 20 ° in the direction opposite to the external electrode lead portion with respect to the normal line direction of the substrate surface. The thickness of the metal mask is 0.2 mm,
The inward gradient toward the substrate vapor deposition surface was 20 °. Then control the heaters of evaporation sources 15 and 16 to
4,4'methylene dianiline at 110 ± 1 ° C
80 ± 1 of 4'diphenyl methane diisocyanate
Heated to ° C. In this state, synthetic resin thin film and metal thin film are alternately formed and laminated, zinc is metal-sprayed as the external electrode, the dielectric thickness on the substrate is 4000 Å per layer, the internal electrode thickness is 1000 Å per layer, the number of lamination 100 thin film multilayer capacitors were obtained.
【００１５】（比較例１）金属マスクの基体蒸着面に向
って内方向の勾配が１５゜である以外は実施例と全く同
様にして、基体上に積層数１００の薄膜積層コンデンサ
を得た。Comparative Example 1 A thin film multilayer capacitor having a stacking number of 100 on a substrate was obtained in exactly the same manner as in Example except that the inward gradient of the metal mask toward the substrate deposition surface was 15 °.
【００１６】（比較例２）金属の蒸発源が基体表面の法
線方向に対し外部電極引き出し部とは逆の方向に１５゜
の位置である以外は実施例と全く同様にして、基体上に
積層数１００の薄膜積層コンデンサを得た。(Comparative Example 2) A metal evaporation source was formed on a substrate in exactly the same manner as in Example 1 except that the metal evaporation source was located at a position of 15 ° in the direction opposite to the external electrode lead-out portion with respect to the normal line direction of the substrate surface. A thin film multilayer capacitor having 100 layers was obtained.
【００１７】（比較例３）開口部エッジの勾配が基体表
面の法線方向と一致している金属マスクを基体に密着、
取り外しを繰り返し、誘電体と内部電極のパターンを形
成した。また、金属の蒸発源は基体表面の法線方向とし
た。それ以外は実施例と全く同様にして、基体上に積層
数１００の薄膜積層コンデンサを得た。(Comparative Example 3) A metal mask in which the gradient of the edge of the opening coincides with the direction of the normal to the surface of the substrate is adhered to the substrate,
Removal was repeated to form a pattern of the dielectric and internal electrodes. The evaporation source of the metal was in the direction normal to the surface of the substrate. Except for this, the thin-film multilayer capacitor having the number of stacks of 100 was obtained in the same manner as in the example.
【００１８】上記本実施例と比較例それぞれによる薄膜
積層コンデンサのパターンエッジ部の膜厚分布（５点測
定の平均値）を図３に比較して示している。また、本実
施例と比較例それぞれによる薄膜積層コンデンサの誘電
正接の分布（測定素子数１００）を図４に比較して示し
ている。FIG. 3 shows a comparison of film thickness distributions (average values of five points) at the pattern edge portions of the thin film multilayer capacitors according to the present embodiment and the comparative example. Further, distributions of dielectric loss tangents (100 measurement elements) of the thin film multilayer capacitors according to the present example and the comparative example are shown in comparison with FIG.
【００１９】この図３、４から明らかなように、比較例
においては金属マスクの位置精度の低さにより薄膜積層
コンデンサのパターンエッジ部の膜厚分布の広がりが増
大したり、外部電極と内部電極の接続が不十分なため誘
電正接の悪化を招く。As is clear from FIGS. 3 and 4, in the comparative example, the spread of the film thickness distribution at the pattern edge portion of the thin film multilayer capacitor is increased due to the low positional accuracy of the metal mask, and the external electrode and the internal electrode are increased. Is inadequate, which causes deterioration of the dielectric loss tangent.
【００２０】[0020]
【発明の効果】本発明は上記実施例より明らかなよう
に、真空蒸着により基体表面に誘電体となる合成樹脂薄
膜と内部電極となる金属薄膜を交互に形成、積層する方
法として、開口部エッジの勾配が基体表面の法線方向よ
り基体蒸着面に向って内方向に２０゜以上７０゜以下で
ある金属マスク１枚を用い、また誘電体となる合成樹脂
の蒸発源の位置する角度が基体表面の法線方向であり、
内部電極となる金属の蒸発源の位置する角度が基体表面
の法線方向に対し外部電極引き出し部とは逆の方向に２
０゜以上７０゜以下である構成でパターンを形成する事
により、１枚の金属マスクを基体から取り外すことなく
密着したままで、基体表面に誘電体となる合成樹脂薄膜
と内部電極となる金属薄膜を交互に形成、積層すること
ができ、結果として、パターン形成工程が簡単で積層膜
の加工が容易で、位置精度の確保も容易な薄膜積層コン
デンサのパターン形成方法を実現できるものである。As is apparent from the above embodiments, the present invention provides a method of alternately forming and laminating a synthetic resin thin film which becomes a dielectric and a metal thin film which becomes an internal electrode on the surface of a substrate by vacuum deposition, and a method of laminating the opening edge One metal mask having an inclination of 20 ° or more and 70 ° or less inward from the normal direction of the substrate surface toward the substrate vapor deposition surface is used, and the angle at which the evaporation source of the synthetic resin serving as the dielectric is located is the substrate. Is the normal direction of the surface,
The angle at which the metal evaporation source to be the internal electrode is located is 2 in the direction opposite to the external electrode lead-out portion with respect to the normal direction of the substrate surface.
By forming a pattern with a configuration of 0 ° or more and 70 ° or less, a synthetic resin thin film which becomes a dielectric and a metal thin film which becomes an internal electrode are adhered to the surface of the base without removing one metal mask from the base. Can be alternately formed and laminated, and as a result, a pattern forming method of a thin film multilayer capacitor can be realized in which the pattern forming process is simple, the laminated film can be easily processed, and the positional accuracy can be easily secured.
【図１】本発明の薄膜積層コンデンサのパターン形成方
法を説明するための概略断面図FIG. 1 is a schematic sectional view for explaining a pattern forming method of a thin film multilayer capacitor of the present invention.
【図２】本発明の一実施例における薄膜積層コンデンサ
のパターン形成方法を実施するために使用する装置の概
略断面図FIG. 2 is a schematic cross-sectional view of an apparatus used to carry out a pattern forming method for a thin film multilayer capacitor according to an embodiment of the present invention.
【図３】実施例、比較例における薄膜積層コンデンサの
パターンエッジ部の膜厚分布図（５点測定の平均値）FIG. 3 is a film thickness distribution diagram (average value of 5-point measurement) of a pattern edge portion of a thin film multilayer capacitor in Examples and Comparative Examples.
【図４】実施例、比較例における薄膜積層コンデンサの
誘電正接の分布図（測定素子数１００）FIG. 4 is a distribution diagram of dielectric loss tangents of thin film multilayer capacitors in Examples and Comparative Examples (100 measurement elements).
１、７ 金属マスク ２ 開口部エッジの勾配 ３ 合成樹脂薄膜 ４ 金属薄膜 ５ 金属の蒸発源の位置する角度 ６ 基体 ８ 基体ホルダー ９ 真空排気系 １０ 真空槽 １１、１４、１９ チャンバー １２、２０ 金属の蒸発源 １３、１８、２１ シャッター １５、１６ 蒸発源 １７ 蒸発源吹き出し口 1, 7 Metal mask 2 Gradient of opening edge 3 Synthetic resin thin film 4 Metal thin film 5 Angle of evaporation source of metal 6 Substrate 8 Substrate holder 9 Vacuum exhaust system 10 Vacuum tank 11, 14, 19 Chamber 12, 20 Metal Evaporation source 13, 18, 21 Shutter 15, 16 Evaporation source 17 Evaporation source outlet
───────────────────────────────────────────────────── フロントページの続き (72)発明者 小野 信一 神奈川県茅ケ崎市萩園2500番地 日本真空 技術株式会社内 (72)発明者 増田 行男 神奈川県茅ケ崎市萩園2500番地 日本真空 技術株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Shinichi Ono 2500 Hagizono, Chigasaki City, Kanagawa Japan Vacuum Technology Co., Ltd.
Claims (2)
薄膜と一端または他端に外部電極引き出し部を有する内
部電極金属薄膜を交互に形成、積層する薄膜積層コンデ
ンサの形成工程において、開口部エッジの勾配が前記基
体表面の法線方向より基体蒸着面に向って内方向に２０
゜以上７０゜以下である金属マスク１枚を用い、また誘
電体となる合成樹脂の蒸発源の位置する角度が基体表面
の法線方向であり、内部電極となる金属の蒸発源の位置
する角度が基体表面の法線方向に対し前記内部電極の外
部電極引き出し部とは逆の方向に２０゜以上７０゜以下
であることを特徴とする薄膜積層コンデンサのパターン
形成方法。1. An opening edge in a step of forming a thin film multilayer capacitor in which a synthetic resin dielectric thin film and an internal electrode metal thin film having an external electrode lead portion at one end or the other end are alternately formed and laminated on the surface of a substrate by vacuum vapor deposition. Has a gradient of 20 inward from the normal to the substrate surface toward the substrate vapor deposition surface.
The angle of the evaporation source of the synthetic resin, which is the dielectric, is the normal to the surface of the substrate, and the angle of the evaporation source of the metal, which is the internal electrode, is used. Is 20 ° or more and 70 ° or less in the direction opposite to the external electrode lead-out portion of the internal electrode with respect to the normal direction of the substrate surface.
よって形成される尿素樹脂であることを特徴とする請求
項１記載の薄膜積層コンデンサのパターン形成方法。2. The pattern forming method of a thin film multilayer capacitor according to claim 1, wherein the synthetic resin thin film serving as a dielectric is a urea resin formed by a polyaddition reaction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3338100A JPH0613258A (en) | 1991-12-20 | 1991-12-20 | Forming method for pattern of thin film laminated capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3338100A JPH0613258A (en) | 1991-12-20 | 1991-12-20 | Forming method for pattern of thin film laminated capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0613258A true JPH0613258A (en) | 1994-01-21 |
Family
ID=18314914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3338100A Pending JPH0613258A (en) | 1991-12-20 | 1991-12-20 | Forming method for pattern of thin film laminated capacitor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0613258A (en) |
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- 1991-12-20 JP JP3338100A patent/JPH0613258A/en active Pending
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