JPH06125502A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To obtain a solid-state image pickup device enabling a high speed shutter of 1/10,000(sec), etc. CONSTITUTION:A reading pulse is formed by counting the prescribed number of the number of pulse of a horizontal synchronizing signal by a timing generator 13 and electric charge stored in a CCD image sensor 5 having an electronic shutter function is read by a reading pulse. By synchronizing with the shutter control pulse from the outside, a modulation horizontal 1 synchronizing signal of high frequency is formed from an internal horizontal synchronizing signal supplied from a signal generator 10 by a modulation HD preparing circuit 12 and is supplied to a timing generator 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device suitable for use in, for example, a camera device mainly used for industrial purposes for picking up an image of an object moving at a high speed, and particularly 1/1
The present invention relates to a solid-state imaging device capable of a high-speed shutter such as ten thousand (sec).

[0002]

2. Description of the Related Art Conventionally, the applicant of the present invention has filed Japanese Patent Application No. 2-238.
In the specification and the drawings of No. 930, a solid-state imaging device having an electronic shutter function for performing exposure adjustment without using an iris mechanism by controlling a charge storage time of a field storage type solid-state imaging device (CCD image sensor) is disclosed. is suggesting.

In this solid-state image pickup device, a high level image read pulse shown in FIG. 4B is output during a vertical blanking period (VBLK) in which the vertical blanking signal shown in FIG. 4A is at a low level. , Read out the charge accumulated in the CCD image sensor. The charge storage time of the CCD image sensor is controlled by the reset pulse shown in FIG. 4C, and the CCD image sensor sweeps the stored charge to the overflow drain when the reset pulse is supplied. ing.
Therefore, while the reset pulse is being supplied (charge sweep-away period), no charge is accumulated in the CCD image sensor. Therefore, since the reset pulse supplied to the CCD image sensor is stopped, electric charges are accumulated in the CCD image sensor,
By controlling the timing of stopping the reset pulse, the charge accumulation time of the CCD image sensor,
That is, the shutter speed can be controlled.

By using such an electronic shutter function, the solid-state image pickup device can change the shutter speed according to the movement of the object, which is particularly advantageous for capturing an image in a high-speed moving object.

Here, there is known a solid-state image pickup device which is mainly used for industrial purposes and which picks up an image of a moving object. This solid-state imaging device has a configuration as shown in FIG. 5, for example, and when an object 101 moving on a moving path 100 moves in front of the imaging unit 102, the position detection unit 103 detects it. , A low-level trigger pulse shown at time t11 in FIG. 6A is supplied to the shutter pulse generation circuit 104.

The shutter pulse generating circuit 104 supplies a low level shutter pulse to the CCD control circuit 105 when the low level trigger pulse is supplied, and when the low level trigger pulse is supplied, the shutter pulse generating circuit 104 shown in FIG.
A low-level shutter pulse is supplied to the CCD control circuit 105 as shown at time t11 in (b).

The CCD control circuit 105 supplies a reset pulse for sweeping away charges accumulated in the CCD image sensor 106 while the low level shutter pulse is supplied. As a result, the CCD image sensor 106 does not capture an image while the reset pulse is being supplied. However, if the low-level trigger pulse is supplied at the same time, the reset pulse supplied to the CCD image sensor 106 is stopped after the final trigger pulse is supplied. As a result, the charge accumulation in the CCD image sensor 106 is started.

In the CCD control circuit 105, the synchronizing signal generating circuit 107 outputs the time t11 to the time t1 shown in FIG. 6 (c).
The low level vertical synchronizing signal shown in FIG. 2 and the horizontal synchronizing signal shown in FIG. When the shutter pulse is supplied, the CCD control circuit 105 shown in FIG.
Time t1 when the vertical synchronizing signal shown in (c) falls.
1, the number of pulses of the horizontal synchronizing signal shown in FIG. 3D is counted, for example, 9 and then several hundred clock pulses are counted, and then the high-level read pulse shown at time t13 in FIG. It is supplied to the CCD image sensor 106. Thus, from the time when the shutter pulse is supplied to the CCD image sensor 106 at time t11 in FIG. 6B to the time when the read pulse is supplied to the CCD image sensor 106 at time t13 in FIG. 6E. During this period, electric charges corresponding to the imaging light emitted through the imaging lens 108 are accumulated in the CCD image sensor 106, and the shutter speed is between time t11 and time t13.

The charge is read from the CCD image sensor 106 from time t11 to time t11 shown in FIG. 6 (f).
It is performed during the vertical blanking period which is between time t14.

The charges read from the CCD image sensor 106 are used as an image pickup signal in the image pickup signal processing circuit 10.
9 is supplied. The image pickup signal processing circuit 109 performs signal processing such as adding a synchronization signal to the image pickup signal and outputs the signal through the output terminal 110. This output terminal 1
The imaging signal output via 10 is supplied to, for example, the display screen of the analyzer. This makes it possible to analyze the state and the like of the object 101 when the object 101 is moved.

[0011]

Since the solid-state image pickup device for picking up an image of such a moving object is mainly used for industrial purposes, the object 101 shown in FIG. There are cases where it is desired to perform imaging with a high-speed shutter such as / 10,000 (sec).

However, in the above solid-state image pickup device, for example, the number of pulses of the horizontal synchronizing signal is counted 9 times from the falling edge of the vertical synchronizing signal, the clock pulse is counted several hundreds, and then the read pulse is supplied to the CCD image sensor. As described above, the output timing of the read pulse is fixed and set in advance based on the pixel array of the CCD image sensor used in the solid-state imaging device.

This is because the read pulse is output earlier than a predetermined timing, and the effective pixel is read out earlier, so that the reference black level is provided at the lower end of the display screen of the analyzer. This is to prevent the pixel portion (OPB) of the target black from protruding and being displayed. This is also to prevent the OPB from being displayed outside the upper end of the display screen due to the readout pulse being output later than a predetermined timing and the effective pixels being read out later.

Therefore, the shutter speed (charge accumulation time) of the solid-state image pickup device cannot be shortened to a time shorter than the time from the falling time of the vertical synchronizing signal to the time when the read pulse is output. . Therefore, the conventional solid-state image pickup device cannot take an image with a high-speed shutter of 1/10000 (sec) or the like.

The present invention has been made in view of the above problems, and an object thereof is to provide a solid-state image pickup device capable of a high-speed shutter of 1 / 10,000 (sec) or the like.

[0016]

The solid-state image pickup device according to the present invention is a read-out device for reading out the accumulated charge from the time when the supply of the reset pulse for sweeping away the charge accumulated in the solid-state image-pickup device is stopped. An electric shutter function is provided to control the charge storage time of the solid-state image sensor by controlling the timing of stopping the supply of the reset pulse, with the charge storage time being the period until the pulse is supplied to the solid-state image sensor. And the read pulse is
A solid-state imaging device for supplying a predetermined number of pulses of a horizontal synchronization signal from a time when a vertical synchronization signal is supplied to the solid-state imaging device and supplying the reset pulse when a shutter control pulse is supplied. A shutter pulse forming means for forming and outputting a shutter pulse for stopping, a synchronizing signal generating means for forming and outputting a vertical synchronizing signal and a horizontal synchronizing signal when a trigger pulse is supplied from the outside, and the shutter. When a control pulse is supplied, a modulated horizontal synchronizing signal forming means for forming and outputting a modulated horizontal synchronizing signal having a frequency higher than the horizontal synchronizing signal from the horizontal synchronizing signal from the synchronizing signal generating means, and the shutter control. Counts the modulated horizontal sync signal supplied from the modulated horizontal sync signal forming means when a pulse is supplied. The count value is to solve the above problems as the configuration and having a read-out pulse forming means for supplying the formed the solid-state imaging device of the read pulse upon reaching a predetermined number.

In the solid-state image pickup device according to the present invention, the modulated horizontal synchronizing signal forming means forms the modulated horizontal synchronizing signal by changing the frequency of the horizontal synchronizing signal according to a designated shutter speed. The above problem is solved as a configuration characterized by outputting.

[0018]

In the solid-state image pickup device according to the present invention, when the trigger pulse is supplied from the outside, the shutter pulse forming means stops the supply of the reset pulse for sweeping away the charge accumulated in the solid-state image pickup device. Is supplied to the solid-state image sensor. As a result, the solid-state imaging device starts accumulating charges.

On the other hand, the modulated horizontal synchronizing signal forming means is designed so that the shutter speed can be designated. When the shutter control pulse is supplied, the frequency of the horizontal synchronizing signal supplied from the synchronizing signal generating means is designated. The modulated horizontal synchronizing signal having a frequency higher than that of the horizontal synchronizing signal is formed by changing the shutter speed according to the shutter speed, and this is supplied to the read pulse forming means.

The read pulse forming means counts the modulated horizontal synchronizing signal supplied from the modulated horizontal synchronizing signal forming means, and when the count value reaches a predetermined number, the read pulse is supplied to the solid-state image pickup device.

As a result, the electric charge accumulated in the solid-state image pickup device from the time when the shutter pulse is supplied is read by the read pulse and output.

Since the modulated horizontal synchronizing signal supplied to the read pulse forming means is modulated to have a frequency higher than that of the horizontal synchronizing signal according to the designated shutter speed, the read pulse forming means is formed. The means is
It is possible to finish the counting of the predetermined number and supply the read pulse to the solid-state imaging device earlier than when the horizontal synchronizing signal of the normal frequency is supplied.

[0023]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the solid-state image pickup device according to the present invention will be described below with reference to the drawings.

The solid-state image pickup device according to the present invention is shown in FIG.
The configuration is as shown in. The solid-state imaging device shown in FIG. 1 detects an object 2 moving on a moving path 1 by a position detection unit 3 and picks up an image of the object 2 in synchronization with a trigger pulse obtained as a position detection signal by the position detection unit 3. The present invention is applied to an industrial solid-state image pickup device for performing the above, and includes a CCD image sensor 5 for picking up an image of an object 2 on the moving path 1 through an image pickup lens 4.

The solid-state image pickup device is based on the CCD described above.
From the time when the supply of the reset pulse for sweeping away the charges accumulated in the image sensor 5, that is, the solid-state image sensor is stopped to the time when the readout pulse for reading out the accumulated charges is supplied to the CCD image sensor 5. An electronic shutter function is provided to control the charge storage time of the CCD image sensor 5 by controlling the timing of stopping the supply of the reset pulse as the charge storage time, and the vertical synchronizing signal is supplied to the read pulse. From that time, a predetermined number of pulses of the horizontal synchronizing signal are counted and supplied to the CCD image sensor 5.

As a specific configuration, as shown in FIG. 1, an output terminal 6 for supplying a trigger pulse obtained as a position detection signal by the position detection section 3 to an external synchronization signal generator 20, and the external terminal 6 An external vertical synchronizing signal E generated in synchronization with the trigger pulse by the synchronizing signal generator 20.
XT. VD, external horizontal sync signal EXT. Input terminal 7 to which HD and shutter control pulse SCP are supplied
9 is provided.

An external vertical synchronizing signal EX generated by the external synchronizing signal generator 20 in synchronization with the trigger pulse.
T. VD and external horizontal sync signal EXT. HD is supplied to the signal generator 10 via the input terminals 7 and 8. Further, the shutter control pulse SCP generated in synchronization with the trigger pulse by the external synchronization signal generator 20 is supplied to the shutter pulse creation circuit 11 and the modulation HD creation circuit 12 via the input terminal 9. Has become.

The signal generator 10 functions as a synchronizing signal generating means in the solid-state image pickup device according to the present invention, and operates based on the clock CK ₁ (f _CK ) supplied from the timing generator 13. The external vertical synchronizing signal EXT. VD and external horizontal sync signal EXT. The phase of HD is adjusted and the internal vertical synchronizing signal INT. VD 'and internal horizontal synchronizing signal INT. Generate HD. Then, the signal generator 10 uses the internal vertical synchronization signal IN.
T. VD 'is supplied to the timing generator 13, and the internal horizontal synchronizing signal INT. HD is supplied to the modulated HD creating circuit 12, and the external horizontal synchronizing signal EXT. HD and internal horizontal synchronizing signal INT. HD is supplied to the phase comparator 14.

The shutter pulse creating circuit 11
Is a shutter pulse forming means in the solid-state imaging device according to the present invention. When the shutter control pulse SCP synchronized with the trigger pulse is supplied from the external synchronization signal generator 20, the CCD
A shutter pulse for stopping the supply of the reset pulse for sweeping away the accumulated charge of the image sensor 5 is formed,
This is supplied to the CCD drive circuit 17.

The modulated HD creating circuit 12 functions as a modulated horizontal synchronizing signal forming means in the solid-state image pickup device according to the present invention, and is a shutter synchronized with the trigger pulse from the external synchronizing signal generator 20. When the control pulse SCP is supplied, the internal horizontal synchronizing signal INT. HD from the internal horizontal synchronizing signal INT. A modulated horizontal synchronization signal INT. The HD is formed and is supplied to the timing generator 13.

Further, the phase comparator 14 includes the signal
External horizontal synchronizing signal E supplied from the generator 10
XT. HD and internal horizontal synchronizing signal EXT. Phase ratio to HD
The phase comparison output according to the phase difference.
Power is supplied as a control DC voltage via the filter (LPF) 15.
The voltage-controlled oscillator (VCO) 16 is supplied. And above
The VCO 16 is a control DC voltage from the LPF 15.
In response to the
Clock pulse that is supplied to the digital generator 10.
CK₁(F_CK), Which has, for example, twice the frequency
Clock pulse CK ₂(2f_CK) Is formed, and this is
It is supplied to the ming generator 13.

Further, the timing generator 13
Is a clock pulse CK supplied from the VCO 16
₂ (2f _CK ) to supply the clock pulse CK ₁ (f _CK ) to the signal generator 10 and to supply the internal vertical synchronizing signal INT. VD 'and the modulated horizontal synchronizing signal MOD. Readout pulse XV1 for reading out charges accumulated in the CCD image sensor 5 according to HD.
~ XV4, XSG1, XSG2, H1, H2, PG, etc. are output. Here, this timing generator 13
Which functions as a read pulse forming means in the solid-state image pickup device according to the present invention. The internal vertical synchronizing signal INT. From the leading edge of VD ', the modulated horizontal synchronizing signal MOD. After counting 9 HD, clock pulse CK
₂ (2f _CK ) is counted several hundreds to form a read pulse (sensor gate pulse XSG ₁ , XSG ₂ ).

Then, the CCD drive circuit 17 stops the supply of the reset pulse for sweeping away the accumulated charge of the CCD image sensor 5 by the shutter pulse from the shutter pulse generation circuit 11, and supplies the reset pulse. The timing of the sensor gate pulses XSG ₁ and XSG ₂ is read out to the vertical transfer section and the image pickup charge of each pixel according to the light amount of the image pickup light generated during the stopped effective charge accumulation period is read out through the horizontal transfer section. The CCD image sensor 5 is driven according to the read pulse from the timing generator 13 so that the CCD image sensor 5 outputs the signals sequentially.

The image pickup signal which is the electric charge read from the CCD image sensor 5 is subjected to signal processing such as adding a synchronizing signal by the image pickup signal processing circuit 18, and is output through an output terminal 19 for image analysis, for example. It is designed to be supplied to analyzers, etc.

Here, the modulation HD creation circuit 12 is an example.
For example, it is configured as shown in FIG. The modulation shown in this FIG.
The HD creation circuit 12 uses the external sync signal generator 20.
Shutter control pulse SCP of input terminal 21
Reset pulse generator 22 supplied via
Reset pulse P generated by the set pulse generator 22
_RESETOscillator 23, first and second reset by
N-ary counters 24, 25, first and second D-type flip
Oscillation output from the flip-flops 26, 27 and the oscillator 23
And latch output by the first D-type flip-flop 26
The NAND gate circuit 28 to which power is supplied,
Switching control by latch output of D-type flip-flop 27
And a changeover switch 29 that is
Internal water supplied from the generator 10 via the input terminal 30
Flat sync signal INT. HD and the NAND gate circuit 28
And the gate output signal of
As a result, the modulated horizontal synchronization signal MOD. Generate HD,
Modulated horizontal synchronization signal MOD. Output HD from output terminal 31
I am trying to help.

In the modulated HD creating circuit 12, the reset pulse generator 22 generates a reset pulse P _RESET synchronized with the shutter control pulse SCP supplied through the input terminal 21, and the reset pulse P _RESET causes the reset pulse P _RESET to be generated. The oscillator 23, the first and second N
The advance counters 24 and 25 and the first and second D-type flip-flops 26 and 27 are reset.

Further, the oscillator 23 is reset by the reset pulse P _RESET , and the internal horizontal synchronizing signal INT. A pulse generator that oscillates at a frequency fx higher than HD, wherein the pulse P (f
x) is supplied to the clock terminal of the first N-ary counter 24 and also to the NAND gate circuit 28. Further, the oscillator 23 can variably control the oscillation frequency fx.

The first N-ary counter 24 is, for example, a 9-ary counter which is reset by the reset pulse P _RESET and counts the pulse P (fx) from the oscillator 23. The pulse P (fx) The carry output is supplied to the clock terminal of the first D-type flip-flop 26 every 9 times. In addition, the first D
The flip-flop 26 has the reset pulse P
It is reset by _RESET and latches the logic "L" of the data terminal by using the carry output of the first N-ary counter 24 as a clock, so that the first N is reset by the reset pulse P _RESET. The latch output which becomes logical "H" during the period T _A until the advance counter 24 counts the pulse P (fx) 9 times is N
It is supplied to the AND gate circuit 28. And the above NAN
The D-gate circuit 28 uses the latch output of the first D-type flip-flop 26 as a gate control signal to output the oscillator 2
By gating the pulse P (fx) from No. 3, the pulse P (fx) is output as the gate output signal only during the period T _A.

Further, the second N-ary counter 25 is
Internal horizontal sync signal IN from signal generator 10
T. The HD is supplied to the clock terminal via the input terminal 30.
It is being paid. This second N-ary counter 2
5 is the reset pulse P _RESETReset by
The internal horizontal synchronizing signal INT. Count HD
A 9-ary counter, which has the internal horizontal synchronizing signal INT.
Each time the HD is counted, the carry output is set to the second D
To the clock terminal of the flip-flop 27. So
Then, the second D-type flip-flop 27 is
Set pulse P _RESETReset by the second
The carry output of the N-ary counter 25 of
By latching the logic "L" of the data terminal,
Reset pulse P_RESETAfter being reset by
The second N-ary counter 25 uses the internal horizontal synchronizing signal IN.
T. Period T until counting 9 HD_BLogical "H"
The latch output that becomes
It is supplied to Chi 29.

The changeover switch 29 is normally controlled by the latch output of the second D-type flip-flop 27 so that the signal generator 1 is normally operated.
0 from the internal horizontal synchronizing signal INT. HD is selected, and the gate output signal of the NAND gate circuit 28 is selected during the period T _B. Thus, 9 shots internal horizontal synchronizing signal INT during the period T _B. HD the above-mentioned period T _A 9-shot pulse P (f
x), which is the modulated horizontal synchronization signal MOD. HD to generate the modulated horizontal synchronizing signal MOD. HD output terminal 3
Output from 1.

In the solid-state image pickup device having the modulation HD creating circuit 12 having such a structure, the position detecting section 3 detects that the object 2 moving on the moving path 1 is located in front of the CCD image sensor 5. External vertical synchronizing signal EXT. VD, external horizontal sync signal EXT. When the HD and the shutter control pulse SCP are supplied from the synchronization signal generator 20, the image pickup operation shown in the timing chart of FIG. 3 is performed, and the CCD image sensor 5 moves the object on the moving path 1 at high speed. 2 is imaged.

That is, the CCD image sensor 5
Is an internal vertical synchronization signal INT. VD 'and internal horizontal sync signal I
NT. The timing generator 13 is synchronized with HD.
The CC that operates according to the read pulse generated in
Is driven by the D drive circuit 17, the edge timing t _a from the read pulse (sensor gate pulse X after the shutter pulse synchronized with the shutter control pulse SCP
The image pickup operation by the high-speed shutter is performed with the effective charge accumulation period T _A up to the leading edge timing t _b of SG ₁ and XSG ₂ ).

As a result, the image of the object 2 moving on the moving path 1 is displayed on the monitor device, and the object can be analyzed.

Therefore, in response to the trigger pulse, the internal vertical synchronizing signal INT. Even if VD 'is generated in any phase, the internal vertical synchronizing signal INT. From the falling edge of VD ', the modulated horizontal synchronizing signal MOD. The period until the HD count starts is constant, and even if the trigger pulse is generated at random timing, the exposure time, that is, the effective charge accumulation period T _A can be constant, and a uniform image can be displayed on the monitor. Can be displayed on the device.

The modulated horizontal synchronizing signal MOD. HD
By providing an interval of 1H or more before and after the timing at which is output, the read pulse is output earlier than a predetermined timing, and the effective pixels are read earlier, which is caused at the lower end of the display screen of the analyzer. It is possible to prevent the optical black pixel portion (OPB) provided for obtaining the reference black level from being displayed outside, and the read pulse is output later than a predetermined timing, which is effective. It is possible to prevent the OPB from being displayed outside the upper end of the display screen due to the pixels being read out late.

The modulated horizontal synchronizing signal MOD. HD
Is the internal horizontal sync signal IN of the normal frequency as described above.
T. Since the frequency fx is higher than HD, the internal horizontal synchronizing signal INT. The count can be finished earlier than when the HD is counted by the timing generator 13, the read pulse can be output earlier by that amount, and a high-speed shutter can be realized.

That is, the timing generator 1
3, the internal vertical synchronizing signal INT. From the leading edge of VD ', the internal horizontal synchronizing signal INT. After counting 9 HD, count several hundreds of clock pulses CK ₂ (2f _CK ) and read out pulses (sensor gate pulses XSG ₁ , XS).
When G ₂ ) is formed, the effective charge storage period of the CCD image sensor 5 becomes Tc ′ (about 9H) shown in FIG.

Further, in the modulation HD creation circuit 12, the oscillation frequency fx of the oscillator 23 is changed to change the modulation horizontal synchronization signal MOD. _A desired shutter speed can be achieved by varying the frequency of the HD during the period T _A.

Therefore, an image of an object moving at high speed can be clearly and easily captured, which contributes to industrial use and the like.

Then, the solid-state image pickup device according to the related art has the above-mentioned conventional solid-state image pickup device having the above-mentioned timing generator 11 which outputs a read pulse by counting several hundreds of clock pulses after counting 9 horizontal synchronizing signals. Since only the HD creation circuit 12 is provided, changes in the conventional circuit configuration can be minimized.

The technical idea of the present invention is that the electronic shutter function is provided, and in a solid-state image pickup device which picks up an image in synchronization with a trigger pulse which is randomly supplied, a predetermined number of horizontal synchronizing signals are counted. The timing generator that outputs a read pulse is supplied with a modulated horizontal synchronizing signal having a frequency higher than the horizontal synchronizing signal having the normal frequency, instead of the horizontal synchronizing signal having the normal frequency. Is completed in a short time to achieve a high-speed shutter.

The technical idea is to control the shutter speed by controlling the frequency of the modulated horizontal synchronizing signal. Therefore, the circuit configuration is not limited to those shown in the above-described embodiments, and various modifications can be made without departing from the technical idea described above.

[0053]

The solid-state image pickup device according to the present invention supplies to the read pulse forming means a modulated horizontal synchronizing signal which is modulated so as to have a frequency higher than a normal horizontal synchronizing signal according to a designated shutter speed. Thus, the counting time of the number of pulses performed by the read pulse forming means is
It is possible to shorten the counting time of the number of pulses of the horizontal synchronizing signal of the normal frequency, and to accelerate the timing of supplying the read pulse to the solid-state imaging device.

Therefore, the charge accumulation time of the solid-state image pickup device, that is, the shutter speed can be shortened, and a high-speed shutter such as 1 / 10,000 (sec) can be realized.

Further, since the high-speed shutter can be enabled, an object moving at high speed can be clearly and easily imaged, which contributes to industrial use and the like.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment when the solid-state imaging device according to the present invention is applied to an industrial solid-state imaging device that performs imaging in synchronization with a trigger pulse supplied at random timing.

FIG. 2 is a circuit diagram showing a specific configuration of a modulation HD creation circuit provided in the solid-state imaging device of the above embodiment.

FIG. 3 is a time chart for explaining the operation of the solid-state imaging device of the above embodiment.

FIG. 4 is a time chart for explaining the operation of a conventional solid-state imaging device having an electronic shutter function.

FIG. 5 is a block diagram of a conventional industrial solid-state imaging device that performs imaging in synchronization with a trigger pulse supplied at random timing.

FIG. 6 is a time chart for explaining the operation of the conventional industrial solid-state imaging device.

[Explanation of symbols]

1 ... Movement 2 ... Object 3 ... .... Position detection unit 5 ... CCD image sensor 10 ... Signal generator 11 ...・ ・ ・ ・ ・ ・ ・ ・ Shutter pulse creation circuit 12 ・ ・ ・ ・ ・ Modulation HD creation circuit 13・ ・ ・ ・ ・ Timing generator 17 ・ ・ ・ ・ ・ CCD drive circuit 18 ・ ・ ・ ・ ・ Imaging signal processing circuit 20 ・・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ External synchronization signal generator

Claims (2)

[Claims] 1. From the time when the supply of a reset pulse for sweeping away the charges accumulated in the solid-state image sensor is stopped,
The charge storage time of the solid-state image sensor is controlled by controlling the timing at which the supply of the reset pulse is stopped until the read pulse for reading the accumulated charge is supplied to the solid-state image sensor. An electronic shutter function for controlling is provided, and the read pulse is a solid-state imaging device that counts a predetermined number of pulses of a horizontal synchronization signal from the time when a vertical synchronization signal is supplied and supplies the pulses to the solid-state imaging device. A shutter pulse forming means for forming and outputting a shutter pulse for stopping the supply of the reset pulse when the shutter control pulse is supplied; and a vertical synchronizing signal and a horizontal synchronizing signal when the shutter control pulse is supplied. The shutter control pulse is used together with a synchronizing signal generating means for forming and outputting a signal. Then, from the horizontal synchronizing signal from the synchronizing signal generating means, a modulated horizontal synchronizing signal forming means for forming and outputting a modulated horizontal synchronizing signal having a frequency higher than the horizontal synchronizing signal, and the modulated horizontal synchronizing signal forming means. And a read pulse forming means for counting the modulated horizontal synchronizing signal supplied from the device, forming the read pulse when the count value reaches a predetermined number, and supplying the read pulse to the solid-state image sensor. . 2. The modulated horizontal synchronizing signal forming means changes the frequency of the horizontal synchronizing signal according to a designated shutter speed to form and output the modulated horizontal synchronizing signal. 1. The solid-state imaging device according to 1.