JPH0612035A - Display device - Google Patents

Abstract

PURPOSE:To provide an active matrix type liquid crystal display device by using a signal line inversion driving method useful for the prevention of the lowering of display quality by a pixel electrode and the capacitance crosstalk of a signal line and capable of decreasing the source voltage of a driving IC. CONSTITUTION:A source potential control part 2 which shifts the first source potential (VDD) and second source potential (VSS) of a signal line driving circuit 1 by constant values, respectively corresponding to a signal voltage to be written on the pixel electrode is provided on the active matrix type liquid crystal display device provided with plural pixel electrodes arranged on a glass substrate in two-dimensional fashion, signal lines D arranged between those pixel electrodes, gate lines G arranged between those pixel electrodes, a signal driving IC part 1 which applies the signal voltage to the signal line D, and a gate line driving IC part 4 which drives a switching element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type display device, and more particularly to a display device with improved signal line driving means.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device has been attracting attention as a device capable of inexpensively realizing a flat panel display device having a display quality comparable to that of a CRT, a high definition projection type TV and the like. This liquid crystal display device is provided with hundreds to thousands of signal lines and gate lines formed on a matrix substrate and a drive circuit unit for driving these.

In the signal line drive circuit section, an integrated circuit (IC) of a medium breakdown voltage process of 12 V or more is generally used because of the voltage applied to the liquid crystal and the driving method. The absolute value of the voltage applied to the liquid crystal may be 5V, but since it is necessary to drive the liquid crystal with an alternating current, for example, the counter electrode is set to a potential of about 7V and the signal line is driven at 2 to 12V (7V ± 5V). This is because.

In recent years, it has been desired to use an IC with a low power supply process such as a 5V system capable of speeding up a driving frequency due to high definition and a large number of pixels, lowering the cost of a driving IC and a liquid crystal display device, and downsizing. It is rare. As a driving method for using a 5V IC, a method called “common inversion driving”, which shakes the counter electrode in accordance with the polarity of the voltage written in the liquid crystal, has been proposed. On the other hand, the gap between the pixel electrode and the signal line becomes narrower as the definition becomes higher, but in order to prevent the deterioration of the display quality such as the brightness difference between the upper part and the lower part of the screen due to the capacitance crosstalk between the both, which is increased, "Signal line inversion drive"
There is also proposed a method of driving adjacent signal lines so as to have opposite polarities.

However, the common inversion driving method in which the opposite electrodes have the same polarity in the gate line direction cannot be used at the same time as the signal line inversion driving method in which the polarities of the adjacent signal lines are inverted, and a high quality image is maintained. 5V low breakdown voltage drive IC
Was difficult to use.

[0006]

As described above, it is conventionally necessary to prevent the deterioration of the display quality due to the capacitive crosstalk between the pixel electrode and the signal line, which increases with the increase in the definition, and to reduce the power supply voltage of the driving IC at the same time. It was difficult.

The present invention has been made in consideration of the above circumstances, and an object thereof is signal line inversion driving useful for preventing deterioration of display quality due to capacitive crosstalk between pixel electrodes and signal lines. Another object of the present invention is to provide a display device using the method and capable of reducing the power supply voltage of the driving IC.

[0008]

SUMMARY OF THE INVENTION The essence of the present invention is to shift the power supply potential applied to the drive circuit section (signal line drive circuit section) in order to reduce the power supply voltage.

That is, according to the present invention, a plurality of pixel electrodes arranged on a substrate, signal lines respectively arranged between these pixel electrodes, gate lines respectively arranged between the pixel electrodes, pixel electrodes and signals. In a display device of active matrix type, which includes switching elements respectively arranged between the lines, a signal line drive circuit section for applying a signal voltage to the signal line, and a gate line drive circuit section for driving the switching elements, Depending on the signal voltage to be written to the pixel electrode,
A power supply potential control means for shifting the first power supply potential (VDD) and the second power supply potential (VSS) of the signal line drive circuit section by a constant value is provided. Also,
Preferred embodiments of the present invention include the following. (1) The power supply potential of the signal line driver circuit unit is shifted for each frame or each field. (2) Drive the signal lines so that the adjacent lines have opposite polarities, and shift the power supply potential of the signal line drive circuit unit in synchronization with the polarity inversion. (3) Connect the signal lines by alternately allocating to different signal line drive circuit sections. (4) Before shifting the power supply potential, write the shifted potential in the signal line in advance. (5) The power supply potential is shifted after the voltage applied to the signal line drive circuit unit is made equal to or less than the potential difference between the first and second power supply potentials. (6) The signal potential control means for shifting the potential of the signal input to the signal line driver circuit portion is provided within the range of the power potential shifted by the power potential control means.

(7) The input / output logic of the signal potential control means and the signal potential control means for shifting the potential of the signal input to the signal line drive circuit unit within the range of the power supply potential shifted by the power supply potential control means are the same. The means to make it provided.

[0011]

According to the present invention, the difference between the first power source potential (VDD) and the second power source potential (VSS) of the signal line driving circuit section is substantially applied to the driving IC (signal line driving circuit section). Although it becomes the power supply voltage, it is possible to output a potential amplitude equal to or higher than the withstand voltage of the power supply voltage of the driving IC by shifting both of them while keeping the power supply voltage constant. By connecting the signal lines to different ICs adjacent to each other, the power supply potentials of the respective ICs can be shifted to have opposite polarities in synchronization with the polarity reversal of the signal lines.
It is possible to reduce the power supply voltage of the driving IC while using the signal line inversion driving method.

Further, by adding means for writing the potential after shifting to the signal line in advance and means for shifting the applied voltage to the driving IC to (VDD-VSS) or less, malfunction and destruction of the driving IC can be prevented. Can be prevented.

[0013]

The details of the present invention will be described below with reference to the illustrated embodiments.

FIG. 1 is a block diagram showing a circuit configuration of an active matrix type liquid crystal display device according to a first embodiment of the present invention. This liquid crystal display device has a signal line drive I
C section 1 (1 ₁ to 1 _n ) and control circuit section 2, matrix substrate section 3 of liquid crystal display device, gate line driving IC section 4 (4 ₁ to
4 _l ).

The matrix substrate portion 3 is arranged in two dimensions on a glass substrate (not shown), pixel electrodes (not shown), signal lines D arranged between the pixel electrodes, and pixel electrodes arranged between the pixel electrodes. The gate line G is formed. In addition, the signal line driving IC unit 1 is, for example, as shown in FIG.
This is a well-known circuit configuration including a sampling pulse generation circuit, a sample hold circuit, an output circuit, etc. (Nikkei BP
Company publication: Flat panel display 91). In the figure, 11 is a multiplexer, 12 is a level shifter, 13 is an analog switch, 14 is an operational amplifier, CSPL is a sampling capacitor, and CH is a hold capacitor.

In the case of this figure, a conventional medium-high withstand voltage process IC has been described for convenience, but when the driving method of the present invention is used, all internal circuits can be of 5V system. At the same time, the level shifter 12 can be omitted.

Signal lines D1 to Dm of the matrix substrate section 3
Among them, the odd-numbered ones are the upper signal line drive IC sections 1 ₁ to 1
_n-1, even-numbered are connected to 1 ₂ to 1 _n the bottom of the signal line driving IC unit. Signal line driver IC section 1 ₁ to 1 _n-1
Power supply (VDD, VSS) and various signals (Sig, CONT, CLK, Di
n) are collectively connected to the control circuit unit 2.
Signal line driving IC unit 1 ₂ to 1 _n of lower, although not shown in the figure, are connected to the control circuit section 2 '(not shown) in the similar to the upper collectively. The gate lines G1 ～Gk matrix substrate portion 3 is connected to the gate line driving IC unit 4 ₁ to 4 _l.

As a concrete liquid crystal display device, XGA compatible one has 1024 signal lines and 768 gate lines.
The drive ICs with 56 outputs are 4 and 3, respectively. In the case of HDTV-compatible ones, if the number of signal lines is 1920 and the number of gate lines is 1024, the number of drive ICs with 256 outputs is 8 and 4, respectively.

The control circuit units 2 and 2'use the signal line drive IC by the power supply potential switching signal (H / L) for each frame.
Part 1 power supply (VDD, VSS), various signals (Sig, CONT, CLK, D)
in) level is switched. Furthermore, the control circuit unit 2,
2 ', the power supply potential switching signal (H) is set so that the polarities of the levels switched between the upper 2 and the lower 2'are opposite to each other.
The logic of / L) is inverted.

The levels of the power supply (VDD, VSS) and the image display signal (Sig) of the drive IC section 1 are selected by analog switch elements 21, 22, 23 such as MOS transistors. In particular, the image display signal Sig is the analog switch 23.
The signal is directly or through the inverting amplifier 24 (reference potential is, for example, 7 V) is selected by switching. The other various signals (CONT, CLK, Din) are level-shifted by the level shifter 25 to the range of the power supply potential of the drive IC unit 1.
The specific configuration of the level shifter 25 is as shown in FIG. 3, and such a circuit is provided for each signal.

In such a configuration, a positive voltage is written in the liquid crystal in odd frames and a negative voltage is written in the liquid crystal in even frames. In this case, in odd frames, VDD = VDD1 and VSS = VSS1 and the image display signal Sig is supplied to the drive IC section 1 as it is. In an even frame, VDD = VDD2 and VSS = VSS2, and the image display signal Sig is inverted and supplied to the drive IC unit 1.

Here, VDD1 = 12V, VDD2 = 7V, VSS1 =
7V and VSS2 = 2V. Then, as shown in FIG.
In the odd-numbered frame, the power supply potential of the upper driving IC unit 1 is V
Since DD = 12V and VSS = 7V, the signal voltage VSig
Is in the range of 7 to 12V. VDD = 7 in even frames
Since V and VSS = 2V, the signal voltage VSig is 2 to
It becomes 7V. That is, the signal line D can be driven at 7V ± 5V. In this case, the power supply voltage of the drive IC unit 1 is VDD1-VSS1 = 5V in odd frames and VDD2-VSS2 = 5V in even frames, which is lower than the power supply voltage 12V conventionally required.

As described above, the power supply potential of the drive IC unit 1 is such that when a positive voltage is written in the liquid crystal (VSig> counter electrode potential 7).
V) is VDD = VDD1 = 12V, VSS = VSS1 = 7V, and when a negative voltage is written in the liquid crystal (VSig <opposite electrode potential 7
V) may be VDD = VDD2 = 7V and VSS = VSS2 = 2V. In both cases, the power supply voltage of the drive IC unit 1 (VDD-VS
It can be seen that S) can be as low as 5V.

At the moment when the polarity of the level is inverted, a potential exceeding the power supply potential range of the drive IC section 1 is applied to the output terminal of the IC due to the electric charge charged in the wiring capacitance of the signal line D, which causes latch-up or the like. Therefore, it is desirable to incorporate an overvoltage protection circuit (which may be a general one using a diode and a resistor) in the output terminal of the IC because it may cause abnormal operation.

As described above, according to the present embodiment, the power supply potential (VDD, VSS) of the drive IC section 1 is changed according to the write signal potential.
Is shifted, it is possible to output a potential amplitude that is equal to or higher than the withstand voltage of the power supply voltage of the drive IC section 1. further,
By connecting the signal lines D to different drive IC sections 1 adjacent to each other, the power supply potentials of the respective ICs can be shifted to have opposite polarities in synchronization with the polarity reversal of the signal lines D. The power supply voltage of the driving IC unit 1 can be reduced while using the driving method. Specifically, since an IC with a low power supply process of 5V system can be used, it becomes possible to speed up the drive frequency due to high definition and a large number of pixels, and to reduce the cost and size of the IC and the liquid crystal display device. It was Furthermore, since the signal line inversion drive can be performed, it is possible to prevent deterioration of display quality due to capacitive crosstalk between the pixel electrode and the signal line D, which increases with higher definition, and display high-quality image.

The present invention is not limited to the above embodiment. In the embodiment, the power supply potential (VDD, VSS) of the signal line drive circuit unit is shifted for each frame, but it may be shifted for each field. Further, in the embodiment, the analog switch is used for shifting the power supply potential, but a driving amplifier may be used. Furthermore, the configuration of the drive circuit unit can be appropriately changed according to the specifications. Also,
The present invention can also be applied to a display device other than liquid crystal, for example, an electrostatic printer or the like that can display an image on the screen by changing the amount of toner adsorbed according to the pixel potential. In addition, various modifications can be made without departing from the scope of the present invention.

Next, a second embodiment of the present invention will be described. FIG. 5 is a block diagram showing a circuit configuration of the active matrix type liquid crystal display device according to the present embodiment.
The same parts as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

This embodiment is an improvement of the control circuit section, which is particularly useful when driving a liquid crystal using a digital drive IC. In the case of the analog type drive IC,
It can be applied to the digital control signal. The basic configuration of the entire device is the same as that of FIG. 1, but in the present embodiment, switching of the power supply potential is performed by means other than the control circuit unit 2.
In the control circuit unit 2, various signals (Sig, CONT, CLK,
Din) is being switched. As described above, the power supply potential of the control circuit unit 2 changes to VDD1 to VSS1 or VDD2 to VSS2 for each frame, and the polarity of the power supply potential supplied to the control circuit unit 2 is inverted. Various signals are control circuit 2
And is shifted to the range of the power supply potential of the driving IC.

FIG. 6 shows a concrete configuration example of the control circuit section 2. The control circuit unit 2 includes a capacitor 31, a buffer amplifier 32, and a feedback resistor 33.
The feedback resistor 33 is connected to the input / output terminal of the buffer amplifier 32, and the feedback resistor 33 and the buffer amplifier 32 form a positive feedback amplifier. The buffer amplifier 32 has VDD1 to V for each field or frame.
The power of SS1 or VDD2 to VSS2 is supplied. With respect to the signal input to the control circuit unit 2, only the edge portion of the signal is reproduced by the differentiating circuit of the capacitor 31 and the feedback resistor 33. The buffer amplifier 32 outputs the L level (VSS1 or VSS2) or the H level (VDD1 or VDD2) depending on the threshold level ((VDD + VSS) / 2 level in the case of CMOS-IC). Since positive feedback is applied by the feedback resistor 33, the buffer amplifier 3
The input of 2 stabilizes at the same level as the output.

As can be understood from the above description, this embodiment is intended for binary digital signals of VDD and VSS. Therefore, it is effective for digital video signals and control signals for the signal line drive circuit. In the above example, the positive feedback amplifier is CM
Although it is composed of an OS buffer and a resistor, the inverter may have two stages. Further, the positive feedback amplifier can be changed appropriately.

When a signal does not come periodically (only a DC component) like an image signal, the logic of input and output may not match immediately after power is turned on. Therefore, a means for forcibly matching the logic is required.

Another example of the control circuit section 2 devised in this respect is shown in FIG. In this example, the exclusive OR circuit 34 is inserted in the preceding stage of the circuit of FIG. Exclusive OR circuit 34
The power supply of can be set regardless of the value of the power supply potential of the positive feedback amplifier. In FIG. 7, VD = 5V and VS = 0V are set. Further, the reset signal SRST of the exclusive OR 34 is
It is set to H level only during a predetermined period of the blanking period.

The relationships among various signals, reset signals, and control circuit output signals are shown in FIGS. As shown in FIG. 8A, when the logics of the various signals and the control circuit output signal match before the reset signal is input, inverted signals of the various signals are output only during the H period of the reset signal. On the other hand, as shown in FIG. 8B, when the logics of the input / output signals do not match, the output does not change at the rising edge of the reset signal and the input / output logics are forced to match at the falling edge. Let Therefore, by adding the reset signal, the input and output logics of the control circuit unit 2 can be made to always coincide with each other and a correct signal can be output.

Next, a third embodiment of the present invention will be described. In the above-described embodiment, the power supply potential supplied to the drive IC is shifted for each frame (or field). On the other hand, the signal line keeps the potential of the previous frame (or field). In some cases, the range of the power supply potential is exceeded and the drive IC may be destroyed. Further, depending on the switching timing of VDD and VSS, a voltage higher than the withstand voltage may be temporarily applied to the drive IC. Therefore, in this embodiment, in order to prevent the above-mentioned latch-up, the power supply potential shift sequence is devised, and as a result, malfunction and destruction of the drive IC are prevented.

As the latch-up due to the power supply potential shift, a potential difference between the power supply potential supplied to the drive IC and the potential held in the signal line, or a voltage higher than the withstand voltage of the drive IC may be temporarily applied during the shift. To be These cause malfunction and destruction of the drive IC. In order to prevent this, in the present embodiment, the first power supply potential VDD1 of the drive IC is
To VDD2 and the second power supply potential VSS1 to VSS2, (1) the shifted power supply potential (VDD2 to V
Drive I to write the potential in the range of SS2) to the signal line in advance
C control means, (2) The power supply voltage applied to the drive IC is
Potential difference between the second power supply potential and the second power supply potential (VDD1-VSS
1) After the following, the power supply potential supply means for shifting the power supply potential is provided.

FIG. 9 is a block diagram showing the circuit configuration of an active matrix type liquid crystal display device according to the third embodiment. The same parts as those in FIG. 1 are designated by the same reference numerals, and detailed description thereof will be omitted.

The basic structure of the entire apparatus is the same as that shown in FIG. 1, but in the present embodiment, the switching of the power supply potential is performed by means other than the control circuit section 2, and the control circuit section 2 uses various signals (Sig, C).
ONT, CLK, and Din) are switched (potential shift). Further, in this embodiment, the signal line potential control circuit 26 and the changeover switch 27 are provided on the input side of the control circuit unit 2.

The signal line potential control circuit 26 receives various control signals (CONTT, CLK, Din) and a white image signal Sig-w (normally white) in any one line period in the vertical blanking period by the blanking signal VBLNK. Output). A signal from the control circuit 26 is output to the drive IC section 1 by the changeover switch 27 during the vertical blanking period. By the signal line potential control circuit 26 and the changeover switch 27, the potential of the white image is written in the signal line D during the vertical period. The electric potential of the white image signal is equal to the electric potential of the counter electrode, but the electric potential of 7 V of the counter electrode is supplied as VSS in odd frames and VDD in even frames. Therefore, if the white image signal, that is, the counter electrode potential 7V is written in the signal line before the power source potential is shifted, the drive IC unit 1 can be always prevented from being destroyed.
This operation is performed only for the signal line driving IC unit 1. Since the control signal is not input to the gate line signal driving IC unit 4, the signal line D
No image is displayed, only the white image signal potential is written to.

The power supply potentials VDD1 to VSS1 of the drive IC
When VDD and VSS2 do not have a common potential, the power supply potential can be shifted several times. Even if the signal line is connected to VDD or VSS before shifting the power supply potential, the same effect can be obtained.

As another method, the switching timing of VDD and VSS in the power supply circuit may be controlled as follows. FIG. 10 shows an example of such a power supply circuit. SW3 and SW4 correspond to the switches 21 and 22 and are used to switch between VDD and VSS, respectively. SW1 controls switching between VDD1 and VSS1. Normally, the potential shown is selected. SW2 is VDD
Controls switching between 2 and VSS2. Normally, the potential shown is selected.

Now, in the state of FIG. 10, VDD is VDD2, VSS
Assume that VSS2 is selected. From this state, S
Immediately before switching the power supply potential by switching W3 and SW4,
Immediately after that, by switching SW1 and SW2,
As shown in 1, VDD is VDD2 → VSS1 → VDD1, VSS
Becomes VSS2 → VDD2 → VSS1 → VSS1. At this time,
The potential difference between VDD and VSS is VDD2-VSS2, VSS1-V in order.
It becomes SS1, VDD1-VSS1, and the photovoltage above the withstand voltage is not applied to the drive IC. From the state of VDD1 and VSS1 to V
The same applies when switching to the DD2 and VSS2 states.

As described above, according to the present embodiment, the potential within the range of the shifted power source potential is written in the signal line in advance, or the power source voltage applied to the driving IC is set to the first power source potential and the second power source potential.
By shifting the power supply potential after the potential difference of the power supply potential is less than or equal to, it is possible to prevent malfunction and destruction of the drive IC.

[0043]

As described in detail above, according to the present invention, the first power supply potential (VDD) and the second power supply potential (V) of the signal line drive circuit section are changed according to the signal voltage to be written in the pixel electrode.
By providing a power supply potential control means for shifting SS) by a constant value, a signal line inversion drive method useful for preventing deterioration of display quality due to capacitive crosstalk between the pixel electrode and the signal line is used. It becomes possible to realize a liquid crystal display device that can reduce the power supply voltage of the IC.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of a liquid crystal display device according to a first embodiment.

FIG. 2 is a circuit diagram showing a specific configuration of a drive IC.

FIG. 3 is a circuit diagram showing a specific configuration of a level shifter.

FIG. 4 is a signal waveform diagram for explaining the operation of the embodiment.

FIG. 5 is a block diagram showing a circuit configuration of a liquid crystal display device according to a second embodiment.

FIG. 6 is a diagram showing a specific configuration of a control circuit unit used in the second embodiment.

FIG. 7 is a diagram showing a specific configuration of a control circuit unit used in the second embodiment.

FIG. 8 is a diagram showing a relationship between various signals, a reset signal, and a control circuit section output signal.

FIG. 9 is a block diagram showing a circuit configuration of a liquid crystal display device according to a third embodiment.

FIG. 10 is a diagram showing an example of a power supply circuit used in the third embodiment.

FIG. 11 is a diagram showing changes in power supply potential.

[Explanation of symbols]

1 (1 ₁ to 1 _n ) ... Signal line driving IC unit, 2 ... Control circuit unit, 3 ... Matrix substrate of liquid crystal display device, 4 (4 ₁ to 4 _l ) ... Gate line driving IC unit, 21 to 23 ... Analog Switch element, 24 ... Inversion amplifier circuit, 25 ... Level shifter, D (D1 to Dm) ... Signal line of matrix substrate section, G (G1 to Gk) ... Gate line of matrix substrate section.

Claims (2)

[Claims] 1. A plurality of pixel electrodes arranged on a substrate, signal lines respectively arranged between the pixel electrodes, gate lines respectively arranged between the pixel electrodes, the pixel electrodes and the signal lines. A switching element that is arranged between the switching element and the gate line, is turned on and off by the gate line, a signal line drive circuit section that applies a signal voltage to the signal line, a gate line drive circuit section that drives the switching element, and An active matrix type comprising: a power supply potential control unit that shifts each of the first and second power supply potentials of the signal line drive circuit unit by a constant value according to a signal voltage to be written in the pixel electrode. Display device. 2. A plurality of pixel electrodes arranged on a substrate, signal lines respectively arranged between the pixel electrodes, gate lines respectively arranged between the pixel electrodes, the pixel electrodes and the signal lines. A switching element that is arranged between the switching element and the gate line, is turned on and off by the gate line, a signal line drive circuit section that applies a signal voltage to the signal line, a gate line drive circuit section that drives the switching element, and Power supply potential control means for shifting each of the first and second power supply potentials of the signal line drive circuit unit by a constant value according to the signal voltage to be written to the pixel electrode, and the potential after the shift before the power supply potential is shifted. Is previously written in the signal line, and an active matrix type display device is provided.