JPH06119085A - Automatic setup system for information processing system - Google Patents

Abstract

PURPOSE:To execute a processing without affecting a conventional architecture by using no CPU for the processing of resetting a system to be in a specified state in the computer system. CONSTITUTION:A control mechanism 1 monitoring the operation of CPU 11 detects the execution cycle of CPU 11, which is necessary for the reset of the system and the processing content storage mechanism 3 of CPU 11 stores/holds it. In the case of resetting the system, after the control mechanism 1 is started first to mediate a system bus, a bus cycle generation circuit 4 is started to reset the system to be in the state of being held by the processing content storage mechanism.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic setup mechanism for an information processing system, and more particularly to a mechanism for controlling hardware when the system state is returned to a specific state before the power is turned off.

[0002]

2. Description of the Related Art Conventionally, in setting up this kind of information processing system, a control program causes a CPU to read data from a mechanism holding system information and reset the read information at a designated location. In order to prevent the setting information of the system from being lost even after the system is stopped, two methods have been adopted, such as continuously supplying the power supply and the operation clock.

[0003]

The conventional method of setting up the information processing system described above requires a control program for the CPU to perform system resetting, a memory for storing this program, and a system. Since it is necessary to make the memory that holds the setting information accessible from the CPU, find a small free area in the memory map,
There is a drawback that it takes a relatively long time to perform the reconfiguration of the entire system because it needs to fetch and execute the required data little by little, and it is necessary to supply power to the entire system. Since it needs to be continued, there is a drawback that power consumption increases.

[0004]

According to the automatic setup method of the information processing system of the present invention, the C of the information processing system is used.
A bus monitoring mechanism that monitors the processing content of the PU, a processing content storage mechanism that stores the executed processing content, and a bus cycle of the information processing system based on the information held in the processing content storage mechanism without a program It has a bus cycle generating mechanism, a bus monitoring mechanism, a processing content storing mechanism, a bus cycle generating mechanism, and a control mechanism for controlling input / output of information with the information processing system.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a system block diagram of an embodiment of the present invention, and FIG. 2 is a processing flowchart of this embodiment.

First, an outline of the operation of the entire system will be described with reference to FIG.

In FIG. 1, the CPU 11 has a memory controller 1
2. The bus control unit 14 is connected, and the bus control unit 14 has a computer keyboard and a CRT display control I / O.
Various I / O resources 13 that make up a system such as O devices
Are connected. The power supply unit 15 for supplying power to the system generates a signal of a certain width when it is ready to output a specified power supply voltage.

The control mechanism 1 for controlling the automatic setup mechanism 5 itself controls each constituent unit and controls input / output of control information with an external circuit. CP
The bus monitoring mechanism 2 for monitoring the operation of U11 is the CPU 11
Determines whether or not the bus cycle executed by is a write cycle for the I / O resource 13 that needs to retain the setting contents inside the system. The mechanism 3 that stores the processing contents of the CPU 11 is a mechanism that holds the contents of access to I / O inside the system in the cycle executed by the CPU 11. The bus cycle generation mechanism 4 is a mechanism that issues a bus cycle for setting the system information held in the processing content storage mechanism 3 in the system.

Next, an outline of the operation of each mechanism will be described.

First, the CPU 11 activates the control mechanism 1 to start the operation of this mechanism. The activated control mechanism 1 initializes the state of each unit and activates the bus monitoring mechanism 2. The bus monitoring mechanism 2 that has been activated is the CPU 11
Determines whether or not the bus cycle executed by is a write cycle for the I / O resource 13 inside the system. The access to the I / O resource that changes sequentially such as the initial value of the system counter is ignored, and the operation mode setting information of each I / O resource is detected. The detected I / O setting information determines the individual operation modes in the system, and it is necessary to constantly keep the latest information. When the I / O resource setting cycle is detected, the bus monitoring mechanism 2 sends a CP
The mechanism 3 for storing the processing content of U is activated to store the address of the execution cycle and the setting data.

The mechanism 3 for storing the processing contents of the activated CPU analyzes the executed bus cycle and saves the setting data in a prescribed location based on the analysis result. Only the setting data is sufficient for the information to be stored, and the address information can maintain the correlation between the actual address and the storage location by the content part conversion table of the mechanism 3 which stores the processing content of the CPU. This method has an I / O that makes excellent use of data setting a plurality of times for the same address, and is a function necessary for completely emulating the data connection difference of an I / O element. Bus monitoring mechanism 2 and CP
Information necessary for system resetting is stocked by the mechanism 3 for storing the processing contents of U to prepare for system resetting.

After the power is turned off, the system power is turned off to reset the system to the state before the power was turned off after the system setting information is lost. Control mechanism 1 and CP
It is necessary to continue supplying power to the mechanism 3 that stores the processing content of U. As a processing procedure for returning to the state before the power is turned off after the power is turned on, when the power is turned on, the power supply unit 15 outputs a signal indicating that the power supply has become normal to the control mechanism 1.

The control mechanism 1 includes a power supply unit 15
When a signal indicating that the power supply status is normal is received from the system, the internal register is used to check whether the system status is restored to the status before the power was turned off. If there is no need to restore the status (this mechanism has not been started). Does nothing. When it is necessary to return the signal, a system bus use permission request is output and the bus cycle generation mechanism 4 is activated. When the system bus use permission is obtained, the control mechanism 1 causes the bus cycle generation mechanism 4 to
A bus cycle is generated for system reconfiguration,
Bus cycle generator 4 that there is no data to set
When the bus release request is received from the system side, it is necessary to suspend the operation of the bus cycle generation mechanism 4 and release the bus when the bus release request is received from the system side.

The activated bus cycle generation mechanism 4 accesses the processing content storage mechanism 3 of the CPU and confirms whether there is data to be set. In some cases, output of setting data and generation and output of setting address are executed by the processing content storage mechanism 3 of the CPU, and upon approval from the control mechanism 1, a bus command is output by the bus cycle generation mechanism 4. And perform a bus cycle.

The bus cycle generation mechanism 4 is controlled by the control mechanism 1, and the processing content storage mechanism 3 of the CPU is controlled.
Bus cycle is executed until the setting data is exhausted, and when the processing contents storage mechanism 3 of the CPU is notified that the setting data is exhausted, the control mechanism 1 is notified that the cycle is completed. . Also bus
The cycle generation mechanism 4 monitors the bus cycle being executed, and when bus cycles for the same I / O resource are continuous, the cycle generation mechanism 4 detects an interval interval defined by the I / O resource between cycles. A function that secures time is required.

By executing these processes, when control is passed to the CPU 11, the I / O resource 1 in the system is
3 is reset to the state before the power was cut off.

[0018]

As described above, according to the present invention, the mechanism other than the CPU realizes the routine system re-setting process, so that the compatibility with the existing system is not impaired.
Moreover, since it is not necessary to read the program, the CPU
There is an effect that the system can be reconfigured at a higher speed than the case where the processing is executed in.

[Brief description of drawings]

FIG. 1 is a system block diagram for one embodiment of the present invention.

FIG. 2 is a processing flowchart of the embodiment shown in FIG.

[Explanation of symbols]

 1 Control Mechanism 2 Bus Monitoring Mechanism 3 Processing Content Storage Mechanism 4 Bus Cycle Generation Mechanism 11 CPU 13 I / O Resources 15 Power Supply Unit

Claims (1)

[Claims] 1. A bus monitoring mechanism for monitoring processing contents of a CPU of an information processing system, a processing contents storing mechanism for storing executed processing contents, and information stored in the processing contents storing mechanism without a program, A bus cycle generating mechanism for generating a bus cycle of the information processing system, a bus monitoring mechanism, a processing content storing mechanism, a bus cycle generating mechanism, and a control mechanism for controlling input / output of information with the information processing system. An automatic setup mechanism of an information processing system characterized by including.