JPH06118444A - Production of thin-film transistor matrix - Google Patents

Abstract

PURPOSE:To decrease the number of patterning times and to decrease the photomasks to be used for patterning in the process for production of the thin- film transistor matrix. CONSTITUTION:This process for production is so constituted as to have stages for forming gate electrodes 2 and gate bus lines 2A connecting these gate electrodes 2 on a transparent insulating substrate 1, forming a gate insulating film 3, an operating semiconductor layer 4 and a protective film 5 over the entire surface of this substrate, forming a contact layer 6 and a source-drain electrode film 7 on the substrate by using the mask to shield the regions of gate terminals 12 at the front ends of the gate bus lines by allowing the protective film to remain only in the positions corresponding to the surfaces of the gate electrodes, then etching away the operating semiconductor layer 4 and the gate insulating film 3 on the gate terminals with the source-drain electrode films 7 as a mask to expose the gate electrodes 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor (TFT) matrix used for driving a liquid crystal display, an electroluminescence display or the like.

In recent years, liquid crystal displays have been required to have larger screens, and improvements in manufacturing processes corresponding thereto have been desired.

[0003]

2. Description of the Related Art FIGS. 5 (A) to 5 (E) and 6 (F) to 6 (I) are explanatory views of a manufacturing process of a conventional TFT.

The left side of FIGS. 5 and 6F to 6H is a plan view, and the right side is a sectional view. In FIG. 5 (A), for example, a titanium (Ti) film having a thickness of 800 Å is formed on the glass substrate 1 by a sputtering method, a resist is applied thereon, and exposure and development are performed to form a resist pattern. Using this resist pattern as a mask, the Ti film is etched by reactive ion etching (RIE) using chlorine-based gas, and the gate electrode 2
Then, the gate bus line 2A is formed and the resist is peeled off.

In FIG. 5B, a gate insulating film having a thickness of 40 is formed on the entire surface of the substrate by plasma vapor deposition (P-CVD).
A 00 Å silicon nitride (SiN) film 3, a 150 Å thick amorphous silicon (a-Si) film as an operating semiconductor layer 4, and a 1200 Å thick SiN film 5 as a protective film are successively grown.

In FIG. 5C, after applying a resist on the entire surface of the substrate, ultraviolet rays are irradiated from the back surface of the substrate to leave the resist film 2R only on the gate electrode 2. In Fig. 5 (D),
Etching is performed using the resist film 2R as a mask to remove the SiN film 5 except under the mask. Then, the resist film 2R is removed.

In FIG. 5 (E), an n ⁺ type a-Si film 6 as a contact layer 6 and a Ti film 7 having a thickness of 1000 Å as a source / drain electrode film are formed on the entire surface of the substrate. In FIG. 6 (F),
A resist film that covers the source and drain regions is formed by normal lithography, and a Ti film is formed by dry etching.
7, n ⁺ type a-Si film 6 and a-Si film 4 are etched to separate the devices.

In FIG. 6G, a molybdenum (Mo) film is deposited on the substrate by a sputtering method and patterned to form a drain bus line 8 connecting the drain electrodes.
In Fig. 6 (H), an ITO (tin oxide) film is formed as a pixel electrode material on the substrate, a resist pattern is formed on the pixel and the adjacent gate bus line, and etching is performed using a hydrochloric acid-based aqueous solution. The pixel electrode 9 is formed.

FIG. 6 (I) is a sectional view of the gate terminal on the left side,
A plan view of the entire matrix is shown on the right side. In the figure, 10
Is a display part, 11 is a drain terminal, and 12 is a gate terminal.

A resist is coated on the entire surface of the substrate, exposed and developed so that only the gate terminals 12 are exposed, and gate insulation is performed using a fluorine-based gas by CDE (chemical dry etching with the discharge chamber separated) or RIE. The SiN film 3 of the film is removed to expose the gate electrode terminal 12 (extension of the gate bus line 2A of the display section).

Through the above steps, the TFT matrix is completed.

[0012]

In the conventional example, since the photolithography process using the resist is required also in the step of exposing the gate electrode, the number of manufacturing steps increases and the cost increases.

An object of the present invention is to reduce the number of times of patterning in the manufacturing process of a TFT matrix and the number of photomasks used for patterning.

[0014]

[Means for Solving the Problems] 1) Forming a gate electrode 2 on a transparent insulating substrate 1 and a gate bus line 2A connecting the gate electrode in a direction perpendicular to the gate electrode. A first step, a second step of sequentially forming a gate insulating film 3, an operating semiconductor layer 4, and a protective film 5 on the entire surface of the substrate; and a step of leaving the protective film only on a position corresponding to the gate electrode. 3 steps, a fourth step of forming a contact layer 6 and a source / drain electrode film 7 on the substrate using a mask 13 that shields the region of the gate terminal 12 at the tip of the gate bus line, and the source / drain A fifth step of etching and removing the operating semiconductor layer and the gate insulating film on the gate terminal using the electrode film as a mask, patterning the source / drain electrode film, the contact layer and the operating semiconductor layer to form a source, Forming the drain electrode , A sixth step of element isolation, and a seventh step of connecting the drain electrodes to form a drain bus line 8 in a direction perpendicular to the gate bus line
8th step of forming a transparent electrode film on the substrate and patterning the transparent electrode film to form the pixel electrode 9 on the source electrode and on the gate bus line adjacent to the gate electrode via the gate insulating film Or 2) a step of forming the contact layer 6 on the entire surface of the substrate and forming the source / drain electrode film 7 using the mask 13 instead of the fourth step 1) The method for manufacturing a thin film transistor matrix described above, or 3) In place of the fifth step, a resist film is applied on the entire surface of the substrate, and the resist is applied only on the source and drain electrode films from the back side of the substrate. Overexposure so that the film remains,
The thin film transistor matrix according to 1), further comprising the step of removing the resist film on the gate terminal, and then exposing the gate terminal by etching away the gate insulating film using the remaining resist film as a mask. Production method. Achieved by

[0015]

FIG. 1 is a diagram for explaining the principle of the present invention. In the present invention, in the step of forming the n ⁺ type a-Si film 6 of the contact layer and the source / drain electrode film 7, the above film formation is performed only on the display portion and the drain terminal portion using the mask 13, and The gate insulating film and the operating semiconductor layer on the gate terminal are removed by etching using the source / drain electrode film as a mask so that the film is not formed on the gate electrode. In this way, the gate terminal can be formed without performing the photolithography of the patterning for the terminal formation process of the gate electrode which has been conventionally performed.

Here, the mask 13 used during film formation may be a simple one that does not require precision, and film formation using this mask is a simpler process than the lithography (exposure, development) process of the conventional example. .

[0017]

EXAMPLE FIG. 2 (A)-(C), FIG. 3 (D)-(F), FIG. 4 (G)
1 to (I) are explanatory views of the manufacturing process of the TFT according to the embodiment of the present invention.

The left side of the figure is a plan view, the center is a sectional view taken along the line AA, and the right side is a sectional view of the gate terminal. In Fig. 2 (A), a titanium Ti film with a thickness of 800 Å is formed on the glass substrate 1 by the sputtering method, a resist is applied on it, and exposure and development are performed to form a resist pattern. The Ti film is etched by RIE using chlorine gas as a mask to form the gate electrode 2 and gate bus line 2A, and the resist is peeled off.

In FIG. 2B, a SiN film having a thickness of 4000Å as a gate insulating film 3, an a-Si film having a thickness of 150Å as an operating semiconductor layer 4, and a protective film having a thickness of 4 A 1200Å SiN film 5 is successively grown in order.

In FIG. 2C, after applying a resist on the entire surface of the substrate, ultraviolet rays are irradiated from the back surface of the substrate to leave the resist film 2R only on the gate electrode 2. In Figure 3 (D),
Etching is performed using the resist film 2R as a mask to remove the SiN film 5 except under the mask. Then, the resist film 2R is removed.

In FIG. 3 (E), a mask (reference numeral 13 in FIG. 1) which is formed only on the display portion (TFT matrix) and the drain terminal portion is used, and the thickness of the contact layer is 5
A 00Å n ⁺ -type a-Si film 6 and a Ti film 7 having a thickness of 1000Å are formed as a source / drain electrode material.

In FIG. 3 (F), for example CF
₄ gas, using the Ti film 7 as a mask, the gate terminal 12
Upper operating a-Si film for semiconductor layer 4, SiN film for gate insulating film 3
Are removed by etching.

In FIG. 4G, a resist film covering the source and drain regions is formed by ordinary lithography,
By dry etching, Ti film 7, n ⁺ type a-Si film 6, a-
The Si film 4 is etched to separate the elements.

At this time _, regarding the Ti film of the gate terminal 12,
If the source and drain resists are left unetched. In addition, if the gate electrode material is a corrosion-resistant material (for example, chromium (Cr)), it will not be etched.

In FIG. 4H, a molybdenum (Mo) film is deposited on the substrate by a sputtering method and patterned to form a drain bus line 8 connecting the drain electrodes. In Fig. 4 (I), an ITO film is formed as a pixel electrode film on the substrate, a resist pattern is formed on the pixel and the adjacent gate bus line, and etching is performed with an aqueous solution of hydrochloric acid to form the pixel electrode 9. To do.

Here, if the ITO film 9 is left in the gate terminal portion, the TAB (Tape Aut
omated Bonding) Makes easy contact with tape and improves device reliability.

The TFT matrix is completed through the above steps. In the embodiment, Ti is used as the material for the gate electrode and the source / drain electrode, but when buffer hydrofluoric acid is used for etching the gate insulating film, it is necessary to change it to chromium (Cr) or the like.

Further, in the embodiment, the gate insulating film is removed by etching using the source / drain electrode film as a mask. Instead of this method, after the source / drain electrode film is mask-formed as in the embodiment, A resist is applied to the entire surface of the substrate, and over-exposure is performed from the back of the substrate so that the resist remains only on the source / drain electrode film, and the resist on the gate terminals is removed. The gate terminal may be exposed by etching.

[0029]

According to the present invention, it is possible to reduce the number of times of patterning in the manufacturing process of the TFT matrix and reduce the photomask used for patterning. As a result,
It was possible to reduce the manufacturing cost.

[Brief description of drawings]

FIG. 1 is an explanatory view of the principle of the present invention.

FIG. 2 is an explanatory diagram of a TFT manufacturing process according to an embodiment of the present invention (1)

FIG. 3 is an explanatory diagram of a manufacturing process of a TFT according to an embodiment of the present invention (2)

FIG. 4 is an explanatory diagram of a TFT manufacturing process according to an embodiment of the present invention (3)

FIG. 5 is an explanatory diagram of a TFT manufacturing process according to a conventional example (1)

FIG. 6 is an explanatory view of a manufacturing process of a TFT according to a conventional example (2)

[Explanation of symbols]

1 Glass substrate with transparent insulating substrate 2 Ti film with gate electrode 2A Ti film with gate bus line 2R Resist film 3 SiN film with gate insulating film 4 a-Si film with active semiconductor layer 5 SiN film with protective film 6 Contact layer n ⁺ type a-Si film 7 Ti film as source / drain electrode film 8 Mo film as drain bus line 9 ITO film as pixel electrode 10 Display unit 11 Drain terminal 12 Gate terminal

Claims (3)

[Claims] 1. A gate electrode on a transparent insulating substrate (1)
(2) and a first step of forming a gate bus line (2A) for connecting the gate electrode in a direction perpendicular to the gate electrode,
A second step of sequentially forming a gate insulating film (3), an operating semiconductor layer (4) and a protective film (5) on the entire surface of the substrate, and leaving the protective film only at a position corresponding to the gate electrode A contact layer (6) is formed on the substrate by using a third step and a mask (13) for shielding the region of the gate terminal (12) at the tip of the gate bus line.
A fourth step of forming the source / drain electrode film (7), and a fifth step of removing the operating semiconductor layer and the gate insulating film on the gate terminal by etching using the source / drain electrode film as a mask, A sixth step of patterning the source / drain electrode film, the contact layer, and the operating semiconductor layer to form source and drain electrodes, and element isolation, and a direction perpendicular to the gate bus line by connecting the drain electrodes. A seventh step of forming a drain bus line (8) on the substrate, forming a transparent electrode film on the substrate, patterning the transparent electrode film, and adjoining the gate bus on the source electrode and via the gate insulating film. An eighth step of forming a pixel electrode (9) on a line, and a method of manufacturing a thin film transistor matrix. 2. A step of forming the contact layer (6) on the entire surface of the substrate and forming the source / drain electrode film (7) using the mask (13) instead of the fourth step. The method of manufacturing a thin film transistor matrix according to claim 1, further comprising: 3. Instead of the fifth step, a resist film is applied on the entire surface of the substrate, and over-exposure is performed from the back side of the substrate so that the resist film remains only on the source and drain electrode films, and the gate is formed. 2. The method according to claim 1, further comprising the step of removing the resist film on the terminal, and thereafter, removing the gate insulating film by etching using the remaining resist film as a mask to expose the gate terminal. Method of manufacturing thin film transistor matrix.