JPH06105262A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To prevent the noise or the white painting-out due to the deterioration of a composite video signal from being displayed on a screen. CONSTITUTION:A synchronizing signal detecting circuit 6 detects a horizontal synchronizing signal and a vertical synchronizing signal from a composite video signal (c), and supplies a synchronizing signal detection signal (h) to a liquid crystal module control circuit 10. The liquid module control circuit 10 prepares a control signal (i) based on the synchronizing signal detection signal (h) from the synchronizing signal detecting circuit 6, and supplies it to a liquid crystal module 9. The Y driver of the liquid crystal module 9 stops the output of an ON signal from an address wiring based on the control signal (i). Thus, when the composite video signal (c) deteriorates, the detected result of the synchronizing signal detecting circuit 6 indicates the omission of the horizontal synchronizing signal and the vertical synchronizing signal, and the output of the ON signal is stopped by the Y driver of the liquid crystal module 9, so that the noise or white painting-out due to the deterioration of the composite video signal can be prevented from being displayed on the screen.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal television receiver and a liquid crystal display device for displaying an image using a liquid crystal display panel such as a liquid crystal monitor, and more particularly to a composite image signal whose level changes frequently. The present invention relates to a liquid crystal display device suitable for displaying.

[0002]

2. Description of the Related Art In recent years, active matrix type liquid crystal display devices using thin film transistors (hereinafter referred to as TFTs) have become widespread as television receivers using liquid crystals.

FIG. 5 is a circuit diagram for explaining such a conventional liquid crystal display device.

In FIG. 5, reference numeral 51 is a liquid crystal module, and in this liquid crystal module, an RG is connected to an input terminal 52.
B three primary color video signals kR, kG, kB (in this case, R indicates red, G indicates green, and B indicates blue.
The B three-primary-color video signals kR, kG, and kB are supplied via separate lines, but are shown as one line for simplification of description. ) Is supplied, and the horizontal synchronizing signal mHD and the vertical synchronizing signal mVD are supplied to the input terminals 53 and 54, respectively.

Control circuit 5 of liquid crystal module 51
5 is a horizontal synchronization signal m guided to the input terminals 53 and 54.
HD and vertical sync signal mVD are supplied. The control circuit 55 creates a timing signal n (start signal and scanning clock) based on the horizontal synchronizing signal mHD and the vertical synchronizing signal mVD and supplies it to the Y driver 56. Further, the control circuit 55 creates a timing signal p based on the horizontal synchronizing signal mHD and the vertical synchronizing signal mVD, and outputs the timing signal p.
It is supplied to the drivers 57 and 58 and is also led to the output terminal 59. The timing signal p guided to the output terminal 59 is supplied to the common driver 90.

The common driver 90 produces a common electrode drive signal q whose high level and low level are inverted in each horizontal scanning period and vertical scanning period from the supplied timing signal p and supplies it to the input terminal 60 of the liquid crystal module 51. Lead. The common electrode drive signal q guided to the input terminal 60 is supplied to the common electrode of the liquid crystal display panel 61.

The RGB three primary color video signals kR, kG, kB led to the input terminal 52 are supplied to the upper and lower X drivers 57, 5 respectively.
8 are supplied.

The Y driver 56 has a control circuit 55.
The signal lines 62, 62, ... Of the liquid crystal display panel 61 are sequentially turned on vertically in synchronization with one horizontal scanning period of the RGB three primary color video signals kR, kG, kB based on the timing signal n. The liquid crystal display panel 61 has a TFT 71.
An active matrix system using 1, 712 ... 7 mn is used.

Further, one pixel (for example, D1) is a TFT
(TFT 711 for D1), a pixel electrode (pixel electrode 811 for D1), and a liquid crystal cell (not shown).

The upper and lower X drivers 57 and 58 are connected to the pixel electrode 52 of the signal line 62 which is turned on by the Y driver 56.
The RGB three primary color video signals kR, kG and kB are written in. Hereinafter, for simplification of description, the R primary color video signal k
Explain R.

Pixels D1, D2 ... Dn output from the data wirings X1, X2 ... Xn of the upper and lower X drivers 57, 58.
The R primary color video signal kR of 1 is set to 1 by the ON signal from the address wirings Y1, Y2, Y3 ... Ym of the Y driver 56.
Pixel electrodes (811, 812 ... 81n, 82) for each line
1, 812 ... 82n ... 8mn). The light transmittance of the liquid crystal cell corresponding to the pixel electrode in which the R primary color video signal kR is written changes depending on the R primary color video signal kR. The same applies to the G primary color video signal kG and the B primary color video signal kB. Liquid crystal module 51
By arranging a surface light source on the back surface of the liquid crystal panel 61 whose transmittance has changed in this way, it is possible to display an image on the front side of the liquid crystal panel 61.

The Y driver 56 has an address wiring Y.
A CLR terminal is provided to put the outputs from 1, Y2, Y3 ... Ym into the off state (write-inhibited state), but the CLR terminal is normally in the low level state (ground state).
The liquid crystal panel 61 is always writable.

Further, the R primary color video signals kR of the pixels D1, D2 ... Dn from the X drivers 57 and 58 are horizontally scanned in the same manner as the ON signal from the Y driver 56 and the common electrode drive signal q from the common driver 90. The high level and the low level are inverted every period and vertical scanning period. The liquid crystal module 51 drives the liquid crystal in this way to prevent deterioration of the liquid crystal and improve flicker.

Here, a liquid crystal display device using such a conventional liquid crystal module is used to select a television broadcast signal in a state in which the level of the received signal changes frequently like in a liquid crystal television image receiving device mounted on a vehicle. Consider the case where it is used in a device for station reception.

In the liquid crystal television image receiving apparatus in this case, if the automatic gain control circuit (AGC circuit) cannot keep up with the change in the level of the received signal, the image detection circuit will be saturated or a large amount of noise will be generated. As a result, the composite video signal from the video detection circuit deteriorates. Therefore, a large amount of noise and white crushing phenomenon due to saturation occur on the screen of the liquid crystal panel.

[0016]

In the above-mentioned conventional liquid crystal display device, when used in a liquid crystal television image receiving device that receives a television broadcast signal by channel selection in a state in which the level of the received signal changes frequently, the received signal is received. By changing the level of
The composite video signal from the video detection circuit deteriorates. For this reason, a large amount of noise or white crushing phenomenon due to saturation occurs on the screen of the liquid crystal panel.

An object of the present invention is to provide a liquid crystal display device which can eliminate the above-mentioned problems and prevent noise and white crushing from being displayed on the screen due to deterioration of a composite video signal.

[0018]

A liquid crystal display device according to the present invention according to claim 1 is a liquid crystal display device for producing a video signal for writing from a composite video signal and displaying the video on a liquid crystal display panel of a liquid crystal module. Then, a signal deterioration detection circuit for detecting deterioration of the composite video signal, and a period during which the composite video signal is deteriorated is determined based on the detection result from the signal deterioration detection circuit, and during the period when the composite video signal is deteriorated, And a liquid crystal module control circuit for supplying a control signal for stopping the writing of the video signal to the liquid crystal display panel to the liquid crystal module to display the video displayed in the previous field as it is on the liquid crystal display panel. Characterize.

[0019]

According to this structure, when the composite video signal is deteriorated, the sync signal of the composite video signal is also dropped. Therefore, the liquid crystal module control circuit determines that the sync signal is missing, and the liquid crystal display By supplying a control signal to the panel to stop writing video signals, the video displayed in the previous field is displayed on the LCD panel as it is, so noise and white spots due to deterioration of the composite video signal are displayed on the screen. It can be prevented from being displayed.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the illustrated embodiments.

FIG. 1 is a block diagram showing a video signal processing section when the liquid crystal display device according to the present invention is applied to a liquid crystal television receiver.

In FIG. 1, a television high frequency signal (hereinafter referred to as an RF signal) a induced in the antenna 1 is supplied to a channel selection circuit 2. The tuning circuit 2 selects an RF signal a having a predetermined frequency and outputs an intermediate frequency signal (hereinafter referred to as an IF signal) b.
And is supplied to the video detection circuit 3. The video detection circuit 3 amplifies and detects the IF signal b and supplies the composite video signal c to the audio detection circuit 4, the color demodulation circuit 5 and the sync signal detection circuit 6. The audio detection circuit 4 detects the audio signal d included in the composite video signal c, amplifies it, supplies it to the speaker 7, and causes the speaker 7 to output audio. The color demodulation circuit 5 converts the color signal component of the supplied composite video signal c into the original color difference signal e.
And the luminance signal f is supplied to the gamma correction circuit 8. The gamma correction circuit 8 creates an RGB three primary color video signal from the color difference signal e and the luminance signal f from the color demodulation circuit 5,
The RGB three primary color video signals are gamma-corrected and supplied to the liquid crystal module 9 as RGB three primary color video signals gR, gG, gB.

Although not shown, the composite video signal c is
The sync separation circuit separates the horizontal sync signal and the vertical sync signal, and the separated horizontal sync signal and vertical sync signal are supplied to the liquid crystal module 9.

On the other hand, the sync signal detection circuit 6 detects a horizontal sync signal and a vertical sync signal from the supplied composite video signal c, and outputs a sync signal detection signal h indicating the detection result to the liquid crystal module control circuit 10. Supply. The liquid crystal module control circuit 10 creates a control signal i based on the sync signal detection signal h from the sync signal detection circuit 6 and supplies it to the liquid crystal module 9.

The liquid crystal module 9 guides the supplied control signal i to the CLR terminal of the Y driver.
The Y driver of the liquid crystal module 9 is responsive to the control signal i supplied to the CLR terminal to generate address lines Y1, Y2,
The output of the ON signal from Y3 ... Ym (see FIG. 5) is stopped. As a result, Y of the liquid crystal module 9
The driver stops writing to the liquid crystal panel based on the control signal i, and causes the image displayed in the previous field to be displayed on the liquid crystal display panel as it is.

FIG. 2 shows the liquid crystal module control circuit 10 of FIG.
It is a circuit diagram showing.

In FIG. 2, reference numeral 11 is an input terminal of the liquid crystal module control circuit 10 to which the sync signal detection signal h from the sync signal detection circuit 6 is guided. The input terminal 11 is connected to the base of the PNP transistor Tr1 via the capacitor c1. The base of the PNP transistor Tr1 has an input terminal 12 through which a DC voltage V1 is introduced via a resistor R1.
Connected to. The input terminal 12 is a PNP transistor T
It is connected to the emitter of r1. PNP transistor Tr
The collector of 1 is connected to the reference potential point via the resistor R2, and is connected to the output terminal 15 via the series connection of the inverting circuits 13 and 14. When the signal generated at the collector of the NP transistor Tr1 is the collector output signal h1, the collector output signal h1 is output to the inverting circuits 13 and 14.
The signal is guided to the output terminal 16 as the control signal i through the series.

The output terminal 16 is the liquid crystal module 9 of FIG.
Connected to the clear terminal of the Y driver.

The operation of such an embodiment will be described below.

FIG. 3 is a timing chart showing the operation of the liquid crystal display device television receiver of this embodiment.
(A) shows a composite video signal c from the video detection circuit 3,
3B shows the sync signal detection signal h from the sync signal detection circuit 6, and FIG. 3C shows the liquid crystal module control circuit 10.
3 (d) shows the control signal i from the inverting circuit, FIG. 3 (e) shows the output of the Y driver, and FIG. f) shows the screen mode.

The RF signal a induced in the antenna 1 is tuned by the tuning circuit 2 and converted into the IF signal b, and the video detection circuit 3 performs the video detection, and the composite signal shown in FIG. It is converted into a video signal c. The composite video signal c is n
Field, n + 1 field period T (n + 1) a,
n + 2 field period T (n + 2) b, n + 3 field period T (n + 3) a and period T (n + 3) c, n
In a good reception state such as +1 field, the vertical synchronizing signal, the horizontal synchronizing signal, and the video signal are in a normal state, but the composite video signal c is in the period T (n + 1) b, n + 2 fields of the n + 1 field. Period T (n + 2)
a, n + 3 field period T (n + 3) b,
When the reception status is poor, the sync tip level and blanking level are higher than in the normal status indicated by the broken line.
The vertical sync signal and the horizontal sync signal (not shown) are missing, and the video signal is in a noise state or is crushed.

As a result, in FIG. 3B, the synchronizing signal detection signal h from the synchronizing signal detection circuit 6 is not detected as the vertical synchronizing signal and the horizontal synchronizing signal when the receiving state is switched from the good state to the bad state. Therefore, it drops sharply from the high level (H) and slightly as it approaches the low level (L),
Reach a low level by dropping the rate of decline. Further, when the reception state is switched from the bad state to the good state, the synchronization signal detection signal h rapidly rises from the low level and switches to the high level. Since such a synchronization signal detection signal h is supplied to the base of the PNP transistor Tr1 via the capacitor C1, the collector output signal h1 of the PNP transistor Tr1 becomes low when the reception state is switched from the good state to the bad state. When the reception state changes from a bad state to a good state, the level sharply decreases and switches to a low level. here,
Since the DC voltage is not passed through the capacitor C1, the collector output signal h1 will have its level slightly lowered from the high level as shown by A in the figure if the bad reception state continues for a long time.

Such collector output signal h1 passes through the series connection of the inverters 14 and 15 and becomes the control signal i shown in FIG. 3 (d). As a result, the control signal i becomes completely high level when the reception state is bad, and becomes completely low level when the reception state is good. Therefore, FIG. 3 (e)
The output of the Y driver shown in (2) is in a state where the ON signal is supplied (ON) from the address wiring corresponding to the horizontal period to the liquid crystal panel in a good reception state, and is turned on from the address wiring to the liquid crystal panel in a poor reception state. The signal is stopped (off). As a result, the Y driver of the liquid crystal module 9 writes the RGB three primary color video signals gR, gG, gB to the liquid crystal panel in a good reception state, and the RGB three primary color video signal gR to the liquid crystal panel in a poor reception state. , GG, gB writing is stopped. As a result, as shown in FIG. 3E, the mode of the screen of the liquid crystal panel displays the image of the current field when the reception state is good, and displays the image of the previous field when the reception state is bad. Become. To explain this concretely,
For example, a period T of n + 1 fields in a good reception state
In (n + 1) a, the image in the n + 1 field of the current field is displayed. On the other hand, a poor reception state, for example, n
During the +1 field period T (n + 1) b, the image of the n field displayed in the previous field is displayed.

4A and 4B are explanatory views showing the screen display of the present embodiment in comparison with the conventional one. FIG. 4A shows the conventional screen display and FIG. 4B shows the screen display of the present embodiment. Shows.

Here, in FIGS. 4A and 4B, the composite video signal from the video detection circuit is represented by n in FIG.
It is assumed that the state is indicated by the +1 field. In this case, in the conventional liquid crystal display device, as shown in FIG. 4A, the image of the current field (n + 1 field) is displayed in the portion 32 of the screen 31 where the reception state is good, but the reception state is In the bad portion 33, a noise image is formed from the top, and a white crushed image is formed below the noise image.

On the other hand, the screen display of this embodiment is shown in FIG.
As shown in, the image 32 of the current field (n + 1 field) is displayed in the portion 32 in the good reception state on the screen 31, and the image of the n field displayed in the previous field is displayed in the portion 33 in the poor reception state. It

Here, in the image of FIG. 4B, since the images in the front and rear fields have a correlation, the viewer feels uncomfortable even if the image of the current field and the image displayed in the previous field are connected. There is nothing to do.

As described above, the liquid crystal display device of this embodiment is
When the composite video signal is deteriorated due to the deterioration of the reception condition, it is possible to prevent image noise and white crushing, so when applied to an in-vehicle liquid crystal television receiver where the level of the received signal changes frequently, It is possible to provide users with high quality images.

In the embodiment of FIG. 1, the synchronizing signal detecting circuit 6 is used as the signal deterioration detecting circuit for detecting the deterioration of the composite video signal, but another signal deterioration detecting circuit, for example, a circuit for detecting a color burst signal is used. You may use. Also, FIG.
In the embodiment described above, the liquid crystal display device is applied to a liquid crystal television receiving device, but a liquid crystal display device for creating a video signal for writing from other composite video signals and displaying the video on a liquid crystal display panel, a video tape recorder for reproduction It may be applied to a liquid crystal monitor or the like. When applied to a liquid crystal monitor for reproducing a video tape recorder, it is possible to prevent dropout and noise due to deterioration of the tape. Further, in the embodiment of FIG. 1, the RGB three primary color video signals from the X driver, the ON signal from the Y driver, and the common electrode drive signal are inverted between the high level and the low level for each horizontal scanning period and vertical scanning period. Although the present invention is applied to a liquid crystal display device, it may be applied to a liquid crystal display device that does not perform such inversion.

[0040]

As described above, according to the present invention, it is possible to prevent noise and white crushing due to deterioration of the composite video signal from being displayed on the screen. It is possible to prevent dropout and noise due to deterioration of the tape in the LCD monitor for reproducing the tape recorder.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a circuit diagram showing a liquid crystal module control circuit of FIG.

FIG. 3 is a timing chart showing the operation of the present embodiment of FIG.

FIG. 4 is an explanatory view showing a screen display of the present embodiment of FIG.

FIG. 5 is a block diagram showing a conventional liquid crystal module.

[Explanation of symbols]

 3 video detection circuit 5 color demodulation circuit 6 sync signal detection circuit 8 gamma correction circuit 9 liquid crystal module 10 liquid crystal module control circuit

Claims (2)

[Claims] 1. A liquid crystal display device for creating a video signal for writing from a composite video signal and displaying the video on a liquid crystal display panel of a liquid crystal module, comprising a signal deterioration detection circuit for detecting deterioration of the composite video signal, A period during which the composite video signal is deteriorated is determined based on the detection result from the signal deterioration detection circuit, and during the period during which the composite video signal is deteriorated, a control signal for stopping the writing of the video signal to the liquid crystal display panel is applied to the liquid crystal. A liquid crystal display device comprising: a liquid crystal module control circuit that supplies the image to the module and displays the image displayed in the previous field as it is on the liquid crystal display panel. 2. A synchronization signal detection circuit for detecting a synchronization signal of the composite video signal is used as the signal deterioration detection circuit,
The liquid crystal module control circuit determines a period in which the sync signal is missing based on the detection result from the synchronous detection circuit, and a control signal that stops writing of the video signal to the liquid crystal display panel in the period in which the sync signal is missing. 2. The liquid crystal module is supplied to the liquid crystal module.
The described liquid crystal display device.