JPH0590070A - Composite printed circuit board with built-in capacitors - Google Patents

Composite printed circuit board with built-in capacitors

Info

Publication number
JPH0590070A
JPH0590070A JP3247278A JP24727891A JPH0590070A JP H0590070 A JPH0590070 A JP H0590070A JP 3247278 A JP3247278 A JP 3247278A JP 24727891 A JP24727891 A JP 24727891A JP H0590070 A JPH0590070 A JP H0590070A
Authority
JP
Japan
Prior art keywords
capacitor
mgo
dielectric
built
silica
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3247278A
Other languages
Japanese (ja)
Other versions
JP2989945B2 (en
Inventor
Itsuro Sakaguchi
逸朗 坂口
Yoshihiro Fujioka
芳博 藤岡
Akiya Fujisaki
昭哉 藤崎
Yasushi Yamaguchi
泰史 山口
Shinjiro Shimo
信二郎 下
Nobuyoshi Fujikawa
信儀 藤川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP3247278A priority Critical patent/JP2989945B2/en
Publication of JPH0590070A publication Critical patent/JPH0590070A/en
Application granted granted Critical
Publication of JP2989945B2 publication Critical patent/JP2989945B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Abstract

PURPOSE:To realize a built-in type high permittivity capacitor and a built-in type temperature compensation capacitor having a stabilized characteristic by sandwiching such high permittivity capacitor and temperature compensation capacitor with insulator layers consisting of MgO, SiO, CaO and borosilicate magnesium glass. CONSTITUTION:Dielectric layers 4, 4' are formed by a ceramic composition mainly consisting of barium titanate (BaTiO3) and temperature compensating dielectric ceramics. The main elements of an insulator layer 1 sandwiching capacitors 2, 2' are formed by magnesia(MgO), silica(SiO2) and calcia(CaO) within the range enclosed by the points A, B, C, D, E, F expressed by weight ratio and borosilicate magnesium glass mainly consisting of silica, boricoxide(B2 O3) and barium oxide(BaO) having the parts by weight exceeding 1 but under 15 for the total 100 parts by weight of magnesia(MgO), silica (SiO2) and calcia(CaO).

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、コンデンサー、抵抗体
及び電気配線用導体層を有するコンデンサー内蔵複合回
路基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a capacitor-incorporated composite circuit board having a capacitor, a resistor and a conductor layer for electric wiring.

【0002】[0002]

【従来の技術】近年、各種の電子部品はIC及びLSI
等の半導体集積回路素子の利用で小型化・高密度実装化
が急速に進められ、それに伴い前記半導体集積回路素子
等を搭載する絶縁基板も小型化とともに、より一層の高
密度化が要求されてきた。そこで、電気配線の微細化や
多層化による高密度化および電子回路におけるコンデン
サーや抵抗等の受動部品のチップ化が進められ、更にそ
れら小型化された受動部品を絶縁基板の両面に設けた電
気配線用導体層に接続した両面実装化が実用化されてき
た。しかし乍ら、半導体材料の著しい発達に伴って電子
部品は、より一層の小型化・高密度実装化が要求される
ようになり、前記受動部品の小型化等ではその要求を満
足することが出来なくなっていた。
2. Description of the Related Art In recent years, various electronic parts have become ICs and LSIs.
Miniaturization and high-density mounting are rapidly progressing by using semiconductor integrated circuit elements such as the above, and accordingly, the insulating substrate on which the semiconductor integrated circuit elements and the like are mounted are also downsized, and higher density is required. It was Therefore, miniaturization and multi-layering of electrical wiring have been promoted, and passive components such as capacitors and resistors in electronic circuits have been made into chips. Furthermore, miniaturized passive components are provided on both sides of an insulating substrate. The double-sided mounting connected to the conductor layer has been put to practical use. However, with the remarkable development of semiconductor materials, electronic components are required to be further miniaturized and mounted at high density, and it is possible to satisfy the demand for miniaturization of the passive components. It was gone.

【0003】そこで、かかる要求に応えるべく、誘電体
層と電極層とを順次積層して形成されたコンデンサー部
の片面もしくは両面に絶縁体層を設けて同時に焼成一体
化し、該絶縁体層表面上にスクリーン印刷法等により電
気配線用導体層及び抵抗体層を形成し、該導体層及び抵
抗体層を焼付けてハイブリッド化することにより小型化
・高密度化せんとする複合セラミック基板が提案されて
いる(特公昭62−21260号公報、特公昭63−5
5795号公報参照)。
In order to meet such demands, therefore, an insulating layer is provided on one or both sides of a capacitor portion formed by sequentially laminating a dielectric layer and an electrode layer, and firing and integration are simultaneously performed on the surface of the insulating layer. A composite ceramic substrate has been proposed in which a conductor layer for electric wiring and a resistor layer are formed by a screen printing method or the like, and the conductor layer and the resistor layer are baked and hybridized to achieve miniaturization and high density. (Japanese Patent Publication No. 62-21260, Japanese Patent Publication No. 63-5)
5795).

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この従
来の複合セラミック基板は、チタン酸バリウム(BaT
iO3 )及び温度補償用誘電体セラミツクス、例えばチ
タン酸バリウム(BaTi4 9 )、チタン酸カルシウ
ム(CaTiO3 )、チタン酸マグネシウム(Mg2
iO4 )、チタン酸ランタン(La2 Ti2 7 )、チ
タン酸ストロンチウム(SrTiO3 )またはチタン酸
ネオジウム(Nd2 Ti2 7 )のいずれかを主成分と
する磁器組成物を誘電体層とし、該誘電体層をアルミナ
(Al2 3 )やステアタイト(MgSiO3 )から成
る絶縁体層で挾着して焼成一体化したものであり、絶縁
基体自体の強度が高いという利点はあるものの、焼成温
度が1300℃〜1400℃と高く、前記誘電体層と絶
縁体層とが反応してしまい所期の特性を有する誘電体層
が得られないという課題があった。
However, this conventional composite ceramic substrate is not suitable for barium titanate (BaT).
iO 3 ) and dielectric ceramics for temperature compensation, such as barium titanate (BaTi 4 O 9 ), calcium titanate (CaTiO 3 ), magnesium titanate (Mg 2 T).
iO 4 ), lanthanum titanate (La 2 Ti 2 O 7 ), strontium titanate (SrTiO 3 ) or neodymium titanate (Nd 2 Ti 2 O 7 ) as the main component of the dielectric layer. In addition, the dielectric layer is sandwiched by an insulating layer made of alumina (Al 2 O 3 ) or steatite (MgSiO 3 ) and fired and integrated, and there is an advantage that the strength of the insulating substrate itself is high. However, there is a problem that the firing temperature is as high as 1300 ° C. to 1400 ° C. and the dielectric layer and the insulating layer react with each other, so that a dielectric layer having desired characteristics cannot be obtained.

【0005】その上、前記絶縁体層と誘電体層との焼成
温度を一致させることが難しく、絶縁体層と誘電体層と
の熱膨張差から誘電体層にクラックを生じ、コンデンサ
ーとしての絶縁抵抗や絶縁破壊電圧が所期の特性値より
低下してしまうという課題があった。
Moreover, it is difficult to match the firing temperatures of the insulating layer and the dielectric layer, and cracks are generated in the dielectric layer due to the difference in thermal expansion between the insulating layer and the dielectric layer, resulting in insulation as a capacitor. There was a problem that the resistance and the dielectric breakdown voltage would be lower than the desired characteristic values.

【0006】[0006]

【発明の目的】本発明は上記欠点に鑑みなされたもの
で、その目的は主成分がMgO、SiO2 、CaO及び
硼珪酸マグネシウムガラスから成る高周波絶縁性に優れ
た絶縁体層と、高い比誘電率を有するチタン酸バリウム
(BaTiO3 )を主成分とする誘電体層を同時に焼成
一体化でき、かつ高い静電容量を有するコンデンサー及
び安定した温度特性を有する温度補償用コンデンサーを
それぞれ内蔵することを可能とした複合回路基板を提供
することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and an object of the present invention is to provide an insulating layer having a high frequency insulating property, which is composed mainly of MgO, SiO 2 , CaO and magnesium borosilicate glass, and has a high dielectric constant. That a dielectric layer mainly composed of barium titanate (BaTiO 3 ) having a high rate can be simultaneously sintered and integrated, and a capacitor having a high capacitance and a temperature compensating capacitor having a stable temperature characteristic are respectively incorporated. An object of the present invention is to provide a possible composite circuit board.

【0007】[0007]

【課題を解決するための手段】本発明に係るコンデンサ
ー内蔵複合回路基板は、チタン酸バリウム(BaTiO
3 )及び温度補償用誘電体セラミックスをそれぞれ主成
分とする磁器組成物を誘電体層とし、コンデンサー部を
挾着する絶縁体層の主成分が、重量比で表わした図1に
示す下記A、B、C、D、E、Fの各点で囲まれた範囲
内のマグネシア(MgO)、シリカ(SiO2 )及びカ
ルシア(CaO)と、マグネシア(MgO)、シリカ
(SiO2)及びカルシア(CaO)の合計100重量
部に対し、1を越え15未満の重量部の硼珪酸マグネシ
ウムガラスとから成る絶縁体であり、該絶縁体層がフォ
ルステライト(Mg2 SiO4 )とメルウイナイト(C
3 MgSi2 8 )、モンチセライト(CaMgSi
4 )、アカーマナイト(Ca2 MgSi2 7 )また
はエンスタタイト(MgSiO3 )のうち少なくとも一
種の結晶相を含有し、前記誘電体と該誘電体層及び電極
層とから形成されるコンデンサー部を挾着した絶縁体層
とは同時焼成して一体焼結体としたことを特徴とするも
のである。但し、X、Y、Zはそれぞれマグネシア(M
gO)、シリカ(SiO2 )及びカルシア(CaO)の
重量%を表す。
A composite circuit board with a built-in capacitor according to the present invention comprises barium titanate (BaTiO 3).
3 ) and a ceramic composition mainly composed of temperature-compensating dielectric ceramics as a dielectric layer, and the main component of the insulating layer for sandwiching the capacitor part is represented by the following weight ratio A shown in FIG. B, C, D, E, magnesia range surrounded by points of F (MgO), silica (SiO 2) and calcia (CaO), magnesia (MgO), silica (SiO 2) and calcia (CaO ), The insulating layer is composed of magnesium borosilicate glass in an amount of more than 1 and less than 15 with respect to 100 parts by weight in total, and the insulating layer comprises forsterite (Mg 2 SiO 4 ) and merwinite (C).
a 3 MgSi 2 O 8 ), monticerite (CaMgSi
O 4 ), akermanite (Ca 2 MgSi 2 O 7 ) or enstatite (MgSiO 3 ) at least one crystal phase is contained, and a capacitor portion formed from the dielectric and the dielectric layer and the electrode layer is formed. The cladded insulator layer is characterized by being co-fired to form an integral sintered body. However, X, Y, and Z are magnesia (M
gO), silica (SiO 2 ) and calcia (CaO) are represented by weight%.

【0008】 即ち、前記絶縁体中のMgOが59重量%を越えると焼
成温度が1300℃を越え、前記誘電体材料との反応性
が大となり同時焼成できず、その上、結晶相としてペリ
クレース(MgO)が析出し耐湿性が劣化する。他方、
31重量%未満では、コンデンサー部の絶縁抵抗値及び
絶縁破壊電圧が低下してしまい実用範囲を越えてしま
う。また、SiO2 が59重量%を越えると絶縁体層の
熱膨張率が低下し、該絶縁体層と前記誘電体層との熱膨
張差が大となり、該誘電体層にクラックが発生し、所期
の誘電体特性が得られない。他方、31重量%未満では
焼成温度が1300℃以上となり、前記誘電体材料と同
時焼成できない。
[0008] That is, when the MgO content in the insulator exceeds 59% by weight, the firing temperature exceeds 1300 ° C., the reactivity with the dielectric material becomes large, and simultaneous firing is not possible. Moreover, periclase (MgO) is present as a crystal phase. Moisture resistance deteriorates due to precipitation. On the other hand,
If it is less than 31% by weight, the insulation resistance value and the dielectric breakdown voltage of the capacitor part are lowered, which exceeds the practical range. Further, when SiO 2 exceeds 59% by weight, the coefficient of thermal expansion of the insulating layer decreases, the difference in thermal expansion between the insulating layer and the dielectric layer becomes large, and cracks occur in the dielectric layer. The desired dielectric properties cannot be obtained. On the other hand, if it is less than 31% by weight, the firing temperature is 1300 ° C. or higher, and the firing cannot be performed simultaneously with the dielectric material.

【0009】一方、CaOが29重量%を越えると誘電
体材料との反応性が大となり、同時焼成できず、かつC
aSiO3 またはCa2 SiO4 等のカルシウムケイ酸
塩が析出し耐湿性の劣化と共に、絶縁抵抗値及び絶縁破
壊電圧が低下し実用範囲を越える。また、5重量%未満
では絶縁体層の熱膨張率が低下し、前記同様の理由によ
り、誘電体層にクラックが発生し、所期の安定した誘電
体特性が得られない。
On the other hand, when CaO exceeds 29% by weight, the reactivity with the dielectric material becomes large, the simultaneous firing is not possible, and C
Calcium silicate such as aSiO 3 or Ca 2 SiO 4 is deposited, and the moisture resistance is deteriorated, and the insulation resistance value and the dielectric breakdown voltage are decreased, which exceeds the practical range. On the other hand, if it is less than 5% by weight, the coefficient of thermal expansion of the insulating layer decreases, and for the same reason as described above, cracks occur in the dielectric layer and desired stable dielectric characteristics cannot be obtained.

【0010】また、硼珪酸マグネシウムガラスが15重
量%以上では絶縁体層の焼成温度が1200℃以下とな
り、誘電体層及び電極層とで形成されるコンデンサー部
を同時焼成できない。一方、1重量%以下の場合には、
焼成温度が1300℃以上となり誘電体材料と同時焼成
できないという問題を生じる。故に、前記絶縁体層の主
成分は前記範囲に特定される。
Further, when the content of magnesium borosilicate glass is 15% by weight or more, the firing temperature of the insulating layer becomes 1200 ° C. or lower, and the capacitor portion formed by the dielectric layer and the electrode layer cannot be fired at the same time. On the other hand, when the content is 1% by weight or less,
There is a problem that the firing temperature becomes 1300 ° C. or higher and the firing cannot be performed simultaneously with the dielectric material. Therefore, the main component of the insulator layer is specified in the above range.

【0011】[0011]

【作用】コンデンサー部を挾着した絶縁体層の主成分で
あるマグネシア(MgO)、シリカ(SiO2 )、カル
シア(CaO)及び硼珪酸マグネシウムガラスを前記範
囲内となる様に調整することにより、前記絶縁体材料を
チタン酸バリウム(BaTiO3 )及び温度補償用誘電
体セラミックスを主成分とする誘電体材料が焼結する1
210℃乃至1280℃の焼成温度にて同時に焼成し、
焼成一体化された絶縁体層にフォルステライト(Mg2
SiO4 )結晶相以外に、該フォルステライト結晶相と
異なる熱膨張率を有するメルウイナイト(Ca3 MgS
2 8 )、モンチセライト(CaMgSiO4 )、ア
カーマナイト(Ca2 MgSi2 7 )またはエンスタ
タイト(MgSiO3 )の結晶相を少なくとも一種形成
させることにより、前記絶縁体の熱膨張率を調整できる
ことから、焼成一体化後の熱応力の発生が極めて少なく
なる。
[Function] By adjusting the magnesia (MgO), silica (SiO 2 ), calcia (CaO) and magnesium borosilicate glass, which are the main components of the insulating layer having the capacitor portion attached, so as to fall within the above range, A dielectric material mainly composed of barium titanate (BaTiO 3 ) and a temperature compensating dielectric ceramic sinters the insulating material 1
Simultaneous firing at a firing temperature of 210 ° C to 1280 ° C,
Forsterite (Mg 2
In addition to the SiO 4 ) crystal phase, merwinite (Ca 3 MgS) having a coefficient of thermal expansion different from that of the forsterite crystal phase.
i 2 O 8 ), monticerite (CaMgSiO 4 ), akermanite (Ca 2 MgSi 2 O 7 ) or enstatite (MgSiO 3 ) at least one crystal phase can be formed to adjust the thermal expansion coefficient of the insulator. Therefore, the occurrence of thermal stress after firing and integration is extremely reduced.

【0012】また、絶縁体組成中の硼珪酸マグネシウム
ガラスの含有量が増加するに従って絶縁体材料の軟化温
度が低下するため、焼成時の降温の際、絶縁体と誘電体
との熱膨張率の違いにより発生する残留応力を低減する
ことができ、結果として誘電体層のクラックの発生を阻
止することが可能となる。
In addition, since the softening temperature of the insulating material decreases as the content of magnesium borosilicate glass in the insulating composition increases, the coefficient of thermal expansion of the insulating material and the dielectric material during the temperature decrease during firing is decreased. The residual stress caused by the difference can be reduced, and as a result, the generation of cracks in the dielectric layer can be prevented.

【0013】[0013]

【実施例】次に、本発明のコンデンサー内蔵複合回路基
板を図2に示す実施例に基づき詳細に説明する。図2
は、本発明のコンデンサー内蔵複合回路基板の一実施例
を示す断面図である。図において、1は絶縁体層、2、
2’はコンデンサー部、3は電気配線用導体で、前記コ
ンデンサー部2、2’は交互に積層されたチタン酸バリ
ウム(BaTiO3 )を主成分とする誘電体層4と電極
層5及び温度補償用誘電体セラミックスを主成分とする
誘電体層4’と電極層5’とから成る。
EXAMPLE A composite circuit board with a built-in capacitor of the present invention will be described in detail with reference to the example shown in FIG. Figure 2
FIG. 3 is a cross-sectional view showing an example of a composite circuit board with a built-in capacitor of the present invention. In the figure, 1 is an insulator layer, 2,
2'is a capacitor part, 3 is a conductor for electric wiring, and the capacitor parts 2, 2'are alternately laminated dielectric layers 4 and electrode layers 5 and temperature compensation mainly composed of barium titanate (BaTiO 3 ). It is composed of a dielectric layer 4'having an insulating dielectric ceramic as a main component and an electrode layer 5 '.

【0014】前記絶縁体層1は、その組成がそれぞれマ
グネシア(MgO)、シリカ(SiO2 )、カルシア
(CaO)をX、Y、Zで表した重量%で示された図1
の下記A、B、C、D、E、Fの各点 で囲まれた範囲内のMgO、SiO2 及びCaOと、M
gO、SiO2 及びCaOの合計100重量部に対し、
1を越え15未満の重量部の硼珪酸マグネシウムガラス
とから成るセラミック原料粉末を混合し、該混合物を1
000℃及至1300℃の温度で仮焼する。
The composition of the insulator layer 1 is shown by the weight% of magnesia (MgO), silica (SiO 2 ), and calcia (CaO) represented by X, Y, and Z, respectively.
The following points A, B, C, D, E, F MgO, SiO 2 and CaO within the range surrounded by, and M
For 100 parts by weight of gO, SiO 2 and CaO in total,
Ceramic raw material powder consisting of magnesium borosilicate glass in an amount of more than 1 and less than 15 is mixed, and the mixture is mixed with 1
Calcination is performed at a temperature of 000 ° C to 1300 ° C.

【0015】その後、前記仮焼物を粉砕したセラミック
粉末に適当な有機バインダー、分散剤、可塑剤及び溶媒
を添加混合して泥漿物を作り、該泥漿物を例えば従来周
知のドクターブレード法等によりシート状に成形し、得
られたグリーンシートを複数枚積層したものから絶縁体
層が形成される。
Then, a suitable organic binder, a dispersant, a plasticizer and a solvent are added to and mixed with the ceramic powder obtained by crushing the calcined product to prepare a slurry, and the slurry is formed into a sheet by, for example, a conventionally known doctor blade method. An insulator layer is formed by stacking a plurality of green sheets obtained by forming the green sheet.

【0016】また、前記コンデンサー部2、2’はBa
TiO3 及び温度補償用誘電体を主成分とする微粉の誘
電体材料に、有機バインダーや溶媒等を添加混合して調
製した泥漿物を従来周知の引き上げ法等によりシート状
に成形する。
The condenser parts 2 and 2'are made of Ba.
A slurry prepared by adding and mixing an organic binder, a solvent and the like to a finely powdered dielectric material containing TiO 3 and a temperature compensating dielectric as main components is formed into a sheet by a conventionally known pulling method.

【0017】次いで前記グリーンシート上に銀・パラジ
ウム(Ag−Pd)合金ペーストを従来周知のスクリー
ン印刷法等により所定の電極パターンに被着し、電極層
5、5’を形成する。
Next, a silver / palladium (Ag-Pd) alloy paste is applied on the green sheet to a predetermined electrode pattern by a conventionally known screen printing method or the like to form electrode layers 5 and 5 '.

【0018】尚、絶縁体層1及びコンデンサー部2、
2’の上下面の導通をはかるため、絶縁体及び誘電体の
グリーンシートには打ち抜き加工等によりスルホール部
6が形成され、該スルホール部6には前記合金ペースト
が充填されている。
The insulator layer 1 and the capacitor section 2,
In order to establish continuity between the upper and lower surfaces of 2 ', a through hole portion 6 is formed on the green sheet of the insulator and the dielectric material by punching or the like, and the through hole portion 6 is filled with the alloy paste.

【0019】次いで、前記絶縁体とチタン酸バリウム
(BaTiO3 )及び温度補償用誘電体セラミックスを
主成分とする誘電体のグリーンシートを夫々積層して熱
圧着し、得られた積層体を大気中、200℃乃至400
℃の温度で脱バインダーし、その後、1210℃乃至1
280℃の温度にて焼成一体化することにより、コンデ
ンサー部2、2’を内蔵した絶縁基板を得る。
Then, the above-mentioned insulator, the green sheets of the dielectrics containing barium titanate (BaTiO 3 ) and the temperature-compensating dielectric ceramics as main components are laminated and thermocompression-bonded, and the obtained laminated body is exposed to the atmosphere. , 200 ° C to 400
Debinding at a temperature of ℃, then 1210 ℃ ~ 1
By firing and integrating at a temperature of 280 ° C., an insulating substrate having the capacitor parts 2 and 2 ′ built therein is obtained.

【0020】とりわけ、前記コンデンサー部2、2’は
高い誘電率を有するチタン酸バリウ(BaTiO3 )を
主成分とする誘電体層4の上下面に温度補償用誘電体セ
ラミックスを主成分とする誘電体層4’を積層して形成
することにより、同時に焼成一体化するに際して前記誘
電体層中の拡散速度の大なるTi及びBaの移動を抑制
することが可能となり、コンデンサー部の温度特性の劣
化が防止できる。
In particular, the capacitor parts 2 and 2 ′ have dielectric layers mainly composed of temperature compensating dielectric ceramics on the upper and lower surfaces of the dielectric layer 4 mainly composed of barium titanate (BaTiO 3 ) having a high dielectric constant. By stacking the body layers 4 ′, it is possible to suppress the movement of Ti and Ba, which have a large diffusion rate in the dielectric layer, at the same time when they are fired and integrated, and the temperature characteristics of the capacitor part are deteriorated. Can be prevented.

【0021】かくして前記焼成一体化した絶縁体層1表
面にAg−Pd系の電気配線用導体パターン及び酸化ル
テニウム(RuO2 )等の抵抗パターンを夫々印刷形成
し、大気中およそ850℃の温度で焼成することにより
抵抗体7を有するコンデンサー内蔵複合回路基板が得ら
れる。
In this way, a conductor pattern for electrical wiring of Ag-Pd system and a resistance pattern of ruthenium oxide (RuO 2 ) or the like are formed by printing on the surface of the insulating layer 1 which has been fired and integrated, and at a temperature of about 850 ° C. in the atmosphere. By firing, a composite circuit board with a built-in capacitor having the resistor 7 can be obtained.

【0022】また、電気配線用導体パターンに銅(C
u)を主成分とするペーストを用いる場合には、硼化ラ
ンタン(LaB6 )や酸化スズ(SnO2 )等を主成分
とする抵抗体材料で抵抗パターンを形成し、窒素雰囲気
中およそ900℃の温度で焼成することにより、前記同
様のコンデンサー内蔵複合回路基板が得られる。
Copper (C
When the paste containing u) as a main component is used, a resistance pattern is formed with a resistor material containing lanthanum boride (LaB 6 ) or tin oxide (SnO 2 ) as a main component, and the paste is formed in a nitrogen atmosphere at about 900 ° C. By firing at a temperature of, a composite circuit board with a built-in capacitor similar to the above can be obtained.

【0023】尚、前記絶縁体層1に残留する不可避不純
物として、酸化鉄(Fe2 3 )及びアルミナ(Al2
3 )の総量は、MgO 、SiO2 、CaO 及びA
2 3 の総量を100重量部とした場合、5重量部以
下であればコンデンサー部の各種特性を劣化させること
はない。
As the inevitable impurities remaining in the insulating layer 1, iron oxide (Fe 2 O 3 ) and alumina (Al 2
The total amount of O 3 ) is MgO, SiO 2 , CaO and A
When the total amount of l 2 O 3 is 100 parts by weight, if the amount is 5 parts by weight or less, various characteristics of the capacitor part are not deteriorated.

【0024】次に、以下の実施例に基づき本発明を具体
的に説明する。絶縁体層の組成が表1に示す組成比とな
るように、MgO 、SiO2 、CaO及び硼珪酸マグ
ネシウムガラスから成るセラミック原料粉末を混合し、
該混合物を1100℃乃至1250℃の温度で仮焼を行
った。その後、前記仮焼物を所望の粒度に粉砕調整し、
得られた原料粉末に適当な有機バインダー及び溶媒を添
加混合して泥漿状となすとともに、該泥漿物からドクタ
ーブレード法により厚さ約200μmのグリーンシート
を成形し、しかる後、該グリーンシートに打ち抜き加工
を施し、170mm角の絶縁体シートを得た。
Next, the present invention will be specifically described based on the following examples. Ceramic raw material powders composed of MgO 2 , SiO 2 , CaO and magnesium borosilicate glass were mixed so that the composition of the insulating layer would be the composition ratio shown in Table 1,
The mixture was calcined at a temperature of 1100 ° C to 1250 ° C. Then, pulverize and adjust the calcination product to a desired particle size,
A suitable organic binder and a solvent are added to and mixed with the obtained raw material powder to form a slurry, and a green sheet having a thickness of about 200 μm is formed from the slurry by a doctor blade method, and then punched into the green sheet. Processing was performed to obtain a 170 mm square insulator sheet.

【0025】一方、チタン酸バリウム(BaTiO3
及び温度補償用誘電体材料を主成分とする夫々の原料粉
末に適当な有機バインダー及び溶媒を添加混合して泥漿
状となすとともに、該泥漿物を引き上げ法により夫々の
コンデンサーの容量設定のために厚さ20μm乃至60
μmのグリーンシートを成形し、該グリーンシートを打
ち抜き加工して夫々170mm角の誘電体シートを得
た。
On the other hand, barium titanate (BaTiO 3 )
In order to set the capacity of each capacitor by adding and mixing an appropriate organic binder and a solvent to each raw material powder containing the temperature-compensating dielectric material as a main component to form a slurry, and pulling up the slurry. 20 μm to 60 in thickness
A green sheet of μm was formed, and the green sheet was punched to obtain a 170 mm square dielectric sheet.

【0026】次いで、前記2種の誘電体シートにスクリ
ーン印刷等の厚膜印刷法によりAg−Pd合金ペースト
を用いて約1mm乃至10mm角の電極パターンを,必
要とする静電容量に応じて印刷形成した。また、前記絶
縁体シート及び誘電体シートに予め形成されたスルホー
ル部にもスクリーン印刷法等によりAg−Pd合金ペー
ストを充填した。
Next, an electrode pattern of about 1 mm to 10 mm square is printed on the above-mentioned two kinds of dielectric sheets by a thick film printing method such as screen printing using Ag-Pd alloy paste according to the required capacitance. Formed. The Ag-Pd alloy paste was also filled in the through-hole portions previously formed on the insulating sheet and the dielectric sheet by screen printing or the like.

【0027】しかる後、前記絶縁体シートの間に、チタ
ン酸バリウムから成る誘電体シート積層体の上下面に、
温度補償用誘電体セラミックスから成る誘電体シートを
夫々複数枚積層したものを挟み込んで熱圧着し、得られ
た積層体を大気中200℃乃至400℃の温度で脱バイ
ンダーした後、表1に示す温度にて大気中で焼成した。
Thereafter, between the insulating sheets, on the upper and lower surfaces of the dielectric sheet laminated body made of barium titanate,
A plurality of laminated dielectric sheets made of temperature compensating dielectric ceramics are sandwiched and thermocompression-bonded, and the obtained laminated body is debindered at a temperature of 200 ° C. to 400 ° C. in the atmosphere, and then shown in Table 1. Firing in air at temperature.

【0028】上記評価試料によりLCRメーターを使用
して高容量及び温度補償用コンデンサー部の電極層間の
短絡の有無を確認した後、JIS C 5102の規定
に準じて前記LCRメーターにより周波数1KHz、入
力信号レベル1.0Vrmsの測定条件にて、高容量コ
ンデンサー部の静電容量を測定し、該静電容量から比誘
電率(εr )を算出するとともに、温度補償用コンデン
サー部の−55℃乃至125℃における静電容量を測定
し、25℃での静電容量を基準として前記静電容量の変
化率を温度特性( TCC )として算出した。
After confirming the presence or absence of a short circuit between the electrode layers of the capacitor part for high capacity and temperature compensation by using the above-mentioned evaluation sample using an LCR meter, a frequency of 1 KHz and an input signal were measured by the LCR meter in accordance with JIS C 5102. The capacitance of the high-capacity capacitor section is measured under the measurement condition of level 1.0 Vrms, and the relative permittivity (ε r ) is calculated from the capacitance, and the temperature-compensating capacitor section has a temperature range of −55 ° C. to 125 ° C. The capacitance at 0 ° C. was measured, and the rate of change of the capacitance was calculated as a temperature characteristic (TCC) based on the capacitance at 25 ° C.

【0029】また、前記各コンデンサー部の絶縁抵抗値
は、25Vの直流電圧を印加し60秒後に測定した抵抗
値とし、絶縁破壊電圧はコンデンサー部の端子間に毎秒
100Vの昇圧速度で電圧を印加した時の漏れ電流値が
1.0mAを越えた瞬間の電圧値とした。
The insulation resistance value of each capacitor section is a resistance value measured 60 seconds after applying a DC voltage of 25V, and the insulation breakdown voltage is applied between the terminals of the capacitor section at a boosting rate of 100V per second. The voltage value at the moment when the leakage current value at that time exceeded 1.0 mA.

【0030】一方、絶縁体層の結晶相は、前記評価試料
を使用してX線回折を行い、評価試料表面のX線回折パ
ターンにより同定した。
On the other hand, the crystal phase of the insulating layer was identified by an X-ray diffraction pattern on the surface of the evaluation sample by performing X-ray diffraction using the evaluation sample.

【0031】また、絶縁体層及び各誘電体層の熱膨張率
は、それぞれ前記評価試料と同一組成である縦3mm、
横3mm、長さ40mmの角棒状の試験片を前記評価試
料の焼成と同時に焼成し、40℃乃至800℃の温度範
囲における平均熱膨張率を測定した。
The coefficient of thermal expansion of the insulating layer and each of the dielectric layers has the same composition as that of the evaluation sample and is 3 mm in the vertical direction,
A rectangular rod-shaped test piece having a width of 3 mm and a length of 40 mm was fired at the same time as the firing of the evaluation sample, and the average coefficient of thermal expansion in the temperature range of 40 ° C. to 800 ° C. was measured.

【0032】以上の結果を表1〜表9に示す。The above results are shown in Tables 1 to 9.

【0033】[0033]

【表1】 [Table 1]

【0034】[0034]

【表2】 [Table 2]

【0035】[0035]

【表3】 [Table 3]

【0036】[0036]

【表4】 [Table 4]

【0037】[0037]

【表5】 [Table 5]

【0038】[0038]

【表6】 [Table 6]

【0039】[0039]

【表7】 [Table 7]

【0040】[0040]

【表8】 [Table 8]

【0041】[0041]

【表9】 [Table 9]

【0042】尚、本発明のコンデンサー内蔵複合回路基
板は、前述の実施例のみに限定されるものではなく、受
動部品である抵抗体を絶縁基板の両面に形成すれば、よ
り一層の小型化・高密度化が実現できることは言うまで
もない。
The composite circuit board with a built-in capacitor of the present invention is not limited to the above-mentioned embodiment, but if resistors, which are passive components, are formed on both sides of the insulating board, the size can be further reduced. It goes without saying that high density can be realized.

【0043】[0043]

【発明の効果】本発明のコンデンサー内蔵複合回路基板
によれば、マグネシア(MgO)、シリカ(SiO2
及びカルシア(CaO)を主成分とする高周波絶縁性に
優れた絶縁体層と、高い誘電率を有するチタン酸バリウ
ム(BaTiO3 )を主成分とする誘電体層及び温度補
償用誘電体層とが互いに反応することなく低温度で同時
に焼成一体化することが可能となる上、前記絶縁体層と
誘電体層の熱膨張率を互いに極めて近似したものとする
ことができることから、誘電体層にクラック等の欠陥を
生じることなく、絶縁抵抗並びに絶縁破壊電圧に優れた
高い静電容量を有するコンデンサー部と温度補償用コン
デンサー部を内蔵したハイブリッド基板等に最適な小型
化・高密度化されたコンデンサー内蔵複合回路基板を得
ることが出来る。
According to the composite circuit board with a built-in capacitor of the present invention, magnesia (MgO), silica (SiO 2 )
And an insulator layer mainly composed of calcia (CaO) and excellent in high frequency insulation, and a dielectric layer mainly composed of barium titanate (BaTiO 3 ) having a high dielectric constant and a temperature compensation dielectric layer. Since it becomes possible to perform firing and integration simultaneously at low temperature without reacting with each other, and the coefficient of thermal expansion of the insulator layer and the dielectric layer can be made to be extremely close to each other, cracks in the dielectric layer can occur. Built-in miniaturized and densified capacitor ideal for hybrid boards, etc. that have a built-in capacitor with high electrostatic capacity that is excellent in insulation resistance and dielectric breakdown voltage and temperature compensating capacitor without causing defects such as A composite circuit board can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る絶縁体層の組成の一部であるMg
O、SiO及びCaOの組成範囲を示す三元系図であ
る。
1 is a part of the composition of an insulating layer according to the present invention, Mg
It is a ternary system diagram which shows the composition range of O, SiO, and CaO.

【図2】本発明のコンデンサー内蔵複合回路基板の一実
施例を示す断面図である。
FIG. 2 is a sectional view showing an embodiment of a composite circuit board with a built-in capacitor of the present invention.

【符号の説明】[Explanation of symbols]

1 絶縁体層 2、2’ コンデンサー部 4、4’ 誘電体層 5、5’ 電極層 1 Insulator layer 2, 2'Capacitor part 4, 4 'Dielectric layer 5, 5' Electrode layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 山口 泰史 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 (72)発明者 下 信二郎 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 (72)発明者 藤川 信儀 鹿児島県国分市山下町1番4号 京セラ株 式会社総合研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasushi Yamaguchi 1-4 No. 4 Yamashita-cho, Kokubun-shi, Kagoshima Kyocera Stock Company Research Institute (72) Inventor Shinjiro Shimo No. 1-4 Yamashita-cho, Kokubun-shi, Kagoshima Kyocera Corporation (72) Inventor Nobuyoshi Fujikawa, 1-4 Yamashita-cho, Kokubun City, Kagoshima Prefecture Kyocera Corporation Inside Research Institute

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】誘電体層の上下面に電極層を設けてコンデ
ンサー部を形成し、該コンデンサー部を絶縁体層で挾着
したコンデンサー内蔵複合回路基板において、上記誘電
体層がチタン酸バリウム(BaTiO3 )及び温度補償
用誘電体セラミツクスを主成分とする磁器組成物から成
り、コンデンサー部を挾着した絶縁体層の主成分が、重
量比で表わした図1に示す下記A、B、C、D、E、F
の各点で囲まれた範囲内のマグネシア(MgO)、シリ
カ(SiO2 )及びカルシア(CaO)と、マグネシア
(MgO)、シリカ(SiO2 )及びカルシア(Ca
O)の合計100重量部に対し、1を越え15未満の重
量部のシリカ(SiO2 )、マグネシア(MgO)、酸
化硼素(B2 3 )、酸化バリウム(BaO)を主成分
とする硼珪酸マグネシウムガラスとから成ることを特徴
とするコンデンサー内蔵複合回路基板。但し、X、Y、
Zはそれぞれマグネシア(MgO)、シリカ(Si
2 )及びカルシア(CaO)の重量%を表す。
1. A composite circuit board with a built-in capacitor in which electrode layers are provided on the upper and lower surfaces of a dielectric layer to form a capacitor portion, and the capacitor portion is sandwiched by an insulating layer, wherein the dielectric layer is barium titanate ( BaTiO 3 ) and a ceramic composition containing a temperature compensating dielectric ceramic as a main component, and the main component of the insulating layer sandwiching the capacitor part is shown by the following weight ratios A, B and C shown in FIG. , D, E, F
Of magnesia (MgO), silica (SiO 2 ) and calcia (CaO), and magnesia (MgO), silica (SiO 2 ) and calcia (Ca)
O based on 100 parts by weight of a total of 1 to 15 parts by weight of silica (SiO 2 ), magnesia (MgO), boron oxide (B 2 O 3 ), barium oxide (BaO) as a main component. A composite circuit board with a built-in capacitor, which is composed of magnesium silicate glass. However, X, Y,
Z is magnesia (MgO), silica (Si
O 2 ) and% by weight of calcia (CaO).
【請求項2】前記絶縁体層がフォルステライト(Mg2
SiO4 )とメルウイナイト(Ca3 MgSi
2 8 )、モンチセライト(CaMgSiO4 )、アカ
ーマナイト(Ca2 MgSi2 7 )またはエンスタタ
イト(MgSiO3 )のうち少なくとも一種の結晶相を
含有することを特徴とする請求項1記載のコンデンサー
内蔵複合回路基板。
2. The forsterite (Mg 2
SiO 4 ) and melwinite (Ca 3 MgSi
2 O 8 ), monticerite (CaMgSiO 4 ), akermanite (Ca 2 MgSi 2 O 7 ), or enstatite (MgSiO 3 ), and at least one crystal phase is contained therein. Composite circuit board.
【請求項3】前記誘電体層と該誘電体層及び電極層とか
ら形成されるコンデンサー部を挾着した絶縁体層とは同
時焼成した一体焼結体であることを特徴とする請求項1
及び2記載のコンデンサー内蔵複合回路基板。
3. The dielectric layer and the insulator layer sandwiching the capacitor portion formed of the dielectric layer and the electrode layer are co-sintered integral sintered bodies.
And the composite circuit board with a built-in capacitor described in 2.
JP3247278A 1991-09-26 1991-09-26 Composite circuit board with built-in capacitor Expired - Fee Related JP2989945B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3247278A JP2989945B2 (en) 1991-09-26 1991-09-26 Composite circuit board with built-in capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3247278A JP2989945B2 (en) 1991-09-26 1991-09-26 Composite circuit board with built-in capacitor

Publications (2)

Publication Number Publication Date
JPH0590070A true JPH0590070A (en) 1993-04-09
JP2989945B2 JP2989945B2 (en) 1999-12-13

Family

ID=17161087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3247278A Expired - Fee Related JP2989945B2 (en) 1991-09-26 1991-09-26 Composite circuit board with built-in capacitor

Country Status (1)

Country Link
JP (1) JP2989945B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0707952A1 (en) * 1994-10-12 1996-04-24 Philips Patentverwaltung GmbH Ceramic multilayered composite, process for its preparation and module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0707952A1 (en) * 1994-10-12 1996-04-24 Philips Patentverwaltung GmbH Ceramic multilayered composite, process for its preparation and module

Also Published As

Publication number Publication date
JP2989945B2 (en) 1999-12-13

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