JPH0588998A - Bus diagnostic system - Google Patents

Abstract

PURPOSE:To provide a bus diagnostic system capable of easily specifying an abnormal position in an internal bus by repeatedly checking test data via respective bus repeater circuits at the time of generating abnormality between modules. CONSTITUTION:Modules 11 to 14 for individually executing data processing forms a bus test message consisting of test data, a module address, etc., and sends the message to a bus. An error in test data included in the bus test message returned by the bus repeaters 15A, 15B is detected and bus abnormality is informed to the outside. The bus repeater 15A, 15B judge an address in the bus test message and send selection signals to bidirectional interface circuits 17A to 17D. The circuits 17A to 17D separate unbalanced buses 19A to 19D from balanced buses 20A, 20B based upon the selection signals obtained from bus test judging circuits 18A, 18B and return the buses. The internal bus is tested and an abnormal position is specified.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to data transfer between modules for individually processing data via a bus.
The present invention relates to a bus diagnostic method suitable for use in a data exchange device in which a bus is extended via a bus repeater.

[0002]

2. Description of the Related Art A conventional example will be briefly described with reference to FIGS. FIG. 2 is a diagram showing an example of a data exchange device in which modules 21 to 25 are connected to unbalanced buses 28A and 28B, respectively. The unbalanced buses 28A and 28B are bidirectional interface circuits 2 with a built-in bus repeater circuit 26.
7A and 27B are connected. The bidirectional interface circuits 27A and 27B are connected by a balanced bus 29. The bidirectional interface circuits 27A and 27B are
It has only the function of passing an unbalanced / balanced bus. Here, if data is transferred by the module 21 and the module 22 detects an error in the data received by the module 22, the module 22 sends an error detection message to the module 21. Upon receiving the error detection message, the module 21 can repeat the operation of sending the same data to the module 22 again. When the error detection message is still received from the module 22 after repeating several times, the module 21 determines that the hardware between the modules 22 is abnormal and sends a test message to the module 22. The test message is looped back at the entrance of the module 22 and returns to the module 21 via the route 30. The module 21 checks the data of the returned test message, and when it detects an error, it alerts the outside only to the fact that there is an abnormality between the module 21 and the module 22, and the abnormal portion cannot be specified further. There wasn't.

FIG. 3 shows modules 31 to 33 (other modules are not shown, but other modules are unbalanced buses 38).
A-38D) connected to unbalanced buses 38A-3
8D is a diagram showing a configuration example of a data exchange device in which the balanced buses 38A to 38D are connected to each other by bus repeater circuits 36A and 36B and a balanced bus 39. Here, when data is transferred between the module 31 and the module 33, the data sent from the module 31 includes the unbalanced bus 38A, the bidirectional interface circuit 37A, the balanced bus 39, and the bidirectional interface circuit 3.
7D-received at module 33 through unbalanced bus 38D. When the module 33 detects an error in the received data, an error detection message is returned to the module 31, as in the example of FIG. The test message is also returned to module 31 via path 40. When an error is detected in the test message, the module 31 warns the outside that an abnormality has occurred in the data transfer path. If the module that performs data transfer is located at a physically separated position due to expansion of the bus by the balanced bus 39 and the bus repeater circuits 36A and 36B, the number of abnormal components increases, even if they are abnormal between modules. There is a drawback that it becomes more difficult to identify the abnormal portion than the example shown in FIG.

[0004]

According to the above-mentioned conventional example, in a data exchange device in which a plurality of modules for individually performing data processing exchange data via an internal bus,
Even if an internal bus detects an error in data transfer between modules physically separated and it is found that there is an abnormality between the modules, it is difficult to identify the abnormal portion.

The present invention has been made in view of the above circumstances, and when an abnormality occurs between modules in a data exchange apparatus in which a plurality of modules are connected via an internal bus, a test is performed in each bus repeater circuit. An object of the present invention is to provide a bus diagnosis method that makes it easy to identify an abnormal location of an internal bus by returning and checking data.

[0006]

SUMMARY OF THE INVENTION The present invention provides a data exchange apparatus in which data transfer between modules for individually performing data processing is performed via a bus, and the bus is expanded via a bus repeater. , A bus test message including at least test data and a bus repeater address, transmitting the bus test message to the bus, and detecting an error in the test message returned by the bus repeater, the bus repeater comprising: A bus test judgment circuit that deciphers an address and generates a selection signal to return the bus by its own bidirectional interface or a data path, and a selection signal generated by the bus test judgment circuit disconnects the bus and performs a test It is equipped with a bidirectional interface circuit that returns data And performing a diagnosis of the bus test message at.

[0007]

With the above-mentioned configuration, each module that individually processes data has a bus test message (test data,
It consists of a bus test message ID, a bus repeater address, and a module address. ) Is created and sent to the bus. In addition, it detects an error in the test data in the bus test message that is returned by the bus repeater, and notifies the abnormality of the bus to the outside. The bus repeater reads the address in the bus test message by the built-in bus test reading circuit and sends a selection signal to the built-in bidirectional interface circuit. The bidirectional interface circuit disconnects the unbalanced / balanced bus according to a selection signal obtained from the bus test judgment circuit and loops the bus.

This makes it easy to test the internal bus to identify the abnormal portion of the internal bus, and realize early detection and restoration of the abnormal portion.

[0009]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numerals 11 to 14 are modules (computers), each module is composed of a plurality of control circuits and has a function of processing data independently.
Where relevant to the present invention, bus test message generation and bus test message error detection are performed. Code 15
A and 15B are bus repeater circuits for expanding the internal bus. The bus repeater circuits 15A and 15B have the bidirectional interface circuits 17A and 17B and the bus test determination circuits 18A and 18B to loop back the bus test message and perform the bus test. The bidirectional interfaces 17A and 17B exchange unbalanced buses and balanced buses among the internal buses. It also has the function of disconnecting both buses or returning each bus by a bus test message. The bus determination circuits 18A and 18B interpret the bus test message issued from each of the modules 11 to 14 and have their own bidirectional interface circuits 17A and 1B.
Connect or fold the 7B unbalanced / balanced bus. Reference numerals 19A and 19D are unbalanced buses, and one of the internal buses is electrically unbalanced, and each module 11-1
4 is connected to this bus. Reference numerals 20A and 20B are balanced buses, and one of the internal buses is electrically balanced, and the buses are expanded.

The operation of the embodiment of the present invention will be described in detail below in comparison with the conventional example. The conventional bus repeater does not have a bus test judgment circuit, and each bidirectional interface circuit merely electrically connects an unbalanced and balanced bus. Here, it is assumed that the module 11 is a transmission module and the module 14 is a reception module. Conventionally, the transmission data from the module 11 passes through the unbalanced bus 19A, the bidirectional interface circuit 17A, the balanced bus 20A, the bidirectional interface circuit 17D, and the unbalanced bus 19D, and an error is detected at the entrance of the module 14, and Similarly, the test message from the module 11 is returned at the entrance of the module 14 and returns to the module 11.

However, in the present invention, when an abnormality is found in the test message, a bus test message is created. The bus test message is composed of the bus test message ID, the bus repeater address, the addresses of the module 11 and the module 14, in addition to the test data.
Here, it is assumed that the bus repeater address of the bus repeater circuit 15B is set. Module 11 sends the bus test message to unbalanced bus 19A. The bus repeater address of the message is read by the bus test judging circuit 18B of the bus repeater circuit 15B, and the bidirectional interface circuit 17C in the bus repeater circuit 15B is read.
Send a selection signal to 17D. Upon receiving the select signal, the bidirectional interface circuits 17C and 17D disconnect the unbalanced / balanced buses 19C / 19D and 20A / 20B, respectively. Only the bidirectional interface circuit 17D is looped back from the selection signal. The bus test message is now returned by the bidirectional interface circuit 17D, and the module 1
Returned to 1. The module 11 can determine whether or not there is an abnormality in the bus up to the bus repeater circuit 15B by checking the data of the returned bus test message. Similarly, the module 11 can diagnose the bus up to that point by causing the bus repeater circuit 15A to perform the same operation.

[0013]

As described above, according to the present invention, by changing the test location of the internal bus, it is easy to identify the abnormal location of the internal bus (and between the modules). It is possible to discover and restore.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing a conventional example.

FIG. 3 is a block diagram showing a conventional example.

[Explanation of symbols]

 11 to 14 ... Modules 15A and 15B ... Bus repeater circuits 17A to 17D ... Bidirectional interface circuits 18A and 18B ... Bus test determination circuits 19A to 19D ... Unbalanced buses 20A and 20B ... Balanced buses

Claims (1)

[Claims] 1. A data exchange device in which data transfer between modules for individually performing data processing is performed via a bus, and the bus is extended via a bus repeater. In each of the modules, at least test data and a bus repeater address are provided. The bus repeater comprises an error detection circuit for generating a bus test message, transmitting the bus test message to the bus, and detecting an error in the test message returned by the bus repeater. The bus repeater reads the bus repeater address and outputs a selection signal. Bus loopback by its own bidirectional interface when generated, or bus test judgment circuit that instructs the data path, and bidirectional interface that disconnects the bus and loops back test data by the selection signal generated by the bus test judgment circuit Bus test message provided by the module with a circuit A bus diagnostic method characterized by diagnosing