JPH0584844B2 - - Google Patents

Info

Publication number
JPH0584844B2
JPH0584844B2 JP28896586A JP28896586A JPH0584844B2 JP H0584844 B2 JPH0584844 B2 JP H0584844B2 JP 28896586 A JP28896586 A JP 28896586A JP 28896586 A JP28896586 A JP 28896586A JP H0584844 B2 JPH0584844 B2 JP H0584844B2
Authority
JP
Japan
Prior art keywords
pattern
measuring device
measured
probe
scattering coefficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP28896586A
Other languages
Japanese (ja)
Other versions
JPS63142204A (en
Inventor
Hiroo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP28896586A priority Critical patent/JPS63142204A/en
Publication of JPS63142204A publication Critical patent/JPS63142204A/en
Publication of JPH0584844B2 publication Critical patent/JPH0584844B2/ja
Granted legal-status Critical Current

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  • Length-Measuring Devices Using Wave Or Particle Radiation (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、絶縁性基板などに形成した回路パタ
ーンのパターン線長を測定するパターン線長測定
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a pattern line length measuring device for measuring the pattern line length of a circuit pattern formed on an insulating substrate or the like.

〔従来の技術〕[Conventional technology]

半導体技術の進展と相俟つて、電気通信や情報
処理などに利用される各種装置は小型化や軽量化
が図られ、その製作工程も自動化が進められてい
る。とくに、能動素子や受動素子あるいは集積回
路や個別部品などを相互に結線する技術として、
絶縁性基板に回路パターンを形成するものが多用
されている。たとえば、半導体集積回路にあつて
は、アルミ蒸着による配線が行われていた。ここ
では、半導体基板上に形成されたトランジスタや
抵抗などの素子をアルミ線により結線している。
しかし、半導体基板上には素子の製作過程で絶縁
膜または配線金属に凹凸が生じ、これらの表面に
はさらに金属または絶縁膜の形成を行う際、この
凹凸の部分により、膜厚の不均一や不連続を生じ
てしまう。MOSICでは、フイールド絶縁膜とゲ
ート絶縁膜との間に大きな段差が生じるので、こ
の傾向が強い。
Along with advances in semiconductor technology, various devices used in telecommunications and information processing are becoming smaller and lighter, and their manufacturing processes are becoming increasingly automated. In particular, as a technology for interconnecting active elements, passive elements, integrated circuits, individual parts, etc.
Those in which a circuit pattern is formed on an insulating substrate are often used. For example, in the case of semiconductor integrated circuits, wiring has been performed using aluminum vapor deposition. Here, elements such as transistors and resistors formed on a semiconductor substrate are connected using aluminum wires.
However, unevenness occurs in the insulating film or wiring metal on the semiconductor substrate during the manufacturing process of elements, and when a metal or insulating film is further formed on these surfaces, these uneven parts may cause uneven film thickness or unevenness. This will cause discontinuity. This tendency is strong in MOSICs because there is a large step difference between the field insulating film and the gate insulating film.

また、印刷配線基板にあつては、銅箔をエツチ
ングすることによつて配線が行われるものがあ
る。ここでは、半導体集積回路やコンデンサなど
が細長い銅箔により結線されている。しかし、絶
縁性基板上の銅箔がホトエツチングなどにより回
路を形成されるとき、マスクと絶縁性基板との密
着性やエツチング時間の管理などにより、銅箔に
短絡箇所あるいは切断箇所が生じてしまう。デイ
ジタル回路では、集積回路の高密度搭載に伴な
い、その端子間に数本の配線をしなければなら
ず、この傾向が強い。
In some printed wiring boards, wiring is performed by etching copper foil. Here, semiconductor integrated circuits, capacitors, etc. are connected using long and thin copper foils. However, when a circuit is formed on a copper foil on an insulating substrate by photo-etching or the like, short circuits or disconnections may occur in the copper foil due to the adhesion between the mask and the insulating substrate and the management of etching time. In digital circuits, as integrated circuits are mounted in high density, several wires must be connected between their terminals, and this tendency is strong.

そこで、これら基板上の配線つまり回路パター
ンのパターン線長をチエツクすることが行われて
いる。すなわち、この種のパターン線長は、被測
定基板の外部に対向して用意した電極と測定しよ
うとする回路パターンを電極とし、この両者の電
極間の静電容量を測定して回路パターンの有する
面積を算出し、そしてパターン線長を算出するこ
とにより得ていた。
Therefore, checking the pattern line length of the wiring, that is, the circuit pattern on these substrates is performed. In other words, this type of pattern line length can be determined by using an electrode prepared facing the outside of the board to be measured and the circuit pattern to be measured, and measuring the capacitance between the two electrodes. It was obtained by calculating the area and then calculating the pattern line length.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、従来行われていたこのようなパ
ターン線長測定においては、回路パターンの幅お
よび長さによつて決まる面積という形でその線長
を認識している。したがつて、回路パターンの短
絡あるいは断線の有無を判定する場合、その短絡
あるいは断線の存在する箇所により、その正確度
が劣化し、とくに長いパターンに対して比較的微
小な部分の欠陥が存在するとき、判定が困難にな
るという欠点があつた。
However, in conventional pattern line length measurement, the line length is recognized in the form of an area determined by the width and length of the circuit pattern. Therefore, when determining the presence or absence of a short circuit or disconnection in a circuit pattern, the accuracy deteriorates depending on the location of the short circuit or disconnection, and especially for long patterns, there may be defects in relatively small parts. The drawback was that it was difficult to judge.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、被測定パターンが形成された被試験
回路基板と、該被試験回路基板を所定位置に移動
する移動手段と、該被測定パターンの所定箇所に
接触して電気信号の授受を行うプローブと、該プ
ローブに接続され、該被測定パターンに対する入
射電力及び反射電力の係数を測定する散乱係数測
定器と、該散乱係数測定器に信号を供給する広範
囲の高周波数が発振可能な掃引信号発生器と、該
散乱係数測定器から得られた周波数による信号変
化を一時記憶する一時記憶回路と、該一時記憶回
路の信号変化を記憶すると共に比較用データをあ
らかじめ記憶している外部記憶装置と、該移動手
段、プローブ、散乱係数測定器、掃引信号発生
器、一時記憶回路、外部記憶装置を統合し制御
し、外部記憶装置に記憶された測定結果と比較用
データを比較して被測定パターンの物理的形状を
検出する中央処理装置とから構成される。
The present invention provides a circuit board under test on which a pattern to be measured is formed, a moving means for moving the circuit board under test to a predetermined position, and a probe that contacts a predetermined location of the pattern to be measured to send and receive electrical signals. , a scattering coefficient measuring device connected to the probe and measuring the coefficients of incident power and reflected power with respect to the pattern to be measured, and a sweep signal generator capable of oscillating a wide range of high frequencies to supply a signal to the scattering coefficient measuring device. a temporary storage circuit that temporarily stores signal changes depending on the frequency obtained from the scattering coefficient measuring device; and an external storage device that stores the signal changes of the temporary storage circuit and also stores comparison data in advance; The moving means, the probe, the scattering coefficient measuring device, the sweep signal generator, the temporary storage circuit, and the external storage device are integrated and controlled, and the measurement results stored in the external storage device are compared with the comparison data to determine the pattern to be measured. It consists of a central processing unit that detects physical shapes.

〔作用〕[Effect]

本発明はこのように構成されているので、被試
験回路基板を所定の位置に移動して被測定パター
ンがプローブに接触するように制御し、掃引信号
発生器から高周波電力を発生して散乱係数測定器
に供給する。プローブを通じて印加されたこの高
周波電力に対し入射電力及び反射電力の係数変化
を測定することになり、この変化を逐次記憶し、
あらかじめ別に記憶されていたデータと比較する
ことによりパターン線長の良否を判定する。
Since the present invention is configured in this manner, the circuit board under test is moved to a predetermined position, the pattern under test is controlled to come into contact with the probe, and high frequency power is generated from the sweep signal generator to determine the scattering coefficient. Supplies the measuring instrument. Coefficient changes in incident power and reflected power will be measured for this high-frequency power applied through the probe, and these changes will be sequentially memorized.
The quality of the pattern line length is determined by comparing it with data stored separately in advance.

〔実施例〕〔Example〕

本発明の実施例につき図面を参照して説明す
る。図は本発明の一実施例を示すブロツク図であ
る。広範囲の高周波数を発振する掃引信号発生器
1には散乱係数測定器2が接続されているので、
この測定端となつているプローブ3により、高周
波電力が被試験回路基板4に対して授受される。
散乱係数測定器2にて得られた散乱係数の変化は
一時記憶回路5にて一時的に記憶され、逐次、中
央処理装置6を介して外部記憶装置7に記憶され
る。中央処理装置6は、また、制御回路8を介し
て被試験回路基板4が搭載されたテーブル9をプ
ローブ4の位置に逐次移動させる。なお、外部記
憶装置7には、所定のパターン線長に対する比較
用データがあらかじめ記憶されている。
Embodiments of the present invention will be described with reference to the drawings. The figure is a block diagram showing one embodiment of the present invention. Since the scattering coefficient measuring device 2 is connected to the sweep signal generator 1 which oscillates a wide range of high frequencies,
High frequency power is transferred to and from the circuit board under test 4 by the probe 3 serving as the measurement end.
Changes in the scattering coefficient obtained by the scattering coefficient measuring device 2 are temporarily stored in a temporary storage circuit 5, and sequentially stored in an external storage device 7 via a central processing unit 6. The central processing unit 6 also sequentially moves the table 9 on which the circuit board under test 4 is mounted to the position of the probe 4 via the control circuit 8 . Note that comparison data for a predetermined pattern line length is stored in advance in the external storage device 7.

このように構成された一実施例についてその動
作を説明する。中央処理装置6の指令により、制
御回路8を介してテーブル9を移動させ、このテ
ーブル9に搭載した被試験回路基板4の被測定パ
ターンをその一端がプローブ3と接触する位置で
対向させ、プローブ3を被試験回路基板4の被測
定パターンに接触させる。掃引信号発生器1によ
り発生した高周波電力を、散乱係数測定器2のプ
ローブ3により、被試験回路基板4の被測定パタ
ーンに印加する。掃引信号発生器1の周波数を変
化させ、各周波数における入射電力及び反射電力
の係数変化をこの散乱係数測定器2により測定
し、得られた結果を一時記憶回路5に記憶させ
る。所定の結果が得られた時点で、その結果を外
部記憶装置7に転送し、データとして保存する。
被試験回路基板4の他の被測定パターンについて
も、同様にしてテーブルを移動させ、逐次、測定
の結果を外部記憶装置7に記憶していく。さて、
中央処理装置6には、これら一連の作業の制御お
よび外部記憶装置7の制御およびあらかじめ欠陥
のない完全品を用いて観測したデータを期待値と
して保存するか、あるいは、回路パターンおよび
回路基板素材の物理的形状・性質を基礎にして算
出した情報を期待値として保存しておく。したが
つて、外部記憶装置7に記憶されている被試験回
路基板4の測定結果を別に記憶したこのデータと
中央処理装置6にて比較することにより、回路パ
ターンの長さ、分岐の本数、分岐部分の長さ等の
情報を含む回路パターンの物理的形状を認識する
ことができ、パターン線長の良否を判定すること
ができる。
The operation of one embodiment configured in this manner will be described. In response to a command from the central processing unit 6, the table 9 is moved via the control circuit 8, and the pattern to be measured on the circuit board under test 4 mounted on the table 9 is faced to the position where one end thereof contacts the probe 3. 3 is brought into contact with the pattern to be measured on the circuit board 4 to be tested. The high frequency power generated by the sweep signal generator 1 is applied to the pattern to be measured on the circuit board under test 4 by the probe 3 of the scattering coefficient measuring device 2 . The frequency of the sweep signal generator 1 is changed, and the coefficient change of the incident power and reflected power at each frequency is measured by the scattering coefficient measuring device 2, and the obtained results are stored in the temporary storage circuit 5. When a predetermined result is obtained, the result is transferred to the external storage device 7 and saved as data.
Regarding other patterns to be measured on the circuit board under test 4, the table is moved in the same manner, and the measurement results are sequentially stored in the external storage device 7. Now,
The central processing unit 6 controls a series of these operations, controls the external storage device 7, and stores the data observed in advance using a perfect product with no defects as expected values, or stores the data of the circuit pattern and circuit board material. Information calculated based on physical shape and properties is saved as an expected value. Therefore, by comparing the measurement results of the circuit board under test 4 stored in the external storage device 7 with this separately stored data in the central processing unit 6, the length of the circuit pattern, the number of branches, and the The physical shape of a circuit pattern, including information such as the length of a portion, can be recognized, and the quality of the pattern line length can be determined.

〔発明の効果〕〔Effect of the invention〕

本発明は、広範囲の高周波数を発生させ、測定
したい回路パターンの長さ、分岐の本数、分岐部
分の長さ等の情報を含む回路パターンの物理的形
状を超高周波領域における電気的な特性、すなわ
ち高周波における分布定数回路の組み合わせに置
き換え、散乱係数の測定という形で認識し、パル
スを用いた時間領域の観測では判別が不可能な例
えば1cm以下の配線のシヨート等の微小な欠陥に
ついても高精度にて測定することができる。
The present invention generates a wide range of high frequencies, and analyzes the physical shape of the circuit pattern, including information such as the length of the circuit pattern to be measured, the number of branches, the length of the branch part, and the electrical characteristics in the ultra-high frequency region. In other words, by replacing it with a combination of distributed constant circuits at high frequencies and recognizing it in the form of measuring scattering coefficients, it is possible to detect minute defects, such as shorts in wiring of less than 1 cm, that cannot be identified by time-domain observation using pulses. Can be measured with precision.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例を示すブロツク図であ
る。 1……掃引信号発生器、2……散乱係数測定
器、3……プローブ、4……被試験回路基板、5
……一時記憶回路、6……中央処理装置、7……
外部記憶装置、8……制御回路、9……テーブ
ル。
The figure is a block diagram showing one embodiment of the present invention. 1... Sweep signal generator, 2... Scattering coefficient measuring device, 3... Probe, 4... Circuit board under test, 5
...Temporary memory circuit, 6...Central processing unit, 7...
External storage device, 8... control circuit, 9... table.

Claims (1)

【特許請求の範囲】 1 被測定パターンが形成された被試験回路基板
と、該被試験回路基板を所定位置に移動する移動
手段と、該被測定パターンの所定箇所に接触して
電気信号の授受を行うプローブと、該プローブに
接続され該被測定パターンに対する入射電力及び
反射電力の係数を測定する散乱係数測定器と、該
散乱係数測定器に信号を供給する広範囲の高周波
数が発生可能な掃引信号発生器と、該散乱係数測
定器から得られた周波数による信号変化を一時記
憶する一時記憶回路と、該一時記憶回路の信号変
化を記憶すると共に比較用データをあらかじめ記
憶している外部記憶装置と、該移動手段、プロー
ブ、散乱係数測定器、掃引信号発生器、一時記憶
回路、外部記憶装置を統合し制御し、外部記憶装
置に記憶された測定結果と比較用データを比較し
て該被測定パターンの物理的形状を検出する中央
処理装置とからなることを特徴とするパターン線
長測定装置。 2 移動手段は、該被測定パターンの測定点を該
プローブの位置まで移動させて接触させる可動機
構が設けられたテーブルと該テーブルの移動を該
中央処理装置の信号に基いて制御する制御回路と
を含む特許請求の範囲第1項記載のパターン線長
測定装置。
[Scope of Claims] 1. A circuit board under test on which a pattern to be measured is formed, a moving means for moving the circuit board under test to a predetermined position, and a means for transmitting and receiving electrical signals by contacting a predetermined location of the pattern to be measured. a scattering coefficient measuring device connected to the probe and measuring coefficients of incident power and reflected power with respect to the pattern to be measured; and a sweep capable of generating a wide range of high frequencies to supply signals to the scattering coefficient measuring device. a signal generator, a temporary storage circuit that temporarily stores the signal change depending on the frequency obtained from the scattering coefficient measuring device, and an external storage device that stores the signal change of the temporary storage circuit and also stores comparison data in advance. , the moving means, the probe, the scattering coefficient measuring device, the sweep signal generator, the temporary storage circuit, and the external storage device are integrated and controlled, and the measurement results stored in the external storage device are compared with the comparison data to determine the target object. A pattern line length measuring device comprising a central processing unit that detects the physical shape of a measurement pattern. 2. The moving means includes a table provided with a movable mechanism for moving the measuring point of the pattern to be measured to the position of the probe and bringing it into contact with the probe, and a control circuit that controls the movement of the table based on a signal from the central processing unit. A pattern line length measuring device according to claim 1.
JP28896586A 1986-12-05 1986-12-05 Apparatus for measuring length of pattern line Granted JPS63142204A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28896586A JPS63142204A (en) 1986-12-05 1986-12-05 Apparatus for measuring length of pattern line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28896586A JPS63142204A (en) 1986-12-05 1986-12-05 Apparatus for measuring length of pattern line

Publications (2)

Publication Number Publication Date
JPS63142204A JPS63142204A (en) 1988-06-14
JPH0584844B2 true JPH0584844B2 (en) 1993-12-03

Family

ID=17737091

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28896586A Granted JPS63142204A (en) 1986-12-05 1986-12-05 Apparatus for measuring length of pattern line

Country Status (1)

Country Link
JP (1) JPS63142204A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102331230B (en) * 2011-06-17 2013-07-10 唐臻宇 Length or angle measuring device and circuit structure thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935875U (en) * 1982-08-31 1984-03-06 三菱重工業株式会社 Wire short circuit detection device
JPS59184866A (en) * 1983-04-05 1984-10-20 General Res Obu Erekutoronitsukusu:Kk Short-circuit determining system
JPS60253882A (en) * 1984-05-30 1985-12-14 Fujitsu Ltd Short-circuited point detector

Also Published As

Publication number Publication date
JPS63142204A (en) 1988-06-14

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