JPH0584143U - Power element short circuit prevention circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] The present invention relates to a short circuit prevention circuit for a power device that can achieve a short circuit prevention reliably with a simple circuit configuration, and is connected in series without using a number of parts having different functions. It is an object of the present invention to provide a short-circuit prevention circuit for a power element, which can prevent the two transistors that have been turned on at the same time and can surely achieve short-circuit prevention. [Structure] A short circuit prevention circuit is provided between a pair of power elements 2a and 2b connected in series and a control circuit 3. The control circuit 3 has two output terminals, the output terminal A being the input terminal of the 3-state buffer 1a and the 3-state buffer 1a.
The output terminal B is connected to the input terminal of the 3-state buffer 2a and the control terminal of the 3-state buffer 1a.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a power element short-circuit prevention circuit, and more particularly to a power element short-circuit prevention circuit capable of reliably achieving short-circuit prevention with a simple circuit configuration.

[0002]

[Prior Art]

 Since the motor needs to perform forward and reverse rotation control, a drive control circuit that includes a configuration in which one end of the motor drive coil is connected to the connection point of two transistors connected in series between the power supply line and ground is adopted. Often. The two transistors connected in series must have the other turned off when one is on, and if both are turned on at the same time, these transistors will be destroyed instantly. I will end up. Therefore, in order to prevent such an inconvenience, conventionally, as shown in FIG. 3, a control signal from the control circuit 100 is applied to the gate of the transistor 102 through the insulating circuit 101, and the gate of the transistor 103 is connected to the transistor. There is known a motor drive control circuit including a short-circuit prevention circuit configured to apply a control signal obtained by inverting a control signal applied to the gate of 102 with an inverter 104 so that both transistors are not turned on at the same time.

[0003]

[Problems to be solved by the device]

 However, the circuit shown in FIG. 3 is incomplete and both transistors may be turned on at the same time due to the propagation delay of the inverter 104. Therefore, various short-circuit prevention circuits have been proposed in order to avoid such inconveniences, but all of them are complicated in circuit configuration and cannot be realized without using components of several different functions. Met.

Therefore, in consideration of the above-mentioned conventional problems, the present invention can prevent two transistors connected in series from being turned on at the same time without using several kinds of parts having different functions. As a result, it is an object of the present invention to provide a short circuit prevention circuit for a power device that can surely achieve short circuit prevention.

[0005]

[Means for Solving the Problems]

 FIG. 1 is a circuit configuration diagram for explaining the present invention. In the figure, three-state buffers 1a and 1b are provided between a pair of power elements 2a and 2b connected in series and a control circuit 3. The control circuit 3 has two output terminals, and the output terminal A is connected to the input terminal of the 3-state buffer 1a and the control terminal of the 3-state buffer 1b. The output terminal B is connected to the input terminal of the 3-state buffer 2a and the control terminal of the 3-state buffer 1a. The drain of the power element 2a is connected to the power supply (Vcc) line, and the source of the power element 2b is connected to the ground line.

[0006]

[Action]

 When the control terminal of the 3-state buffer is at "H" level, the output terminal of the buffer is in the high impedance state, so that the output terminal A of the control circuit 3 is at "H" level and the output terminal B is at "L" level. In case of the level, the output of the 3-state buffer 1a becomes "H" level, and the output of the 3-state buffer 1b becomes ground level, that is, "L" level. Therefore, the power element 2a is turned on and the power element 2b is turned off.

Next, when the output terminal A is at “H” level and the output terminal B is at “H” level, the control terminals of the three-state buffers 1a and 1b are both at “H” level. The output terminals of the three-state buffers 1a and 1b both become "L" level, and the power elements 2a and 2b are both turned off.

When the output terminal A is at "L" level and the output terminal B is at "H" level, the output of the 3-state buffer 1a becomes "L" level and the output of the 3-state buffer 1b becomes It becomes "H" level. Therefore, the power element 2a is turned off and the power element 2b is turned on.

When the output terminal A is at "L" level and the output terminal B is at "L" level, both power elements 2a and 2b are turned off. As described above, since there is no possibility that the power elements 2a and 2b are both turned on, even if there is an overlapping portion when the signals of the output terminals A and B are switched, the power elements 2a and 2b are not changed. Are only turned off together.

[0010]

【Example】

 Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 2 is a circuit diagram showing a part of a motor control circuit including a power element short-circuit prevention circuit of the present invention. In this figure, in this embodiment, three state bus inverters 10a and 10b are used as three-state elements. The control circuit 11 for generating the drive signal has two output terminals, and the output terminal A is connected to the input terminal of the 3-state bus inverter 10a and the control terminal of the 3-state bus inverter 10b. The output terminal B is connected to the input terminal of the 3-state bus inverter 10b and the control terminal of the 3-state bus inverter 10a. The output terminals of the 3-state bus inverters 10a and 10b are connected to the positive terminals of the power sources of the 3-state bus inverters 10a and 10b via pull-up resistors, respectively, and the photocoupler 14a is connected via the current limiting resistors 13a and 13b. , 14b connected to the anode of the LED. The cathodes of these LEDs are connected to the ground line.

On the other hand, the collectors of the phototransistors of the photocouplers 14a and 14b are connected to the gates of the transistors 15a and 15b connected in series between the power source and the ground, and separately provided via pull-up resistors 16a and 16b. It is connected to the plus terminal of the power supply. The phototransistor emitter of the photocoupler 14a is connected to the source of the transistor 15a, and the phototransistor emitter of the photocoupler 14b is connected to the ground line together with the source of the transistor 15b. The drain of the transistor 15b is connected to the source of the transistor 15a. Although not shown, the negative terminal of the power source connected to the pull-up resistor 16a is connected to the emitter of the phototransistor of the photocoupler 14a, and the negative terminal of the power source connected to the pull-up resistor 16b is the ground. It is connected to the line. The positive terminal of a power source other than these power sources is connected to the drain of the transistor 15a. In the figure, the portion surrounded by broken lines constitutes an insulating circuit that electrically insulates the three-state bus inverters 10a and 10b side from the transistors 15a and 15b side.

When the output terminal A of the control circuit 3 is at “H” level and the output terminal B is at “L” level, the output of the 3-state bus inverter 10a becomes “L” level. The output of the state bus inverter 10b becomes "H" level. Therefore, the LED of the photocoupler 14a does not emit light, and the LED of the photocoupler 14b emits light. As a result, the phototransistor of the photocoupler 14a is turned off, so that the gate of the transistor 15a becomes "H" level and the transistor 15a is turned on.

On the other hand, since the phototransistor of the photocoupler 14b is turned on, the gate of the transistor 15b becomes "L" level and the transistor 15b is turned off.

When the output terminal A is at “H” level and the output terminal B is at “H” level, the control terminals of the three-state bus inverters 10a and 10b are both at “H” level. Since the output terminals of the three-state bus inverters 10a and 10b are both at "H" level and the phototransistors of the photocouplers 14a and 14b are both turned on, the transistors 15a and 15b are both turned off.

When the output terminal A is at “L” level and the output terminal B is at “H” level, the output of the 3-state bus inverter 10a becomes “H” level and the 3-state bus inverter 10b. Output becomes "L" level. Therefore, the transistor 15a is turned off and the transistor 15b is turned on.

When the output terminal A is at "L" level and the output terminal B is at "L" level, both the transistors 15a and 15b are turned off. Therefore, neither the transistor 15a nor the transistor 15b is turned on.

[0017]

[Effect of the device]

 As described in detail above, according to the present invention, it is possible to control both power elements connected in series so as not to be turned on at the same time, so that it is possible to surely prevent short circuit of the power elements. .. In addition, since the circuit can be constructed by using the three-state element having a single function as the used parts, it is possible to obtain the short circuit prevention circuit for the power element which is economically and space advantageous.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram illustrating the present invention.

FIG. 2 is a circuit configuration diagram showing a part of a motor control circuit including a power element short circuit prevention circuit of the present invention.

FIG. 3 is a circuit configuration diagram showing an electronic circuit including a conventional short-circuit prevention circuit.

[Explanation of symbols]

 1a 3-state buffer 1b 3-state buffer 2a power element 2b power element 3 control circuit

Claims (1)

[Scope of utility model registration request] 1. A power element short-circuit prevention circuit for preventing a short circuit of at least a power element with respect to a circuit including a pair of power elements connected in series, wherein a pair of three-state elements driving each of the pair of power elements. A power element short-circuit prevention circuit, wherein each of the three-state elements is configured to input a drive signal input to the other three-state element to its control terminal.