JPH0583877B2 - - Google Patents
Info
- Publication number
- JPH0583877B2 JPH0583877B2 JP59004560A JP456084A JPH0583877B2 JP H0583877 B2 JPH0583877 B2 JP H0583877B2 JP 59004560 A JP59004560 A JP 59004560A JP 456084 A JP456084 A JP 456084A JP H0583877 B2 JPH0583877 B2 JP H0583877B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- gate
- circuit block
- input
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H10P74/00—
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59004560A JPS60148138A (ja) | 1984-01-13 | 1984-01-13 | テスト機能を有する集積回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59004560A JPS60148138A (ja) | 1984-01-13 | 1984-01-13 | テスト機能を有する集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60148138A JPS60148138A (ja) | 1985-08-05 |
| JPH0583877B2 true JPH0583877B2 (OSRAM) | 1993-11-29 |
Family
ID=11587425
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59004560A Granted JPS60148138A (ja) | 1984-01-13 | 1984-01-13 | テスト機能を有する集積回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60148138A (OSRAM) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4754215A (en) * | 1985-11-06 | 1988-06-28 | Nec Corporation | Self-diagnosable integrated circuit device capable of testing sequential circuit elements |
| GB2185990B (en) * | 1986-02-05 | 1990-01-24 | Unilever Plc | Margarine fat |
| JPS6348854A (ja) * | 1986-08-19 | 1988-03-01 | Toshiba Corp | システムlsi |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5537924A (en) * | 1978-09-11 | 1980-03-17 | Nec Corp | Integrated circuit |
-
1984
- 1984-01-13 JP JP59004560A patent/JPS60148138A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60148138A (ja) | 1985-08-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3313102B2 (ja) | 回路障害を分離する方法 | |
| KR100245411B1 (ko) | 반도체 장치의 병렬 테스트 회로 | |
| EP0240719B1 (en) | Shift register latch arrangement for enhanced testability in differential cascode voltage switch circuit | |
| US5365528A (en) | Method for testing delay faults in non-scan sequential circuits | |
| US5471152A (en) | Storage element for delay testing | |
| US6591384B1 (en) | Comparable circuits for parallel testing DRAM device | |
| US5912899A (en) | Merged data memory testing circuits and related methods which provide different data values on merged data lines | |
| US4644265A (en) | Noise reduction during testing of integrated circuit chips | |
| JPH0583877B2 (OSRAM) | ||
| US7137050B2 (en) | Compression circuit for testing a memory device | |
| EP0151694B1 (en) | Logic circuit with built-in self-test function | |
| US6105156A (en) | LSI tester for use in LSI fault analysis | |
| US5528604A (en) | Test pattern generation for an electronic circuit using a transformed circuit description | |
| JP2773148B2 (ja) | テスト容易化回路設計方法 | |
| US4604531A (en) | Imbalance circuits for DC testing | |
| JP2867930B2 (ja) | 半導体装置 | |
| Xiaoqing et al. | A testable design of logic circuits under highly observable condition | |
| JPH0772219A (ja) | 半導体論理チップ | |
| JPH01156680A (ja) | 論理回路の故障診断方法 | |
| KR19980028940A (ko) | 조합형 논리회로의 데스트방법 | |
| Wei et al. | Combining the Folding and Testing for Programmable Logic Arrays | |
| Hashizume et al. | IDDQ testable design of static CMOS PLAs | |
| JPH04113580A (ja) | 半導体集積回路装置 | |
| Sivaprakasam | IDDQ Measurement Based Diagnosis of Bridging Faults in Full Scan Circuits | |
| JPH0740060B2 (ja) | オンボードスキャンテスト装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |