JPH0582089B2 - - Google Patents

Description

[Detailed description of the invention] Technical field to which the invention pertains The present invention is directed to a mobile radio, etc., in which the operation of main circuits is stopped during standby in order to save power consumption, and when necessary data is transmitted. The present invention relates to an intermittent oscillation type frequency synthesizer circuit used in an intermittent reception method that is operated only during

Conventional technology The conventional intermittent oscillation frequency synthesizer circuit is
It is constructed as shown in FIG. That is,
The output of the voltage controlled oscillator 1 is frequency-divided by a frequency divider 2, and the output signal of the reference oscillator 3 is divided by a fixed frequency divider 4, and the output signal of the frequency divider 2 is combined with a phase comparator. 5, and the phase comparator 5 outputs a signal for controlling the operation of the charge pump circuit 6 in accordance with the phase difference between the two signals. The charge pump circuit 6 opens and closes the charging/discharging path of the low-pass filter 7 according to the output signal of the phase comparator 5, and charges or discharges the low-pass filter 7 via the switching circuit 8. The output of the low-pass filter 7 is input to the control input of the voltage controlled oscillator 1 to form a phase lock loop. The charging and discharging of the low-pass filter 7 by the charge pump circuit 6 is controlled in a direction that reduces the phase difference, and the voltage controlled oscillator 1 outputs an output signal with a stable frequency. In order to operate the circuit intermittently, when the operation is stopped, the switching circuit 8 is opened under the control of the control circuit 9 to prevent the charge in the low-pass filter 7 from being discharged by the charge pump circuit 6. controlling the power supply circuit 10 to control the frequency divider 2;
Reference oscillator 3, fixed frequency divider 4 and phase comparator 5
We are trying to stop the power supply to. At this time, power is directly supplied to the voltage controlled oscillator 1 from the power supply 11, and the voltage controlled oscillator 1 continues to oscillate independently under frequency control by the voltage charged to the low pass filter 7. When necessary, the switching is performed after restarting the power supply from the power supply circuit 10 to the frequency divider 2, reference oscillator 3, fixed frequency divider 4, phase comparator 5, etc. under the control of the control circuit 9. By closing the circuit 8, the operation of the phase lock loop is restarted. The above-mentioned conventional intermittent oscillation type frequency synthesizer circuit has the disadvantage that the voltage controlled oscillator 1 does not stop operating even when the phase-locked loop stops operating, so power consumption is large during the stopping period.

As shown in FIG. 2, there is also a circuit in which power for operating the voltage controlled oscillator 1 is also supplied from a power supply circuit 10, and the output of a charge pump circuit 6 is directly connected to a low-pass filter 7. In this case, the power consumption while the operation is stopped is small, but since the control voltage charged in the low-pass filter 7 is discharged through the output circuit of the charge pump circuit 6, the power consumption is small when the operation is stopped. It has the disadvantage that it takes a long time to synchronize with the previous oscillation frequency, and the rise speed is slow.

OBJECT OF THE INVENTION The object of the invention is to solve the above-mentioned conventional drawbacks and
An object of the present invention is to provide an intermittent oscillation type frequency synthesizer circuit which consumes less power while stopped and has a fast rise speed when restarting operation.

Structure of the Invention The intermittent oscillation type frequency synthesizer circuit of the present invention includes a voltage controlled oscillator whose oscillation frequency is controlled by a control input voltage, a frequency divider that divides the output of the voltage controlled oscillator, and a highly stable standard. an oscillator, a fixed frequency divider that divides the output of the reference oscillator, and a signal that compares the output of the frequency divider and the output of the fixed frequency divider and controls the operation of the charge pump circuit described later according to the phase difference. a charge pump circuit that opens and closes a charging/discharging path of a low-pass filter (described later) according to an output signal of the phase comparator; and a low-pass filter including a capacitor that is charged and discharged by the output of the charge pump circuit. An intermittent oscillation type frequency synthesizer circuit configured to intermittently operate a phase lock loop in which the oscillation frequency of the voltage controlled oscillator is controlled by the output voltage of the low pass filter, the voltage controlled oscillator, the frequency divider a power supply circuit that supplies operating power to the charge pump circuit, reference oscillator, fixed frequency divider, and phase comparator; and a charging circuit that cuts off the output of the charge pump circuit and the low-pass filter to stop charging and discharging the low-pass filter. comprising a discharging stop means and a control circuit that controls the operation of the charge/discharge stop means and the power supply circuit, and when the operation is stopped, power supply to the power supply circuit is stopped after operating the charge/discharge stop means. and when restarting the operation, the charging/discharging stopping means is restored after restarting the power supply to the power supply circuit.

Embodiments of the Invention Next, the present invention will be described in detail with reference to the drawings.

FIG. 3 is a block diagram showing one embodiment of the present invention. That is, the output of the voltage controlled oscillator 1 is frequency-divided by the frequency divider 2, and the output of the reference oscillator 3 is frequency-divided by the fixed frequency divider 4.
The phase comparator 5 compares the phase with the output of the charge pump circuit 6, and the phase comparator 5 outputs a signal for controlling the operation of the charge pump circuit 6 according to the phase difference. Depending on the output signal of the phase comparator 5, the charge pump circuit 6 turns on the charging path of the low-pass filter 7 via the switching circuit 8 to charge the low-pass filter 7, or turns on the discharge path of the low-pass filter 7 to discharge the charge. . The output of the low-pass filter 7 is inputted to the control input of the voltage controlled oscillator 1 to form a phase lock loop. Charge pump circuit 6
The charging and discharging of the low-pass filter 7 by
outputs an output signal with a stable frequency.
The above is the same as the conventional example shown in FIG.

However, in this embodiment, power for operating the voltage controlled oscillator 1, frequency divider 2, reference oscillator 3, fixed frequency divider 4, and phase comparator 5 is all supplied from the power supply circuit 10. After the switching circuit 8 is opened under the control of the control circuit 9', the power supply circuit 10 is controlled to stop the power supply to the voltage controlled oscillator 1, frequency divider 2, etc. The switching circuit 8 can be easily constructed using, for example, a MOS transistor as shown in FIG. Since the control input of the voltage controlled oscillator 1 has an extremely high impedance, when the switching circuit 8 is open, the charge that has been stored in the low-pass filter 7 immediately before is held as is. That is, in this embodiment, the switching circuit 8 constitutes "charging/discharging means for interrupting the output of the charge pump circuit 6 and the low-pass filter 7 to stop charging/discharging of the low-pass filter 7". . Therefore, the control voltage immediately before the operation is stopped is input as is to the control input of the voltage controlled oscillator 1. However, since power is not supplied during operation, the oscillation operation of the voltage controlled oscillator 1 is stopped. Therefore, there is an effect that power consumption while the operation is stopped can be extremely reduced.

To restart the operation, first, the power supply circuit 10 resumes power supply under the control of the control circuit 9', and the voltage controlled oscillator 1 resumes oscillation at the same frequency as immediately before stopping, and the output of the voltage controlled oscillator 1 is frequency-divided by frequency divider 2 and compared with the output of fixed frequency divider 4, and phase comparator 5 controls charging and discharging of low-pass filter 7 via charge pump circuit 6 according to the phase difference. Since the control voltage immediately before stopping is held in the low-pass filter 7, the oscillation frequency of the voltage-controlled oscillator 1 can be stabilized in a short time. That is, this embodiment has the advantage that power consumption during stoppage is low and the startup speed when restarting operation is fast.

FIG. 5 is a block diagram showing another embodiment of the invention. In this case, a level holder 12 is connected between the phase comparator 5 and the charge pump circuit 6 instead of the switching circuit 8 shown in FIG. The level holder 12 is configured by a combination of an AND circuit, an OR circuit, and an inverting circuit as shown in FIG. The output A' is set to high level and the output B' is set to low level, regardless of control signals A and B. When A' is at a high level, the charge pump circuit 6 turns off the charging path of the low-pass filter 7, and when B' is at a low level, the charge pump circuit 6 turns off the discharging path of the low-pass filter 7. Therefore, when a high level control signal C is input to the level holder 12, both the charging path and the discharging path of the charge pump circuit 6 are turned off. That is, the output of the charge pump circuit 6 and the low-pass filter 7 are substantially cut off. That is, level holder 1
Reference numeral 2 constitutes a "charging/discharging stop means that cuts off the output of the charge pump circuit 6 and the low-pass filter 7 to stop charging/discharging of the low-pass filter 7." It goes without saying that when the input control signal C is at a low level, the signals A and B input from the phase comparator 5 are input as they are to the charge pump circuit 6 for normal operation. That is, when the signal A is at a low level, the charging path of the low-pass filter 7 is turned on and the voltage of the low-pass filter 7 increases, and when the signal B is at a high level, the charging path of the low-pass filter 7 is turned on. As the voltage of the low-pass filter 7 decreases, the oscillation frequency of the voltage-controlled oscillator 1 is controlled. This control is of course performed in such a direction that the output of the voltage controlled oscillator 1 has a predetermined frequency.

To stop the operation, the control signal C from the control circuit 9' is input to the level holder 12 at a high level to substantially cut off the output of the charge pump circuit 6 and the low-pass filter 7, and then the power supply circuit 10 to stop the power supply. While the operation is stopped, the charging voltage of the low-pass filter 7 immediately before the stop is maintained, but the voltage controlled oscillator 1,
The frequency divider 2 and the like are not supplied with power and consume no power. When the operation is resumed, first, the power supply circuit 10 starts supplying power to restart the operation of the voltage controlled oscillator 1, the frequency divider 2, etc., and then the control signal C is set to low level and the phase comparator 5 The outputs A and B may be input to the charge pump circuit 6 as they are. Since the low-pass filter 7 retains the control voltage immediately before the operation stops, it is possible to perform stable operation quickly as in the above-mentioned embodiment, and the effect is that power consumption during the stop is reduced. has.

Effects of the Invention As described above, the present invention is provided with a charging/discharging means for stopping charging/discharging of the low-pass filter by cutting off the output of the charge pump circuit and the low-pass filter, and when the operation is stopped, the charging/discharging is stopped. a voltage controlled oscillator after isolating the low pass filter from the charge pump circuit by means;
The supply of operating power to the frequency divider, reference oscillator, etc. is stopped, and when the operation is resumed, the charging/discharging stop means is restored after restarting the supply of operating power to the voltage controlled oscillator, frequency divider, etc. Since the charging and discharging of the low-pass filter is controlled according to the output signal of the phase comparator, the startup speed when restarting operation is fast, and the power consumption when the operation is stopped can be reduced. There is.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional intermittent oscillation frequency synthesizer circuit, FIG. 2 is a block diagram showing another example of a conventional intermittent oscillation frequency synthesizer circuit, and FIG. 3 is an embodiment of the present invention. 4 is a circuit diagram showing a configuration example of the switching circuit of the above embodiment, FIG. 5 is a block diagram showing another embodiment of the present invention, and FIG. 6 is a level holder of the above embodiment. FIG. 2 is a logic circuit diagram showing the configuration of FIG. In the figure, 1: voltage controlled oscillator, 2: frequency divider, 3: reference oscillator, 4: fixed frequency divider, 5: phase comparator, 6: charge pump circuit, 7: low pass filter, 8: switching circuit, 9, 9': Control circuit, 10: Power supply circuit, 11: Power supply, 1
2: Level holder.

Claims (1)

[Claims] 1. A voltage controlled oscillator whose oscillation frequency is controlled by a control input voltage, a frequency divider that divides the output of the voltage controlled oscillator, a highly stable reference oscillator, and a reference oscillator. a fixed frequency divider that divides the output; and a phase comparator that compares the output of the frequency divider with the output of the fixed frequency divider and outputs a signal for controlling the operation of the charge pump circuit described later according to the phase difference. , a charge pump circuit that opens and closes a charging/discharging path of a low-pass filter described later in accordance with an output signal of the phase comparator, and a low-pass filter including a capacitor that is charged and discharged by the output of the charge pump circuit, the low-pass filter comprising: In an intermittent oscillation type frequency synthesizer circuit configured to intermittently operate a phase lock loop in which the oscillation frequency of the voltage controlled oscillator is controlled by the output voltage of the voltage controlled oscillator, a frequency divider, a reference oscillator, a fixed frequency a power supply circuit for supplying operating power to a frequency converter and a phase comparator; a charge/discharge stop means for interrupting the output of the charge pump circuit and the low-pass filter to stop charging/discharging of the low-pass filter; and a control circuit for controlling the operation of the power supply circuit, and when the operation is stopped, the charge and discharge stop means is operated and then the power supply is stopped to the power supply circuit, and when the operation is restarted, the power supply circuit is configured to stop the power supply. An intermittent oscillation type frequency synthesizer circuit, characterized in that the charging/discharging stopping means is restored after restarting power supply to the power supply circuit. 2. The intermittent oscillation type frequency synthesizer circuit according to claim 1, wherein the charge/discharge stop means is constituted by a switching circuit connected between the charge pump circuit and the low-pass filter. . 3. The intermittent oscillation type frequency synthesizer circuit according to claim 1, wherein the charge/discharge stop means is constituted by a level holder inserted between the phase comparator and the charge pump circuit. Something to do.