JPH0581446A - Internal/external rom switching system for microcontroller - Google Patents

Abstract

PURPOSE:To provide the internal/external ROM switching system of a microcontroller which easily extends the function of the microcontroller and improves the use efficiency of a memory. CONSTITUTION:An external ROM 1 and a chip computer 3 which switches the memory to an internal ROM 2 or the external ROM 1 in accordance with a signal SW applied to an internal/external ROM switching terminal T and is operated are provided. A switching control part 4 is provided which receives the internal/external ROM switching request due to manual operation or program operation to activate the reset signal to the chip computer 3 and changes the signal SW applied to the internal/external ROM switching terminal T and inactivates the reset signal, and the chip computer 3 switches plural application programs and is operated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an internal / external ROM switching system for a microcontroller, and more particularly to an external RO.
The present invention relates to an internal / external ROM switching system of a microcontroller including M and a chip computer that can operate by switching to an internal ROM or an external ROM by a signal applied to a predetermined terminal.

Today, microcontrollers are at the center of control of all devices, and the functions required for microcontrollers are diversifying and expanding. Therefore, it is desired to provide a microcontroller that facilitates the program development of such a microcontroller and that realizes a plurality of types of control with one microcontroller.

[0003]

2. Description of the Related Art FIG. 4 is a block diagram of a conventional microcontroller. In the figure, 1 is an external ROM provided as necessary, 2 is an internal ROM, 3 is an internal ROM depending on a signal level applied to an internal / external ROM switching terminal T. ROM2 or external R
Chip computer that can operate by switching to OM1 3
1 is a CPU of a chip computer, 32 is a selector, 3
3, 34 are input / output ports (I / O), 35 is CPU 31
It is a common bus.

When the internal / external ROM switching terminal T is at the V _CC level (open), the selector 32 is connected to the a side, and the CPU 31 can control the equipment according to the application program of the internal ROM 2. Also inside / outside R
When the OM switching terminal T is at the GND level, the selector 32
Is connected to the b side, and the CPU 31 can control the device according to the application program of the external ROM 1.

Conventionally, only the internal ROM 2 or only the external ROM 1 is used by fixing the internal / external ROM switching terminal T to the V _CC level or the GND level. However, if it is fixed to use only the internal ROM 2, it is difficult to expand the function of the microcontroller because the memory capacity of the internal ROM 2 is limited. Also external R
If the use of only the OM1 is fixed, the internal ROM 2 is not used and the efficiency of use of the memory is reduced.

[0006]

As described above, in the conventional microcontroller, the use of only the internal ROM 2 or the use of the external ROM 1 is fixed, so that it is difficult to expand the function of the microcontroller, and Use efficiency was lowered. It is an object of the present invention to facilitate the function expansion of the microcontroller and improve the memory usage efficiency by using the internal / external RO of the microcontroller.
It is to provide an M switching method.

[0007]

The above problems can be solved by the structure shown in FIG. That is, the internal / external ROM switching method of the microcontroller of the present invention is such that
Internal RO by the signal SW applied to the external ROM switching terminal T
In the internal / external ROM switching system of the microcontroller provided with the chip computer 3 which can be operated by switching to the M2 or the external ROM 1, the reset signal RS for the chip computer 3 is received in response to a request for the internal / external ROM switching manually or by a program operation. The chip computer 3 operates by switching a plurality of application programs, which is provided with a switching control unit 4 for energizing, then changing the signal SW applied to the internal / external ROM switching terminal T, and then deactivating the reset signal RS. It is a thing.

[0008]

In FIG. 1, the CPU 31 has an internal ROM according to the level of the signal SW applied to the internal / external ROM switching terminal T.
2 or the external ROM 1 can be switched to operate. Therefore, the application program A is previously stored in the internal ROM 2 and the application program B is stored in the external ROM 1.
For example, first, the CPU 31 is started from a predetermined address of the program A in the internal ROM 2 to realize the device control A. In this state, by pressing switch 5,
Alternatively, when a request for switching the internal / external ROM is generated by the control of the program A using the input / output port 33, the switching control unit 4 which receives the request activates the reset signal RS to the chip computer 3, and then the internal / external ROM. ROM switching terminal T
The signal SW applied to the signal is changed, and then the reset signal RS is deactivated. As a result, the CPU 31 suspends the execution of the program A, and subsequently rises from the predetermined address of the program B in the external ROM 1 to realize the device control B.
Further, in this state, when the switch 5 is pressed again or the request for the internal / external ROM switching is generated by the control of the program B using the input / output port 33, the device control B returns to the device control A in the same manner as described above. . Therefore,
The control function of the microcontroller is doubled and the efficiency of memory usage is improved.

[0009]

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Note that the same reference numerals denote the same or corresponding parts throughout the drawings. FIG. 2 is a block diagram of the microcontroller of the embodiment, where 1 is a maximum of 6
4 Kbyte external ROM, 2 internal ROM, 3 for example, Intel 8751 series 8-bit 1-chip computer, 31 CPU of chip computer, 32 selector, 33a latch circuit constituting input / output port 33,
Reference numeral 34 is an input / output port (I / O), 35 is a common bus of the CPU 31, 36 is a program address bus, 37a is a latch circuit which constitutes the input / output port 37, I is an inverter circuit, and B is a buffer circuit of 3-state output. is there. Furthermore,
4 is a switching control unit and 41 to 44 are flip-flops (F
F) and OR are OR gate circuits, and 5 is a manually operated switch.

If the signal (SW) applied to the internal / external ROM switching terminal T (terminal EA in the case of the Intel 8751 series chip computer) is at the HIGH level, the CPU 3
1 operates according to the program of the internal ROM 2.
In this state, the CPU 31 can send the internal / external ROM switching request signal RQ to the switching control unit 4 via the port terminal P1. That is, the latch circuit 33a latches the bit data RQ of the bus 35 by the latch load signal LL of the CPU 31, and the output Q of the latch circuit 33a is output to the port terminal P1 by the output latch signal OL.

Generally, the signal at the port terminal P1 is read into the bus 35 by the read pin signal RP and temporarily latched by the latch circuit 33a if necessary. Then, the CPU 31 can output a read latch signal RL when necessary and take in data from the outside. Each of the input / output ports 33, 34, 37 is composed of each 8-bit latch circuit as described above, and the CPU 31 can control an external device via the input / output port 34 among them.

By the way, when the signal SW applied to the internal / external ROM switching terminal T is at the HIGH level, the selector 32
Are connected to the a side, and each 8-bit port terminal P0,
P2 can be used as the input / output port terminal as described above. However, in this embodiment, the external ROM 1 is connected to the port terminals P0 and P2 and is not used as an input / output port terminal. Rather, it makes sense when: That is, the signal SW applied to the internal / external ROM switching terminal T is LO
At the W level, the selector 32 connects to the side b and deactivates the internal ROM 2. As a result, the 16-bit program address of the bus 36 is transferred to the port terminals P0 and P2.
Is sent to the external ROM1 via the
The bit read data is read into the bus 35 by the read pin signal RP via the port terminal P0. Thus, thereafter, the program of the CPU 31 is fetched from the external ROM 1.

Therefore, the application program A is stored in the internal ROM 2 in advance and the application program B is stored in the external ROM 1, and the CPU is loaded from a predetermined address of the program A in the internal ROM 2 by, for example, turning on the power.
31 is started up and the device control A is realized. In this state,
By pressing the switch 5, or the input / output port 33a
When a request RQ for switching the internal / external ROM is generated by the control of the program A using, the switching control unit 4 which receives the request RQ
Outputs the reset signal RS and the signal SW to the chip computer 3 at the timing shown in FIG. That is, first, the reset signal RS is activated, and then the inner / outer RO
The signal SW applied to the M switching terminal T is changed, and then the reset signal RS is deenergized. As a result, the CPU 31 executing the program A and its peripheral circuits are temporarily reset, and after the reset signal RS is deenergized, the CPU 31 rises from a predetermined address of the program B of the external ROM 1 to continuously realize the device control B. In this case, the signal GA having a timing corresponding to the reset signal RS is also input to the buffer circuit B that outputs a signal to the external device to prevent the output of the device control signal for a predetermined time during the program switching. Is preferred. Then, in this state, by pressing the switch 5 again, or the input / output port 3
Internal / external RO by control of program B using 3a
When the M switching request RQ is generated, the device control B returns to the device control A in the same manner as described above.

Therefore, for example, if the switch 5 is used as a function changing key of the equipment, the control function of the microcontroller is expanded to twice as much as the equipment control A and B by the operation of the switch 5 and any ROM is used. Since it is used, memory usage efficiency is improved. Or internal RO
When the application program A of M2 has already been developed and the application program B which is an upgraded version is developed, the programs A and B can be easily switched on the same device to control the devices A and B.
Therefore, it is possible to easily compare the difference in the function and the difference in the processing speed due to the improvement of the program B, and it becomes easier to develop the program of the microcontroller.

Further, by program control using the input / output port 33a, the internal / external R is changed from the state of the device control A.
When the OM switching request RQ is issued and the device control B is automatically jumped, or when the internal / external ROM switching request RQ is issued from the state of the device control B to automatically jump to the device control A, for example, Normally, the device control A by the internal ROM 2 is used for normal device control, and if any abnormality is found in the device, it is automatically switched to the maintenance mode control B by the external ROM 1 to collect information for abnormality analysis. Is also possible. Then, if it is not a serious abnormality, the collected information is stored in the RAM (not shown) and the process returns to the device control A.
It is also possible to continue the device control A until the maintenance staff comes.

[0016]

As described above, according to the present invention, the reset signal RS to the chip computer 3 is activated in response to the request for the internal / external ROM switching by the manual operation or the program operation, and then the internal / external ROM switching terminal. Signal S added to T
Since the chip computer 3 operates by switching a plurality of application programs by including the switching control unit 4 that changes W and then deactivates the reset signal RS, it facilitates the program development of the microcontroller and This has the effect of facilitating function expansion and improving memory usage efficiency.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a block diagram of a microcontroller according to an embodiment.

FIG. 3 is an operation timing chart of a switching control unit.

FIG. 4 is a block diagram of a conventional microcontroller.

[Explanation of symbols]

 1 External ROM 2 Internal ROM 3 Chip computer 4 Switching control unit

Claims (1)

[Claims] 1. An internal ROM according to an external ROM (1) and a signal (SW) applied to an internal / external ROM switching terminal (T).
(2) or an internal / external ROM switching method of a microcontroller equipped with a chip computer (3) capable of operating by switching to the external ROM (1), in response to a request for internal / external ROM switching manually or by a program operation, the chip A switching control unit for energizing a reset signal (RS) to the computer (3), changing a signal (SW) applied to the internal / external ROM switching terminal (T) next, and then deactivating the reset signal (RS). An internal / external ROM switching method for a microcontroller, comprising: (4), wherein the chip computer (3) operates by switching a plurality of application programs.