JPH0581070A - Programmable controller and user program execution method in programmable controller - Google Patents

Abstract

PURPOSE:To generate the interruption processing of a system program at an arbitrary brake point address without deteriorating the execution efficiency of an instruction and without restricting the number of brake points at the time of executing user programs. CONSTITUTION:Flags showing whether the interruption processing of the system program are generated or not before or after the execution of instruction words are set in a flag memory (FLM) 15 for the respective instruction words of the user program stored in a user program memory (UM) 14. Then, MPU 14 reads the instruction word and the flag which corresponds to the instruction word and which is set in the flag memory 15 at the time of executing the user program. When the flag shows the interruption processing of the system program, the execution of the user program is stopped before or after execution, and the interruption processing of the system program is executed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable controller (hereinafter referred to as a PC) for executing a user program including a plurality of command words set by a user, and a user program execution method for such a PC.

[0002]

2. Description of the Related Art Conventionally, when a user program is executed on a PC, as shown in FIG. 3, the MPU 1 fetches the contents of the user program stored in a user program memory (UM) 4 as needed and directly or indirectly. RAM3 as a work memory etc.
Was stored in. The ROM 2 stores a system program for the MPU 1 to perform main processing such as debugging and interrupt processing such as monitoring and data tracing.

[0003]

By the way, when debugging a user program, the debug operation is stopped at an arbitrary address (hereinafter referred to as a break point address), and an I / O is performed by an interrupt process of the system program.
There is a case where input / output data stored in the O memory is monitored or data trace is performed.

However, in the conventional PC, since the address of each instruction word is monitored by software or hardware in order to generate the interrupt processing of the system program at an arbitrary breakpoint address, the address monitoring by software is performed. In this case, the instruction execution efficiency is reduced, but in the case of address monitoring by hardware, it is necessary to provide a register for storing the breakpoint address, and the number of breakpoints is limited by the number of registers. Occurs.

Therefore, the present invention has been made in view of such a problem. When the user program is executed, the efficiency of instruction execution is not lowered, and the number of breakpoints is not limited. It is an object of the present invention to provide a PC capable of generating an interrupt process of a system program and a user program execution method in the PC.

[0006]

In order to solve the above problems, according to the invention of claim 1, a system program memory storing a system program including a predetermined interrupt process and a main process, and a plurality of instructions set by a user. Corresponding to each user program memory storing a user program consisting of words, and each command word of the user program stored in the user program memory, an interrupt process of the system program is generated before or after the execution of each command word. And a flag memory in which a flag indicating whether or not to execute is set, and when the user program is executed by the main processing of the system program, an instruction word and a flag of the flag memory corresponding to the instruction word are read out, and the flag is the system program. If it shows the interrupt processing of
And a processor that stops the execution of the user program before or after the execution of the instruction word and executes the interrupt process of the system program.

In order to achieve the above object, in the invention according to claim 2, when a user program consisting of a plurality of command words set by the user is executed by a system program consisting of a predetermined interrupt processing and main processing. In a user program execution method in a programmable controller, a flag indicating whether to generate an interrupt process of the system program before or after execution of the instruction word is set in advance for each instruction word of the user program, When the user program is executed by the main processing of the program, the instruction word and the flag corresponding to the instruction word are read, and if the flag indicates the interrupt processing of the system program, the user may execute the instruction word before or after the execution. Stop the execution of the program and Executing the write process, characterized in that.

[0008]

In the present invention, each instruction word of the user program is set with a flag indicating the presence or absence of interrupt processing of the system program, and the main processing of the system program causes the instruction word of the user program and the corresponding flag after the instruction to be set. Since it is read, if the flag at that time indicates that the interrupt processing of the system program has occurred, the execution of the user program is stopped before or after the execution of the instruction word, and the interrupt processing of the system program is stopped. Run.
Therefore, the number of breakpoints can be set as many as the number of instruction words, and the interrupt processing on the user program can be performed with an arbitrary instruction word.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a PC according to the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of the PC of this embodiment. As shown in the figure, this PC includes a processor (hereinafter referred to as MPU) 11 that performs calculation and control in the PC, and an MPU.
A ROM 12 in which a system program for executing main processing such as debugging and interrupt processing such as monitoring and data tracing is stored in 11, an I / O memory for storing input / output data, and data calculated by the MPU 11 are stored. RAM13 used as work memory
And a user program memory (UM) 14 in which a user program consisting of a plurality of consecutive instruction words arbitrarily set by the user is stored, and a flag memory (FLM) 13 in which a flag described later is set.

FIG. 2 shows storage areas of the user program memory 14 and the flag memory 15. The user program memory 14 is provided with an area for storing each instruction word, while the flag memory 15 is provided with an area for storing a 1-bit flag corresponding to each instruction word. An address is set for each instruction word of the user program, and the same address as the corresponding instruction is set for the flag of the flag memory 15, and the MPU 11 specifies the address and sets the address of the user program. When reading each instruction word, the flag corresponding to each instruction word is also accessed to read the flag.

Further, the setting of each flag is set by the user in advance, and the flag "1" is set to the breakpoint (BP), that is, the instruction word for generating the interrupt processing of the system program, while the main processing is performed as it is. The flag "0" is set to the instruction word to be executed by.

In the PC configured as described above, the MP
When U11 executes the user program, for example, as shown in FIG.
As shown in, when the "instruction word 2" and the "instruction word 5" are designated as the breakpoints "BP1" and "BP2", respectively, and the flag "1" is set, the instruction of those breakpoints is set. After executing the word, the execution of the user program by the main process is stopped, and the interrupt process of the system program is executed. Then, after the interrupt processing is completed, the state before the interrupt is restored and the execution of the user program by the main processing of the system program is restarted.

Therefore, in this embodiment, the address of each instruction word of the user program is not monitored by software or hardware, and the interrupt processing of the system program is generated by the flag set corresponding to each instruction word. Therefore, the number of breakpoints can be set by the number of instruction words without deteriorating the execution efficiency of the instruction, and the interrupt processing of the system program can be generated by an arbitrary instruction word.

Therefore, when the user program is debugged, etc., the execution of the user program is stopped at an arbitrary address, and the RAM 1 is executed by the interrupt processing of the system program.
The contents of the I / O memory in 3 and the like can be read out to efficiently perform monitoring, data trace and the like.

If the instruction execution part of the MPU 11 is pipelined, the instruction word currently being executed is read together with the flag corresponding to the instruction word at the time of execution of the instruction word at least one before that. If the flag of the instruction word that is the breakpoint is "1" indicating the interrupt processing of the system program, the interrupt processing of the system program occurs before the instruction word is executed, and the interrupt processing ends. After that, execution returns to the state before the interrupt and the execution of the user program resumes from the next instruction that was interrupted, and the overhead time during debugging is almost eliminated.

In this embodiment, a flag memory is provided,
Although a 1-bit flag indicating whether or not the interrupt processing of the system program is generated is set for each instruction word, the flag set corresponding to each such instruction word is not 1 bit in the present invention. It may be several bits, of course, and such a flag may be set in a partial area of the user program memory without newly providing a flag memory, or a flag may be set in the frame of each instruction word.

[0018]

As described above, according to the present invention, a flag indicating the presence / absence of interrupt processing of the system program is set in each instruction word of the user program, and the instruction word of the user program is used during the main processing of the system program. In addition, since the corresponding flag is read after the instruction, if the flag indicates the interrupt processing of the system program, the execution of the user program is stopped before or after the execution of the instruction word, and the system program is stopped. The interrupt processing of can be executed.

Therefore, at the time of debugging the user program, the execution of the user program is stopped at an arbitrary address, and the contents of the I / O memory in which the input / output data is stored are read by the interrupt processing of the system program. It is possible to efficiently monitor the contents and data trace.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a PC according to the present invention.

FIG. 2 is a memory map showing storage areas of a user program memory and a flag memory.

FIG. 3 is a block diagram showing a schematic configuration of a conventional PC.

[Explanation of symbols]

 11 Processor (MPU) 12 System Program Memory (ROM) 14 User Program Memory (UM) 15 Flag Memory (FLM)

Claims (2)

[Claims] 1. A system program memory in which a system program including predetermined interrupt processing and main processing is stored, a user program memory in which a user program including a plurality of command words set by a user is stored, and the user program memory in the user program memory. A flag memory in which a flag indicating whether to generate an interrupt process of the system program before or after execution of each instruction word corresponding to each instruction word of the stored user program, and the system program When the user program is executed by the main processing of step 1, the instruction word and the flag of the flag memory corresponding to the instruction word are read out, and if the flag indicates the interrupt processing of the system program, before execution of the instruction word. Or after execution, stop the execution of the user program and A programmable controller comprising: a processor that executes interrupt processing of a program. 2. A user program execution method in a programmable controller for executing a user program consisting of a plurality of instruction words set by the user by a system program consisting of predetermined interrupt processing and main processing, and each instruction of the user program. A flag indicating whether to generate an interrupt process of the system program before or after the execution of the command word is set in advance, and when the user program is executed by the main process of the system program, If the flag corresponding to the instruction word is read and the flag indicates the interrupt processing of the system program, the execution of the user program is stopped before or after the execution of the instruction word, and the interrupt processing of the system program is executed. Programmable, characterized by User program execution method in the controller.