JPH0580760B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a precharge circuit using an insulated gate field effect transistor (hereinafter abbreviated as IGFET).

Conventional configuration and its problems In order to write data to and read data from memory cells faster,
What has been done is to precharge a pair of complementary bit lines, ie, one bit line to another bit line, to a potential close to the voltage source and simultaneously shorten them to the same potential.

FIG. 1 shows a conventional precharge circuit.
(In the figure, the part surrounded by the dotted line is the precharge circuit.) This circuit consists of a bit line, a bit line, and
It is composed of an MIS type transistor, which is a typical example of an IGFET, and the bit line Bi and the bit line are
Connected to the source and drain of MIS type P-channel transistor 1, and individually
It is connected to each drain of MIS type transistors 2 and 3. The gates of MIS type transistors 1 to 3 are all connected to signal source a, and the same clock pulse φ _p1 is applied thereto.

Initially, there is a potential difference between the bit line Bi and the bit line. At this time, the clock pulse φ _p1 is
When it becomes "high level", MIS type transistor 1
is turned on, and charge is transferred between the bit line Bi and the bit line through the MIS type P channel transistor 1, and the potential becomes equal. At this time, with the same clock pulse φ _p1 ,
The MIS type P channel transistors 2 and 3 are also turned on, respectively, and serve to raise the potential of both the bit line Bi and the bit line.

In FIG. 1, MIS type P channel transistors 4 and 5 and MIS type N channel transistors 6 to 8
The circuit consisting of is a sense amplifier. When clock pulse φ _p1 is at "low level", the precharge circuit does not operate.

At this time, when the clock pulse φ _L1 applied from the signal source b becomes "high level", this sense amplifier operates and the potentials of the bit line Bi and the bit line are amplified.

However, since there is one set of precharge circuits for each two bit lines, the area occupied by the precharge circuits is quite large, which poses a problem in further reducing the chip size.

OBJECTS OF THE INVENTION The present invention provides a precharge circuit which aims to reduce the chip size with a simpler circuit by having the precharge circuit also serve as a part of the sense amplifier circuit.

Structure of the Invention The present invention provides a voltage source, first and second bit lines having capacitance, a gate connected to the first bit line, a drain connected to the second bit line, and a source connected to the second bit line. is connected to the voltage source.
a second insulated gate field effect transistor having a gate connected to the second bit line, a drain connected to the first bit line, and a source connected to the voltage source. and a third insulated gate field effect transistor whose source and drain are connected to the first and second bit lines, respectively, and whose gate is connected to an external signal source. This makes it possible to simplify the circuit and reduce the chip size.

DESCRIPTION OF EMBODIMENTS FIG. 2 is a unit configuration diagram of a circuit according to an embodiment of the present invention. A bit line Bj having a capacitance, a first MIS type P channel transistor 10 having a gate connected to the bit line Bj, a drain connected to the bit line, and a source connected to a voltage source _VD , A second MIS type P channel transistor 11 has a gate connected to a bit line, a drain connected to a bit line Bj, and a source connected to a voltage source V _D , and a source and drain connected to a bit line Bj and a bit line Bj, respectively. A third MIS type P channel transistor 9 whose gate is connected to a signal source C applying a clock pulse φ _p2
A pre-charge circuit is constructed. The part surrounded by the chain line in the figure is the precharge circuit.

The first to third MIS type transistors 9 to 11 are
Since it is a P-channel enhancement type, it is turned on when the gate voltage is at a "low level".

Initially, there is a potential difference between the bit line Bj and the bit line, and the MIS type P channel transistor 10 or 11 whose gate is connected to the bit line with the lower potential turns on first, and the voltage source is turned on.
Charge is supplied from V _D and it is in this on state.
MIS type P channel transistor 10 or 11
The potential of the bit line connected to the drain of the bit line increases. Due to this operation, the bit line with a higher potential becomes a higher potential.

Here, when the clock pulse φ _p2 becomes "low level", the MIS type transistor 9 is turned on, and charge is transferred between the bit line Bj and the bit line, so that the bit line Bj and the bit line are at the same potential. Become. At this time, charge is supplied from the voltage source V _D , and the potential of the two bit lines increases while remaining short.

Comparing FIG. 1, which shows a conventional precharge circuit and sense amplifier, with FIG. 2, which shows an embodiment of the present invention, MIS type P channel transistors 10 and 11 in FIG. In the figure, MIS type transistors 2 and 3 as a precharge circuit,
MIS type transistors 4, 5 as sense amplifiers
It can be seen that this corresponds to

That is, the MIS type P channel transistors 10 and 11 of this embodiment are connected to a pair of bit lines (bit lines).
It has both the function of precharging the Bj and bit lines) and the function of a sense amplifier.

As described above, according to this embodiment, the first and second
By allowing the MIS type P-channel transistors 10 and 11 to function as both a precharge circuit and a sense amplifier, the overall circuit becomes simpler and the chip size can be reduced.

Effects of the Invention According to the present invention, in a conventional precharge circuit, a pair of bit lines is coupled to the drain, the same voltage source is connected to the source, and the same external signal source is connected to the gate. By removing the two MIS transistors that turn on when connected and applying a clock pulse generated by the signal source, a part of the sense amplifier circuit (the source is connected to the same voltage source and the drain is connected to the bit line) is removed. MIS-type P-channel transistors whose gates are connected to the bit lines and MIS-type P-channel transistors whose drains are coupled to the bit lines and whose gates are connected to the bit lines respectively) function as a precharge circuit. By also serving as a circuit, the circuit can be simplified and the chip size can also be reduced.

Since the precharge circuit is coupled to a pair of bit lines (one bit line and one bit line), it occupies a large proportion of the chip as a whole. Therefore, the effects of circuit simplification and size reduction according to the present invention are very large.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional precharge circuit and a sense amplifier section, and FIG. 2 is a unit block diagram of an embodiment according to the present invention. 1 to 5, 9 to 11... MIS type P channel transistor, 6 to 8, 12 to 14... MIS type N channel transistor, Bi,, Bj,... Bit line,
a to d...Signal source, φ _P1 , φ _P2 , φ _L1 , φ _L2 ... Clock pulse, V _D ... Voltage source.

Claims (1)

[Claims] 1 first and second bit lines connected to a voltage source, a gate connected to the first bit line and a drain connected to the second bit line, and
a first insulated gate field effect transistor having a source connected to the voltage source, a gate connected to the second bit line, a drain connected to the first bit line, and a source connected to the voltage source; a connected second insulated gate field effect transistor, a source and a drain connected to the first bit line and the second bit line, respectively;
A precharge circuit further comprising: a third insulated gate field effect transistor whose gate is connected to an external signal source.