JPH0576053A - Digital convergence circuit - Google Patents

Abstract

PURPOSE:To shorten an adjusting time by simultaneously adjusting more than two adjusting points, in a digital convergence circuit which operates the convergence adjustment of a display device. CONSTITUTION:The adjustment is simultaneously operated by control panels 1 and 2, the correction data are stored in a field memory 5, the correction data are read out from the field memory 5 according to a horizontal scanning, the correction amounts in a vertical direction of parts except the adjusting points are interpolated by a vertical interpolation circuit 11 by calculating a correction value on every scanning line from the adjacent correction data in the vertical direction, and the correction amounts in a horizontal direction are interpolated by an LPF after a D/A conversion circuit 13, and correction currents are allowed to flow through a correcting coil by an outputting circuit 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to adjust two or more adjustment points at the same time in a digital convergence circuit in a display device.

[0002]

2. Description of the Related Art Conventionally, in order to correct the convergence in a display device, it is necessary to apply a magnetic field that changes in a parabola shape in synchronization with the horizontal synchronizing signal and the vertical synchronizing signal to the convergence yoke.

Conventionally, a digital convergence circuit has been used as a means for generating a magnetic field with high correction accuracy.

Next, the operation will be described. This digital convergence is adjusted by the microprocessor that operates according to the flowchart shown in FIG. 4 for the misconvergence at the adjustment points obtained by equally dividing one horizontal synchronization period.

First, the keyboard is adjusted on the control panel 1 shown in FIG. 3, the correction data is read from the field memory 5, and the correction amount of the portion other than the adjustment point is changed in the vertical direction (vertical direction). Vertical interpolation circuit 1
In 1, the correction value is calculated for each search line from the adjacent vertical correction data and interpolated. In the horizontal direction (horizontal direction), the D / A conversion circuit 13 converts the analog value into an analog signal, and then the LPF 14 interpolates the output value. Therefore, the correction is performed by passing the correction current through the correction coil 16. However, this block diagram shows a digital convergence circuit having only one system.

FIG. 3 is a block diagram showing the structure of a conventional digital convergence circuit. In the figure, 1 is a control panel, 3 is a microprocessor for processing data, 4 is a read address generation circuit, 5 is a field memory for storing correction data, 6 is a backup memory for backing up data in the field memory 5, 7
Is a crosshatch generation circuit that generates a crosshatch signal,
8 is an output circuit for outputting a video signal to a CRT, 9 is a cross cursor generation circuit for generating a cross cursor signal for generating a cross cursor signal, 11 is a vertical interpolation circuit for calculating a correction value in the vertical direction, and 12 is a serial signal. To a parallel signal, 13 is a D / A conversion circuit that converts a digital signal to an analog signal, and 14 is a low-pass filter (hereinafter, L
PF), 15 is an output circuit for outputting a correction current to the correction yoke 16 of the convergence yoke.

In practice, four systems of digital convergence circuits for horizontal red and blue and vertical red and blue are used.

[0008]

Since the conventional digital convergence circuit is constructed as described above, it is impossible to adjust a plurality of adjustment points at the same time during the convergence adjustment. there were.

The present invention has been made in order to solve the above problems, and provides a digital convergence circuit capable of shortening the time for convergence adjustment by simultaneously adjusting two or more adjustment points. With the goal.

[0010]

SUMMARY OF THE INVENTION A digital convergence circuit according to the present invention is, in a digital convergence circuit for adjusting the convergence in a display device, an adjusting means capable of simultaneously adjusting two or more adjusting points and a cross indicating the adjusting point. 2 by distinguishing the cursor
Display means for displaying.

[0011]

In the digital convergence circuit according to the present invention, two or more microprocessors are used, or two or more adjustment points can be moved simultaneously by using the microprocessors in a time-sharing manner to shorten the adjustment time. You can

[0012]

EXAMPLES Example 1. The present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a digital convergence circuit according to an embodiment of the present invention. In the figure,
Reference numerals 1 and 2 are a control panel, 3 is a microprocessor for performing data, 4 is a read address generating circuit, 5 is a field memory for storing correction data, 6 is a backup memory for backing up data in the field memory 5, and 7 is a crosshatch signal. , 8 is an output circuit for outputting a video signal to the CRT, 9 is a cross cursor generation circuit, 10 is a dotted cross cursor generation circuit, 11 is a vertical interpolation circuit for calculating a correction value in the vertical direction,
12 is a conversion circuit for converting a serial signal into a parallel signal, 13 is a D / A conversion circuit for converting a digital signal into an analog signal, 14 is a low-pass filter (LPF), 15 is a correction coil 16 and a correction current to the correction coil 16 of the convergence yoke. It is an output circuit that outputs.

Next, the operation will be described. This discriminative convergence is adjusted by the microprocessor operating according to the flow chart shown in FIG. 2 for the misconvergence at the adjustment points obtained by equally dividing one horizontal synchronization period.

First, it is checked whether or not there is an input from the control panel 1 in FIG. 1, and if there is an input, the processing according to the input is performed, and the input on the control panel 2 is checked. If there is no input from the control panel 1. As it is, the control panel 2 is checked and if there is an input, the corresponding processing is performed and the processed data is output to the field memory 6 and the read address generating circuit.

If there is no input, the control panel 1 is checked again. Since the processing speed of the microprocessor 3 is several thousand times faster than that of human hands and eyes, almost two adjustments can be made at the same time on the control panel 1 and the control panel 2.

Adjustments are made by the control panels 1 and 2, and the correction data are recorded in the field memory 5. The correction data is read from the field memory 5 in accordance with the horizontal scanning, and the correction amount of the portion other than the adjustment point is set. In the vertical direction (vertical direction), the vertical interpolation circuit 10 calculates a correction value for each scanning line from adjacent vertical correction data and interpolates it, and in the horizontal direction (horizontal direction), the D / A conversion circuit 13 converts it into an analog signal. After conversion, the output circuit 1 is interpolated by the LPF 14.
In step 5, the correction current is corrected in the correction coil 16.

Further, the microprocessor 3 sends data on the position of the adjustment point to the cross cursor generation circuit 9 and the dotted line cross cursor generation circuit 10 to indicate where the position of the adjustment point currently being adjusted is. (Since the two adjustment points are difficult to see with the same cross cursor, one is shown as a dotted line.) Thereby, a cursor signal is generated by the cross cursor or the circuit 9 and the dotted cross cursor circuit 10. The crosshatch generation circuit 7 creates a crosshatch signal required for adjustment, adds the cursor signal indicating the position of the adjustment point described above with the output circuit 8 and outputs the result to the CRT to create a screen. The above embodiments have shown the case where the microprocessor is used by time division.

[0018]

As described above, according to the present invention, by having two or more controllers, there is an effect that adjustment, which has required a lot of time, can be performed quickly and accurately.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a digital convergence circuit according to an embodiment of the present invention.

FIG. 2 is a flowchart of a microprocessor according to an embodiment of the present invention.

FIG. 3 is a configuration diagram of a conventional digital convergence circuit.

FIG. 4 is a flowchart of a microprocessor using a conventional digital convergence circuit.

[Explanation of symbols]

 1 Control Panel 2 Control Panel 3 Microprocessor 4 Read Address Generation Circuit 5 Field Memory 6 Backup Memory 7 Crosshatch Generation Circuit 8 Output Circuit 9 Crosshair Cursor Generation Circuit 10 Crosshair Cursor Generation Circuit 11 Vertical Interpolation Circuit 12 Conversion Circuit 13 D / A Conversion circuit 14 Low-pass filter 15 Output circuit 16 Convergence yoke

Claims (1)

[Claims] 1. A digital convergence circuit for adjusting convergence in a display device, comprising:
2. A digital convergence circuit comprising: an adjusting means capable of adjusting two or more adjusting points at the same time; and a displaying means for displaying two crosshair cursors indicating the adjusting points by distinguishing between two points.