JPH0576044B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply voltage stabilizing circuit having a low voltage detection circuit for detecting a drop in power supply voltage.

Conventionally, power supplies that operate on batteries have had large fluctuations in battery voltage, so stabilizing the operation of the equipment has been achieved by installing a stabilization circuit in the power supply to stabilize the power supply voltage supplied to the equipment. There are many cases. In this case, the output transistor of the power supply stabilization circuit is often uses PNP transistors. In addition, since this battery capacity is limited, the power supply voltage drop is detected before the battery capacity decreases and normal operation of the device becomes difficult, and the user is notified and asked to replace the battery with one with a higher capacity. It is necessary to keep the battery capacity at the level required for the operation of the device by either charging the battery or having the battery charged. Furthermore, if the power supply voltage drops to such a level that normal operation of the device cannot be maintained, this must be detected and the operation of the device itself must be stopped. Normally, a decrease in battery capacity can be known by detecting this decrease in battery voltage.

Devices that operate on batteries as described above often have a power supply stabilization circuit, a low voltage detection circuit, and a low voltage alarm circuit or a forced low voltage switching circuit. Since these circuits each have separate circuits, the output voltage of the power supply voltage stabilization circuit and the detection voltage of the low voltage detection circuit are set separately. Setting accuracy is often required for the output voltage setting voltage of the power supply voltage stabilization circuit and the detection voltage setting voltage of the low voltage detection circuit, but in such cases, it is necessary to adjust both. The drawback is that it requires a variable resistance element such as a potentiometer or a lot of adjustment work.

An object of the present invention is to eliminate such drawbacks and provide a voltage stabilization circuit that can easily adjust the detection voltage and detect a voltage drop by simply adding a simple circuit.

a first transistor that obtains a stabilized output voltage from an input voltage by controlling a base current; a reference voltage circuit that obtains a reference voltage from the input voltage; and a difference between the reference voltage and the thick voltage of the output voltage. an error amplification circuit that amplifies a voltage; a second transistor that controls the base current of the first transistor by the output of the error amplification circuit; and the bases of the second transistors are commonly connected to form a first current mirror. a third transistor forming a circuit; a second current mirror circuit comprising a pair of transistors connected to the collector of the third transistor and having a conductivity type opposite to that of the third transistor; a third current mirror circuit connected to the circuit and consisting of a pair of transistors of the same conductivity type as the first current mirror circuit; and a third current mirror circuit connected to the connection point of these second and third current mirror circuits and configured to control the input voltage level. An output circuit that outputs a detection output that detects a drop, and a resistor that is connected to the collector of the transistor of the third current mirror circuit on the side that is not the connection point of this output circuit and supplies the collector current of the transistor. A voltage stabilizing circuit with a low voltage detection circuit, characterized in that the level of the detection output is set according to the current value of the collector current.

In the present invention, the base current of the control (power) transistor constituting the voltage stabilizing circuit is detected by a first current mirror circuit, and this detected current and the current set by the third current mirror circuit are By comparing and outputting the current mirror circuit, it is possible to easily add a low voltage detection circuit that can detect a drop in the input voltage.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram of a conventional low voltage detection circuit and power supply voltage stabilization circuit using PNP transistors for output. In the figure, 1 is an error voltage amplifier, 2 is a startup circuit that supplies a predetermined voltage from the input voltage V _B , 3 and 4 are reference voltage generators, 5 is a comparator, 6 is a battery that supplies power supply voltage V _B , and 7 is the load,
8 is an output terminal for voltage detection. The input power supply voltage _VB from the battery 6 is applied to the emitter of the output PNP transistor _Q1 , and also starts up the start-up circuit 2 and operates the power supply voltage stabilizing circuit. In other words, the error voltage amplifier 1 divides the collector voltage V _OUT of the PNP transistor Q ₁ by the resistors R ₃ and R ₄ into a voltage R ₄ /R ₃ + R ₄ ·V _OUT and the output voltage V of the reference voltage generator 3. _REF , the base current I _B of the PNP transistor Q ₁ is controlled via the transistor Q ₂ so that the two match _, and the emitter-collector voltage V _CE (=V _B −
V _OUT ).

However, the voltage V _B applied to the emitter of PNP transistor Q ₁ decreases and PNP transistor Q ₁
As the emitter-collector voltage V _CE of PNP transistor Q ₁ approaches the collector voltage V _OUT of PNP
When the emitter-collector saturation voltage V _CE (SAT) of the transistor Q ₁ is reached, the base current I _B of the PNP transistor Q ₁ increases rapidly, but the emitter-collector saturation voltage V _CE (SAT) remains approximately the same. When the power supply voltage V _B decreases below that value, the output voltage V _OUT of the power supply voltage stabilization circuit will no longer be maintained at a constant value, and the output voltage V _OUT will also decrease as the power supply voltage V _B decreases. . Furthermore, the base current of the PNP transistor Q ₁ increases rapidly at the power supply voltage V ₁ of the following equation.

V ₁ = (1 + R ₃ / R ₄ ) V _REF + V _CU (SAT9) ...(1) This means that the PNP transistor Q ₁ is saturated,
The DC current amplification degree h _FE of the PNP transistor Q ₁ decreases rapidly, but since the collector current I _C of the PNP transistor Q ₁ hardly changes under constant load (7),
This is because the base current I _B of the PNP transistor Q ₁ increases rapidly. This situation is as shown in the characteristic diagram of FIG.

In addition, the low voltage detection circuit shown in Figure 1 uses a voltage that is obtained by dividing the input power supply voltage V _B by resistors R ₅ and R ₆ .
R ₆ /R ₅ +R ₆ ·V _B and the output voltage V _REF ' of the reference voltage generation circuit 4 are compared by a comparator 5 and outputted to the output terminal 8 of the low voltage detection circuit.

Furthermore, the output voltage V _OUT of the power supply voltage stabilization circuit is expressed by the following equation.

V _OUT = R ₃ + R ₄ /R ₄・V _REF ...(2) This circuit uses the output voltage V _REF of the reference voltage generator 3.
There are variations in resistance R ₃ and resistance R ₄ ,
In order to keep the output voltage V _OUT within a certain deviation, the ratio between resistor R ₃ and resistor R ₄ is often adjusted and set. Furthermore, the detection voltage V ₂ of the low voltage detection circuit is expressed by the following equation.

V ₂ = (1+R ₅ /R ₆ )・V _REF ′...(3) In this equation, there are variations in the output voltage V _REF ′ of the reference voltage generator 4 and variations in the resistors ₅ and R ₆ , so the low In order to bring the detected voltage V ₂ of the voltage detection circuit within a certain deviation, it is necessary to adjust and set the ratio of the resistor R ₅ and the resistor R ₆ , which has the drawback of requiring a lot of adjustment man-hours.

FIG. 3 is a circuit diagram of one embodiment of the present invention. In this embodiment, a second current mirror circuit consisting of transistors Q ₃ and Q ₈ , resistors R ₁ and R ₂ , and transistors Q ₄ and Q ₅ is added to the power supply voltage stabilizing circuit shown in FIG.
A third current mirror circuit consisting of transistors Q ₆ and Q ₇ is added. transistor
The base of Q ₃ is connected to the base of transistor Q ₂ , and these transistors Q ₂ and Q ₃ constitute a first current mirror circuit. this transistor
The collector of Q ₃ is connected to the base of transistor Q ₄ of the second current mirror circuit, the collector and the base of transistor Q ₅ , and
The collector of Q ₅ is connected to the collector of transistor Q ₆ of the third current mirror circuit. Transistors Q ₆ and Q ₇ are connected to the collector of transistor Q 7 _.
are connected to each other, and a voltage is supplied through a resistor _R1 . The base of transistor Q ₈ is connected to the collector of transistor Q ₅ , which constitutes the second current source, and the collector of transistor Q ₈ is supplied with voltage through resistor R ₂ , and this collector is connected to the output terminal of the low voltage detection circuit. 8.

Now, the first current mirror circuit transistor
The emitter area ratio of Q ₂ and Q ₃ is m:1, the emitter area ratio of transistors Q ₄ and Q ₅ of the second current mirror circuit is n:1, and the emitter area ratio of transistors Q ₆ and Q of the third current mirror circuit is When the emitter area ratio of transistor Q ₇ is l:1, transistor Q ₈ is turned on or off depending on the magnitude relationship between the collector current I ₁ of transistor Q ₇ and the base current I _B of PNP transistor Q ₁ , and the collector current of transistor Q ₈ is turned on or off. When the voltage V ₃ changes from high (V _OUT ) to low (almost grounded), it can be detected that the voltage has become low. In other words, when I _B ≦m・n・l・I ₁ , V ₃ =V _OUT When I _B > m・n・l・I ₁ , V ₃ 0, and the base current I _B of the PNP transistor Q ₁ is m・n・It is possible to detect when l・I becomes larger than ₁ . Also, by changing the resistor R ₁ , the transistor Q ₇
Since the collector current _I1 of the PNP transistor Q1 changes, the detected current value of the base current _IB of the PNP transistor _Q1 can also be changed.

At this time, the base current I _B of the PNP transistor Q ₁
The relationship between the power supply voltage V B and the power supply voltage V _B supplied to the emitter of the PNP transistor Q ₁ is shown in the characteristic diagram of FIG. In FIG. 4, the base current changes as shown by curves A and B depending on the magnitude of the load current _IL . Current I ₁ set by these curves A and B and resistance R ₁
When compared with the level C (m・n・l・I ₁ ) of
When the load current is large (A), the output voltage V ₃ outputs the voltage V _OUT at the base voltage V ₂ ' (curve F), and when the load current is small (B), the output voltage V 3 outputs the voltage V OUT at the base voltage V _{2 '} . V ₃ outputs voltage V _OUT (curve H) these are curves F, H
It is shown by. Also, increase the resistance value of resistor R ₁ to decrease the set current I ₁ ' (level m, n,
l・I ₁ ') When compared, when the load current is large (A), the output voltage V _OUT is output at the base voltage V ₂ (curve E), and when the load current is small (B), the output voltage V OUT is output at the base voltage V 2
Output voltage V _OUT at V ₂ ″ (curve G).

Note that curves J and K show the output voltage V _OUT when the load current is large and small.

In this way, the collector current _I1 of the transistor _Q7 is set by adjusting the value of the resistor _R1 , and by changing this set current level, the detection tolerance of the low voltage detection circuit can be adjusted.

According to the present invention, a low voltage detection circuit can be obtained by simply adding three current mirror circuits, one transistor serving as an output circuit, and one resistor to a voltage stabilizing circuit.

FIG. 5 is a partial circuit diagram of a second embodiment of the invention. In this circuit, the voltage supplied to the resistor _R1 of the third current mirror circuit in FIG. 3 can be switched in two stages, and the low voltage detection voltage is set in two stages. For this purpose, a parallel connection circuit consisting of a diode _D1 connected in the forward direction and a transistor _Q9 that can short-circuit both ends of this diode _D1 is inserted between the output voltage V _OUT and the resistor _R1 in Fig. 5. , this transistor _Q9 is driven and switched by a transistor _Q10 supplied with a voltage _VDD via a resistor _R5 . That is, when the voltage _VDD is high (1V or more) or low (0.5V or less), the transistor _Q9 is switched, and an output voltage with a voltage difference of the forward voltage _VF can be obtained. Note that this voltage
V _DD may be extracted by a voltage detection circuit 9 that divides the input power supply voltage V _B resistor.

The fact that the detection voltage can be detected in two stages in this way enables control such as outputting an alarm signal at the first stage detection voltage and performing forced switching at the second stage detection voltage, for example. Such a circuit can be easily constructed using a simple logic circuit. For example, in devices where the load current is in two operating states, such as during standby and normal operation, or in a system with a transmitter and receiver, there is a state in which only the receiver is in operation and a state in which both the transmitter and receiver are in operating state. In some devices, it is possible to increase the voltage difference between two levels of detection voltages. There is an advantage that the same voltage detection circuit can be used to configure these devices.

Furthermore, since the detection voltage of the low voltage detection circuit is determined by the output voltage of the power supply voltage stabilization circuit, the output load current, and the resistance value, even when performing voltage detection in two or more stages, the voltage of each detection voltage It can be set so that the magnitude of the value will not be reversed, so there is no need to set each detection voltage separately, and adjustment parts and adjustment man-hours can also be omitted. Moreover, the configuration of three sets of current mirror circuits has great advantages in that the drive circuit current of the low voltage detection circuit section can be reduced, and the circuit is simple.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional low voltage detection circuit and power supply voltage stabilization circuit, and Figure 2 is a characteristic diagram of base current I _B and output voltage V _OUT with respect to input voltage V _B , explaining the operation of Figure 1. FIG. 3 is a circuit diagram of the first embodiment of the present invention, and FIG. 4 is a diagram explaining the operation of FIG. 3. Base current I _B and output voltage with respect to input voltage V _B
The V _OUT characteristic diagram, FIG. 5, is a partial circuit diagram of the second embodiment of the present invention. In the figure, 1...error voltage amplifier, 2...start-up circuit, 3, 4...
...Reference voltage generator, 5...Comparator, 6...
Battery, 7...Load, 8...Output terminal, 9...Voltage detection circuit, _Q1 , _Q4 , _Q5 , _Q9 ...NPN transistor, _Q2 , _Q3 , _Q6 , _Q7 , _Q10 ...PNP transistor, R ₁ , R ₂ , R ₃ , R ₄ , R ₅ ... Resistance.

Claims (1)

[Claims] 1. A first transistor that obtains a stabilized output voltage from an input voltage by controlling a base current, a reference voltage circuit that obtains a reference voltage from the input voltage, and a divided voltage of the reference voltage and the output voltage. an error amplification circuit for amplifying the differential voltage of the first transistor; a second transistor for controlling the base current of the first transistor by the output of the error amplification circuit; a third transistor forming a current mirror circuit; a second current mirror circuit consisting of a pair of transistors connected to the collector of the third transistor and having a conductivity type opposite to that of the third transistor; A third current mirror circuit connected to the current mirror circuit and consisting of a pair of transistors of the same conductivity type as the first current mirror circuit; an output circuit that outputs a detection output that detects a decrease in the level of the
and a resistor connected to the collector of the transistor of the third current mirror circuit on the side that is not the connection point of the output circuit to supply a collector current to the transistor, and the detection output is determined by the current value of the collector current. A voltage stabilizing circuit with a low voltage detection circuit, which is characterized by setting a level.