JPS60110021A - Voltage stabilizing circuit provided with low voltage detecting circuit - Google Patents

Abstract

PURPOSE:To simplify the constitution of a circuit which detects the drop of the input voltage by using a current mirror circuit to detect and compare the base current of a control transistor constituting a voltage stabilizing circuit. CONSTITUTION:A current mirror circuit consisting of transistors (TR) Q3 and Q8, resistances R1 and R2 and TRs Q4 and Q5 and another current mirror circuit consisting of TRs Q6 and Q7 are provided to a power supply voltage stabilizing circuit containing an error voltage amplifying circuit 1, a start-up circuit 2, a reference voltage generator 3, etc. The base current of a TRQ1 is detected by a current mirror circuit consisting of TRs Q2 and Q3, and the TRQ8 is turned on and off in accordance with the difference between the base current of the TRQ1 and the collector current of the TRQ7. Then a low level of voltage can be detected by the collector voltage V3 of the TRQ8. The collector current I1 of the TRQ7 is varied with variation of the resistance R1. Then the detection current value can be varied for the base current of the TRQ1.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a power supply voltage stabilizing circuit having a low voltage detection circuit for detecting any drop in power supply voltage.

Conventionally, power supply devices that operate on batteries have large fluctuations in battery voltage, so it has not been possible to stabilize the operation of the device by installing a stabilization circuit in the power supply to fully stabilize the power supply voltage supplied to the device. There are many cases. In this case, the number of battery cells can be reduced to reduce the battery capacity, and the power supply stabilization circuit can be stabilized. For output 2/distor, PNP) transistor gold is often used. In addition, since this battery capacity is limited, the power supply voltage drop τ is detected and the user is notified and replaced with a battery with a higher capacity before the battery capacity decreases and the normal operation of the device becomes difficult. It is necessary to always maintain the battery capacity at the level required for the operation of the device (either by receiving a battery or having the battery charged). Furthermore, if the power supply voltage drops to such a level that normal operation of the device cannot be maintained, this must be detected and the operation of the device itself must be stopped. Normally, by detecting this decrease in battery voltage, it is possible to know the decrease in p battery capacity.

Devices that operate on batteries as described above often have a power supply stabilization circuit, a low voltage detection circuit, a low voltage alarm circuit, or a low voltage forced gJ conversion circuit. Since each of these circuits has its own circuit, the output voltage of the power supply voltage stabilization circuit and the detection voltage of the low voltage detection circuit are set separately.

Setting accuracy is often required for the output voltage setting voltage of the power supply voltage stabilization circuit and the detection voltage setting voltage of the low voltage detection circuit, but in such cases, it is necessary to adjust both. This has the disadvantage that it requires a variable resistance element such as a p1 volume or a lot of adjustment work.

An object of the present invention is to eliminate such drawbacks and provide a voltage stabilization circuit that can easily adjust the detection voltage and detect a voltage drop by simply adding a simple circuit.

The configuration of the voltage stabilizing circuit with low voltage detection circuit of the present invention is as follows:
a first transistor that obtains an output voltage with a stabilized input voltage by controlling a base current; a reference voltage circuit that obtains a reference voltage from the input voltage; and a divided voltage of the reference voltage and the output voltage; an error amplification circuit for amplifying the difference between the two transistors; a second transistor for controlling the base current of the ml transistor by the output of the error amplification circuit; 2 - a third transistor forming a circuit; a second current mirror circuit consisting of a pair of transistors of a conductivity type opposite to that of the third transistor; connected to the collector of this third transistor; A third current mirror circuit consisting of a pair of transistors of the same conductivity type as the current mirror circuit of ml is connected to the current mirror circuit of f, and these are the 2's? and an output circuit connected to the connection point of the third current mirror circuit to output a full detection output indicating the level drop of the input voltage, and a transistor of the third current mirror circuit on the side that is not the connection point of the output circuit. The present invention is characterized in that it comprises a load means connected to the collector of the load means via a load voltage, and the voltage level to be detected is set by changing the resistance value of the load means or the load voltage.

Part 2 of the present invention is the system for configuring the voltage stabilizing circuit. ll
] (Power) Transistor base t Current k iJX 1
By detecting this current with a current mirror circuit, comparing this detected current with a current set by a third current mirror circuit, and outputting the result from a second current mirror circuit IC,
A low voltage detection circuit that can detect a drop in input voltage can be easily added.

Hereinafter, the invention will be explained in detail with reference to the drawings.

FIG. 1 is a circuit diagram of a conventional low voltage detection gl path and power supply voltage stabilization circuit using an i'NP transistor for output. In the figure, l is an error voltage amplifier, 2 is a startup circuit that supplies a predetermined voltage from the input voltage VB, 3.4 is a reference voltage generator, 5 is a comparator, 6 is a battery that supplies power supply voltage VB, 7 is a load, 8 is an output terminal for voltage detection. The input power supply voltage VB from the battery 6 is the output PNPI-
At the same time, the voltage is applied to the transistor Ql, and the startup circuit 2 is started up to operate the power supply voltage stabilization circuit. That is, the error voltage amplifier l has the collector voltage V out k of the PNP transistor Ql, and the resistance ratio 3-
Compare the voltage R3+R4.700 divided by the resistor R4 and the output voltage VRmF of the reference voltage generator 3.

PNP via transistor Q2 in 1 so that both match.
l- base current IB f of transistor Qt is controlled, P
The emitter-collect dusk voltage Voi+ (=VB-VOUT) of the NPI transistor Q1 is changed.

However, if n applied to the emitter of PNP transistor Q1
The voltage B decreases and becomes PNP) as it approaches the collector voltage V OUT of transistor Q1 and becomes PNP transistor Q.
The value of the emitter-collector voltage VOI of transistor Ql is PNP.The emitter-collector saturation voltage of transistor Ql is Va
When n(sA・T)vc, the pace current IB of the PNP transistor Q1 increases rapidly, but the emitter-collector saturation voltage Vog(sA-T) remains almost constant, and the power supply voltage Vm remains below it. When the power supply voltage VB decreases, the output voltage VOUT of the power supply voltage stabilizing circuit can no longer be maintained at a constant value, and as the power supply voltage VB decreases, the output voltage VOUT also decreases. Also, if the power supply voltage Vl is 2 and the PNP
The current flowing through transistor Q1 increases rapidly.

V 1= (1+e) VRgy+Vom(sAt)
++-+++ (1) This is PINi' transistor Qt
saturates, and the DC current amplification hFIl of the PNP transistor Ql decreases, but since the collector current lo of the PNP transistor Ql hardly changes under constant load (7), the base of the PNP transistor Ql This is because the current IB increases rapidly. What does this look like?

As shown in the characteristic diagram in Figure 2, 's? It is shi.

In addition, the low voltage detection circuit shown in FIG.
/ is compared by the comparator 5 and output to the output terminal 8 of the low voltage detection circuit.

Further, the output voltage voUd of the power supply voltage stabilizing circuit is expressed by the following equation.

This circuit suffers from variations in the output voltage VBIF of the reference voltage generator 3 and variations in the resistors R3 and 4. In order to bring the output voltage VO[IT within the - side difference, the resistor R3 is required.
There are many opportunities to adjust and set the ratio of resistor R4 and resistor R4. Also,
The detection voltage (2) of the low voltage detection circuit is expressed by the following equation.

In this formula, the group 31! Output voltage of voltage generator 4■
Variations in B11y/ and variations in resistors R5 and R6 In order to keep the detection voltage ■2 of the low voltage detection circuit within a certain deviation, adjust the ratio of resistors 1-L5 and resistors R6. The disadvantage is that it requires a lot of man-hours for adjustment.

FIG. 3 is a circuit diagram of one embodiment of the present invention. In this embodiment, transistor Q3.
Q8, resistor R1, kL+2, and transistor Q4.
A second current mirror circuit consisting of Qs and a third current mirror circuit consisting of transistors Qs and Q7 are added. The base of transistor Qs is connected to the base of transistor Q2, and these transistors Q2. Q3 constitutes the entire first current mirror circuit. The collector of this transistor Q3 is connected to the base and collector of transistor Q4 of the second current mirror circuit and the base of transistor Qs. The collector of transistor Q5 is connected to the collector of transistor Q6 of the third current mirror circuit. At the same time, a voltage is supplied through the n1 resistor xk connected to the bases of the transistors Qa and Q7. The base of transistor Qs is connected to the collector of transistor Q5, which constitutes a second current source.

A voltage is supplied to the collector of the transistor Q8 via a resistor R2', and this collector serves as the output terminal 8 of the low voltage detection circuit.

Now, the transistors Qz, Q of the first current mirror circuit
3 with an emitter area ratio im:l, and the F transistor Q4 of the second current mirror circuit. Emitter area ratio i of Q5
If n: l and the emitter area ratio of the transistor Qs and Q7 of the third current mirror circuit is 1, then the difference between the magnitude of the transistor Q7 (D collector current I and the base current IB of the PNP transistor Q1) is ,
Transistor Q8 is turned on or off, and low voltage can be detected based on the collector voltage (3) of transistor Q8. In other words, when ■Bkuml1n0t″11, V3=VOIJ
When T1B≧mlInl1t・■1, V a w O 5. The base current IB of the PNPI resistor Q1 is m
It is possible to detect when sn*te11 becomes larger. Furthermore, since the collector current 11 of the transistor Q7 changes when the resistor Rx' is changed, the detected current value of the base current IB of the PNP transistor Q1 is also likely to be improved.

Konoto! The relationship between the base current B of the PNP transistor Qz and the power supply voltage Vβ supplied to the emitter of the PNP transistor Q1 is shown in the characteristic diagram of FIG. Fourth
In Figure 3, the base current changes as shown by curves A and B depending on the magnitude of the load current IL. These curves A, B and the resistance ratio 1 are set to the level C (m-n
-t-Il), when the load power is large (A
), the base voltage v2' and the output voltage v3 are the voltage ■oU
(-curve F) 1 When the load current is small (B), the output voltage v3 is the voltage Vour'Th at the base voltage v2.
(Curve H) These outputs are shown by curves F and H. Also.

Resistor 1 (increase the resistance value of 1 to set the current lx”fir
If we compare the output voltage (VOLIT k) at a base voltage of 2'' when the load current is large (A), and when the load current is small (B), ) has a base voltage v2″ and an output voltage voU
output (curve G).

Note that curves J and K show the output voltage V OUT when the load current is large and small.

In this way, the collector current 11 of the transistor Q7 is set by adjusting the value of the resistor R1, and by changing this set current level, the detection level of the low voltage detection circuit can be adjusted.

According to the present invention, a low voltage detection circuit can be obtained by simply adding three current mirror circuits, one transistor serving as an output circuit, and one resistor to a voltage stabilizing circuit.
Ru.

FIG. 5 shows a partial circuit diagram of a second embodiment of the present invention. This circuit is shown in Figure 3 IC'i? The resistance ratio IVc of the third current mirror circuit to be supplied is switched in two stages.
In this way, the detection voltage of the 1°C voltage is divided into two stages. For this purpose, input voltage vn and resistance kL shown in FIG.
A parallel connection circuit consisting of a diode DI connected in the forward direction and a transistor Q9 that can short-circuit both ends of the diode D1 is inserted between the transistor Q9 and the transistor Q9. transistor Qt
It is driven and switched by o. That is, voltage VII
When D is high (more than iV) or low (less than 0.5V), the transistor Q9 changes 93 times, and the forward voltage V? It is possible to obtain an output voltage with a voltage difference of . In addition, this voltage ■D
D may be extracted from the voltage detection circuit 9vc which is divided by the input power supply voltage Va by resistors.

The fact that the detection voltage can be detected in two stages in this manner enables control such as outputting an alarm signal at the first stage detection voltage and performing forced switching at the second stage detection voltage, for example. Such a circuit can be easily constructed using a simple logic circuit. 5 For example, in devices where the load current is in two operating states, such as during standby and normal operation, or in systems that include a transmitter and receiver, the receiver may be in an operating state and both the transmitter and receiver may be in an operating state. In the device, the voltage difference between two levels of detected voltage values can be increased. There is an advantage that the same voltage detection circuit can be used for all of these devices.

Furthermore, since the detection voltage of the low voltage detection circuit is determined by the output voltage of the power supply voltage stabilization circuit, the output load current, and the resistance value, each detection voltage can be set so that the magnitude of the voltage value will not be reversed, so there is no need to set each detection voltage separately.
Adjustment parts and adjustment man-hours can also be omitted. ′! 1'
The structure of the three-wire current mirror circuit has great advantages such as the drive circuit current of the low voltage detection circuit can be made small and the circuit is simple.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional low voltage detection circuit and power supply voltage stabilization circuit, and Figure 2 is an input voltage vn explaining the operation of Figure 1.
3 is a circuit diagram of the first embodiment of the present invention, FIG. 4 is the operation fr of FIG. 3, and the base current lay with respect to the input voltage VB to be explained. FIG. 5 is a partial circuit diagram of a second embodiment of the present invention. In the figure, l...error voltage amplifier, 2...
Startup time J 3.4...Reference voltage generator, 5...Comparator, 6...Battery, 7...Load, 8.Old...Output terminal, 9...
...Voltage detection circuit, Qto Q4s Q5# Q9
...NPN l-transistor, Q2. Q3.
Q6. Q7. Qto--PNPI-7 register, R1,1-L2. 3. R4, 几5 ”' ”. It is resistance. '￥'-1 piece 2 times v3 Sana Veu Graduation 24-mouth

Claims (1)

[Scope of Claims] A first transistor that obtains an output voltage with a stabilized input voltage by controlling a base current, a reference voltage circuit that obtains a reference voltage from the input voltage, and a reference voltage circuit that obtains a reference voltage from the input voltage. and a divided voltage of the output voltage; a second transistor that fully controls the pace current of the first transistor by the output of the error amplification circuit; are commonly connected to a third transistor forming the first current mirror circuit, and connected to the collector of the third transistor, which is a second transistor consisting of a pair of transistors of the opposite conductivity type to the third transistor. with a current mirror circuit. A current mirror circuit @3 is connected to the second current mirror circuit and is composed of a pair of transistors of the same conductivity type as the first current mirror circuit. an output circuit that outputs a detection output indicating a large input voltage level drop, which is connected to the connection point of the 22nd and third voltage mirror circuits; and a load means connected to the collector of the transistor of the current mirror circuit via a load voltage, and the voltage level to be detected is set by changing the resistance value of the load means or the load voltage. Voltage stabilization circuit with low voltage detection circuit.