JPH0575466A - Resistor voltage divider - Google Patents

Abstract

PURPOSE:To reduce number of resistive elements by replacing any of n-sets of resistors of a 1st resistor array with the entire 2nd resistor array. CONSTITUTION:A 1st potential Vo is given to a resistor R1, the resistor R1 is connected to a resistor R2 and then resistors are connected sequentially till a resistor R16 in series, and resistors r1-r16 are connected in parallel with the resistors R1-R16. Furthermore, 1st-3rd transfer gates T01-T16, T01'-T16', T01''-T16'', t0-t16 are provided to the divider to control the resistors R1 R16 and the resistors r1-r16. In this case, control signals A1-A16 and inverse of A1-inverse of A16 are signals resulting from digital signals inputted to a decoder and outputted from the decoder, any of the control signals A select each one transfer gate of the transfer gates T01-T16, T01'-T16', T01''-T16'', t0-t16 and then selects one of the transfer gates T01-T16. Thus, the divided potential is outputted from an output OUT.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resistance voltage divider, and more particularly to a resistance voltage divider circuit used in a D / A converter.

[0002]

2. Description of the Related Art As shown in FIG. 2, a resistance voltage divider circuit used in a conventional D / A converter has a first potential (for example, a high potential V).
₀ ) and a second potential (for example, V ₁ (GND) potential), an n-bit D / A converter has 2 n power resistance elements (here, X _{1 to} X ₂₅₅ ) connected in series. Are connected to the transfer gates S _{0 to} S ₂₅₅ from the contact points of the respective resistance elements.

The gate signals B _{0 to} B ₂₅₅ input to the transfer gates S _{0 to} S ₂₅₅ are control signals output from the decoder by inputting digital values to a decoder (not shown) from the outside. This control signal, one of the transfer gates S ₀ to S _{25 5} is selected and the voltage divided by the resistance ratio is outputted from the output OUT2.

For example, when the gate signal B ₁ is selected by the control signal output from the decoder, the gate signal B ₁
Only ₁ becomes "H level" and other gate signals B ₂ ~
B ₂₅₅ becomes "L level". Therefore, only the transfer gate S ₁ is turned on, and the other transfer gates S _{2 to} S ₂₅₅ are turned off. Thus, a voltage divided by the resistance ratio of the contact connected to the transfer gate S _1, a 255 V _0/256 with respect to the high potential V _0, this potential is output from the output OUT2.

[0005]

In such a conventional resistance voltage divider, the resistors are connected in series. Therefore, in order to improve the accuracy of the analog output value, the number of resistors must be increased. However, the fact that the number of resistance elements increases increases the chip size and the like, resulting in an increase in chip cost.

An object of the present invention is to solve the above-mentioned problems and to provide a resistance voltage divider capable of reducing the chip size.

[0007]

The structure of a resistance voltage divider according to the present invention comprises a decoder circuit for receiving a converted digital signal and outputting a control signal, a transfer gate controlled by the control signal, and the transfer gate. And a first resistor string in which n resistors each having a first resistance value equal to each other controlled in series are connected in series and an m resistor having a second resistance value equal to each other are connected in series. A second resistor string whose resistance value corresponds to one of the n resistor strings, and one of the n resistor strings of the first resistor string and the entire second resistor string. And a control circuit for replacing and.

[0008]

FIG. 1 is a circuit diagram showing a resistance voltage divider according to an embodiment of the present invention.

[0009] In FIG. 1, a resistive divider to an embodiment of the present invention, the first potential V ₀ which is connected to the resistor R _1, the resistor R ₁ is connected to the resistor R _2, the following sequential resistor R ₁₆ Are connected in series, and resistors r ₁ to r ₁₆ are arranged in series in parallel therewith. Further, the first, second and third transfer gates T _{01 to} T ₁₆ and T ₀₁ ′ to T for controlling their resistances.
₁₆ ′, T ₀₁ ″ to T ₁₆ ″, t _{0 to} t ₁₆ .

The resistance values at this time are the resistances R _{1 to} R ₁₆
Is R, and the resistances r _{1 to} r ₁₆ are R / 16.

Next, the operation of this embodiment will be described in detail. Here, the control signals A _{1 to} A ₁₆ and A ₁ (negative value) to A ₁₆ (negative value) are signals output from the decoder by inputting digital values to the decoder. ₀₁ ~ T ₁₆ , T ₀₁ ′ ~ T ₁₆ ′, T ₀₁ ″ ~
By selecting one transfer gate for each of T ₁₆ ″ and further selecting one of the transfer gates T _{1 to} T ₁₆ , the potential divided by the resistance ratio is determined and output from the output OUT 1. To be done.

For example, the control signal A _{1 of} the first control signal group
Is selected by the decoder, the control signal A ₁ becomes "H" level and the other control signals A _{2 to} A ₁₆ become "L" level.
In the inverted signal of this control signal, that is, (negative value), the control signal A ₁ is at “L” level, and the other control signals A _{2 to} A ₁₆ are at “H” level.

By this control signal group, the transfer gates T ₀₁ ′, T ₀₁ ″, T ₀₂ ˜T ₁₆ are turned on, and the transfer gates T ₀₁ ′, T ₀₂ ′ ˜T ₁₆ ′, T ₀₂ ″ ˜T ₁₆ ″ are turned on. OF
It becomes the F state. By this control, the resistance R ₁ is apparently replaced with the second resistance group r _{1 to} r ₁₆ . When the control signal a2 of the second control signal group is selected by the decoder, the control signal a2 is at "H" level, and the other control signal a2.
1, the transfer gate t ₁ is turned on by the “L” level, and the potential of 255 V _D0 / 256 divided by the resistance ratio is determined and the output OUT
It is output from 1.

In the resistance voltage divider of this embodiment, one of the conventional 2 n-th power resistors, which is 1/2 times the n-th power of 2, is placed in the first column and 1/2 of the n-th power of 2 is placed in the first column. 2 pieces of resistors having the same resistance value as the conventional one are arranged in series in the second column, and one of the resistors in the first row and the entire second row are replaced by a transfer gate. As a result, it has the same function as a state where 2 n power resistors are arranged in series.

[0015]

As described above, the present invention has the effect that the number of resistors and the layout can be greatly reduced because the number of resistors is twice the conventional 1/2 power. ..

[0016] In Naozu 1, R ₁ -R ₁₆ = If the R [Ω], r ₁ ~r ₁₆ has one resistance r ₁ ~r ₁₆ =
(R / 16) [Ω].

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a resistance voltage dividing circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a conventional resistance voltage dividing circuit.

[Explanation of symbols]

_{T 01 ~T 16, T 01 '} ~T 16', T 01 "~T 16", t 0 ~
t _16, S ₀ ~S ₂₅₅ transfer gates _{R 1 ~R 16, r 1 ~r} 16, X 0 ~X 255 resistive elements V _D0, V ₀ the high potential V _D1, V ₁ low potential: A1 to A16, A ₁ ( Negative value) to A ₁₆ (negative value), a ₁
~ A ₁₆ , B ₀ ~ B ₂₅₅ Control signal

Claims (2)

[Claims] 1. A decoder circuit for receiving a converted digital signal and outputting a control signal, a transfer gate controlled by the control signal, and a resistor controlled by the transfer gate and having first resistance values equal to each other. The first resistor string in which n units are connected in series and the m number of resistors having the same second resistance value in series are connected in series so that the total resistance value is one of the n resistor units. A corresponding second resistor string, and a control circuit for replacing any one of the n resistors of the first resistor string and the entire second resistor string. Resistance voltage divider. 2. The resistance voltage divider according to claim 1, wherein the transfer gate, the first and second resistance series, and the control circuit form part of a digital-analog converter.