JPH0575267A - Manufacture of multi-wire wiring board - Google Patents

Abstract

PURPOSE:To enable plating void to be suppressed by using a plating bath where vanadium oxide or vanadium oxalate is added to an electroless copper plating liquid which contains at least copper ion and its complexing agent, a reducing agent, and a pH adjuster. CONSTITUTION:Plating is made by using a plating bath where vanadium oxide or vanadium oxalate is added to an electroless copper plating liquid which contains at least copper ion and its complexing agent, a reducing agent, and pH adjuster as a plating bath of electroless plating. When a multi-wire wiring board is plated in a bath where a vanadium pentoxide of 1.0X10<-5>mol/dm<3> is added, a through-hole wire-clad layer is completely coated with an electroless plating copper. On the other hand, in the case where no vanadium pentoxide is added, a plating void remains partially even if the plating thickness on a copper monitor is 15mum, thus enabling the plating void to be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multi-wire wiring board electrically joined by a conductive wire covered with an insulating layer.

[0002]

2. Description of the Related Art A multi-wire wiring board is disclosed in Japanese Patent Publication No.
As disclosed in Japanese Patent No. 21434, it is a wiring board in which necessary portions are electrically joined through a through hole or the like by a conductive wire such as a copper wire covered with an insulating material such as a polyimide resin. Since the wiring pattern of this multi-wire wiring board is formed by wires, there is no need to remake the photomask when changing the design, and crosstalk is reduced due to diagonal wiring, good electrical characteristics, and many other advantages. ing. In the multi-wire wiring board, since the connection between the through holes is made only by the conductive wire having a diameter of about 0.10 mm, the plating of the through hole wire portion is extremely important in connection reliability. Conventionally, as disclosed in JP-B-45-21434 as a plating bath for forming a through-hole wire portion,
Contains a source of cupric ions such as copper sulfate and a reducing agent of cupric ions such as formaldehyde and a complexing agent of cupric ions such as tetrasodium ethylenediamine acetic acid, and sodium hydroxide Electroless copper plating baths have been proposed.

[0003]

[Problems to be Solved by the Invention] Japanese Patent Publication No. 45-2143
When a multi-wire wiring board is manufactured using the plating bath disclosed in Japanese Patent Publication No. 4 publication, as shown in FIG. 2, in a portion where the hole quality after through-hole drilling is poor, a hole formed by an alkaline permanganate solution is used. Due to cleaning and other pre-plating treatment, contaminants that suppress plating deposition are trapped in the etched back through-hole wire coating layer, etc., resulting in plating voids and partial reduction in plating thickness. was there. The present invention provides a method of manufacturing a multi-wire wiring board having excellent hole quality without plating voids.

[0004]

According to the present invention, an adhesive for wiring is pressed on an inner layer circuit board, a conductive wire covered with an insulating layer is laid on the inner layer circuit board, and a prepreg and an outer layer copper are formed on the conductive wire. After pressing the foil, a through hole is formed in the obtained substrate to form a through hole, and the through hole portion of the wire is electrolessly plated to electrically join the circuit. As a plating bath for plating, at least copper ions and their complexing agents, reducing agents and pH
Disclosed is a method for producing a multi-wire wiring board, which comprises plating using a plating bath in which vanadium oxide or oxo acid salt of vanadium is added to an electroless copper plating solution containing a modifier.

In the method for manufacturing a multi-wire wiring board of the present invention, the methods conventionally used in the manufacture of a multi-wire wiring board are used except for the step of electroless copper plating of the through holes. Further, as the copper ion source, the complexing agent, the reducing agent and the pH adjusting agent in the plating bath used in the plating step, those conventionally used can be used. Further, the plating bath may contain additives such as polyethylene glycol and α, α′-dipyridyl.

The present invention is characterized by using a plating bath in which vanadium oxide and vanadium oxoacid salt are added to the plating solution. Vanadium pentoxide (V ₂ O ₅ ) is preferably used as the vanadium oxide. Sodium metavanadate as oxoacid salt of vanadium _{(NaVO 3 · 4 H 2 O} ) is preferably used. The addition amount of vanadium oxide or vanadium oxoacid salt is preferably 0.05 × 10 ⁻⁵ to 30 × 10 ⁻⁵ mol / dm ³ .

[0007]

[Operation] In the manufacture of multi-wire wiring boards, in order to improve the connection reliability between the exposed portion of the through-hole wire and the electroless copper plating of the through-hole, in the alkaline permanganate treatment solution in the hole cleaning step before plating. The wire coating layer is etched back to produce a plated grip. However, the alkali permanganate solution and the seeding process solution after that are easily trapped in the etched back wire coating layer and in the portion where the through-hole after the drilling has a large roughness. Cannot be removed. These trapped solutions behave as plating-suppressing contaminants in the electroless copper plating solution, so in plating baths that are sensitive to plating solution contaminants, plating deposition is inhibited and the start of plating deposition is delayed, resulting in thinner plating. Or, in severe cases, it will become a plating void. However, if a plating bath containing vanadium oxide or vanadium oxoacid salt is used, the formalin oxidation reaction and copper ion reduction reaction are not suppressed even if contaminants are present in the vicinity of the through-hole wire, and the plating coating is rapid. Therefore, the plating voids can be suppressed.

[0008]

EXAMPLES The present invention will now be described in detail based on examples, but the present invention is not limited thereto. Epoxy laminated plate containing a catalyst such as palladium which becomes a catalyst for electroless copper plating reaction (manufactured by Hitachi Chemical Co., Ltd., trade name M)
CL-E168) an epoxy adhesive for wire wiring containing a catalyst such as palladium on both sides (manufactured by Hitachi Chemical Co., Ltd.,
GEA-05N AS150) is pressed and φ0.10
mm Copper wire with insulation coating layer (Hitachi Cable, HB
H wire) is laid on both sides, and prepreg (GEA-168N manufactured by Hitachi Chemical Co., Ltd.) and copper foil are pressed on the wire, and holes are drilled in the obtained substrate, and then hole cleaning is performed with an alkaline permanganate solution. Then, a plating experiment was performed using a substrate on which a catalyst was provided with a palladium and tin colloidal solution (HS-201B manufactured by Hitachi Chemical Co., Ltd.). Table 1 shows the composition of the electroless copper plating bath used in this experiment. The microsection of the plated substrate was used to measure the plating coverage of the through-hole wire portion and observe the presence or absence of voids. The plating coverage of the through-hole wire part was calculated by the following formula. The results are shown in Table 2. Plating coverage = {(location where both sides of the wire are coated with plating x 2 + location where one side is coated x 1) / (number of wire connections in each sample x 2)} x 100

[0009]

[Table 1]

The target plating thickness was based on the thickness plated on the copper foil deposition rate monitor.

FIG. 1 is a cross-sectional view of a through hole portion of a multi-wire wiring board obtained by the present invention, in which 1 is a conductive wire, 2 is an insulating layer of the conductive wire, 3 is an adhesive for wiring, and 4 Is a prepreg, 5 is an outer layer copper foil, and 6 is electroless plated copper. FIG. 2 is a sectional view of a through-hole wire portion of a conventional multi-wire wiring board. 7 is a plating void,
8 is a thin portion of plating. FIG. 3 is a graph showing the relationship between the target plating thickness on copper and the wire portion plating coverage.

Comparative Example The presence or absence of through-hole wire portion plating voids and through-hole wire portion plating coverage when a sample substrate was plated with a plating solution containing no vanadium pentoxide are shown in Table 2 and FIG. 3, respectively. FIG. 3 is a graph showing the relationship between the plating thickness on the copper foil monitor and the plating coverage of the through-hole wire portion.

As shown in FIG. 3, when a multi-wire wiring board was plated with a bath containing vanadium pentoxide 1.0 × 10 ^-5 mol / dm ³ (Example), 2.5 μm
On the copper foil monitor, the through-hole wire coating layer is completely covered with electroless plated copper, whereas when vanadium pentoxide is not added (comparative example), Even if the plating thickness is 15 μm, some plating voids remain, and this graph clearly shows the effect of the present invention. In addition, from the results of the vanadium pentoxide addition concentration shown in Table 1 and the presence or absence of the occurrence of plating voids in the through holes, the addition amount of vanadium oxide or vanadium oxoacid salt was 0.05 × 10 ⁻⁵ to 30 × 10 ^-5 mol /
It turns out that dm ³ is desirable.

[0014]

[Table 2] Target plating thickness = 30 μm

[0015]

According to the present invention, in the method for manufacturing a multi-wire wiring board, through-hole plating for connecting the conductive wire exposed in the through-hole after drilling,
Through-hole wire portion is obtained by plating using an electroless copper plating solution containing at least copper ions and their complexing agent, reducing agent and pH adjusting agent, with a vanadium oxide or vanadium oxoacid salt added thereto. It is possible to manufacture a multi-wire wiring board having excellent wire connection portions by eliminating plating voids that tend to occur in

[Brief description of drawings]

FIG. 1 is a sectional view of a through hole wire portion of the present invention.

FIG. 2 is a sectional view of a through-hole wire portion of a conventional multi-wire wiring board.

FIG. 3 is a graph showing the relationship between the plating thickness on the copper foil monitor and the plating coverage of the through-hole wire portion.

[Explanation of symbols]

 1 conductive wire 2 insulating layer 3 adhesive for wiring 4 prepreg 5 outer layer copper foil 6 electroless plating copper 7 plating void 8 thin plating part

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Koji Ueyama 1500 Ogawa, Shimodate City, Ibaraki Prefecture Hitachi Chemical Co., Ltd. Electronic Components Division

Claims (2)

[Claims] 1. An inner layer circuit board is pressed with an adhesive for wiring,
Wiring a conductive wire covered with an insulating layer on it,
After pressing a prepreg and an outer layer copper foil on it, a hole is formed in the obtained substrate to form a through hole, and the through hole portion of the wire is electrolessly plated to electrically bond the circuit to a multi-wire wiring board. In the manufacturing method of
As a plating bath for electroless plating, plating is performed using a plating bath in which vanadium oxide or vanadium oxoacid salt is added to an electroless copper plating solution containing at least copper ions and their complexing agent, reducing agent and pH adjusting agent. A method for manufacturing a multi-wire wiring board, comprising: 2. The addition concentration of the vanadium oxide or the vanadium oxoacid salt is 5.0 × 10 ^{−7 to} 3.0 × 1.
The method for producing a multi-wire wiring board according to claim 1, wherein the range is 0 ^-4 mol / dm ³ .