JPH0574648A - Laminated electronic component - Google Patents

Laminated electronic component

Info

Publication number
JPH0574648A
JPH0574648A JP23058691A JP23058691A JPH0574648A JP H0574648 A JPH0574648 A JP H0574648A JP 23058691 A JP23058691 A JP 23058691A JP 23058691 A JP23058691 A JP 23058691A JP H0574648 A JPH0574648 A JP H0574648A
Authority
JP
Japan
Prior art keywords
ceramic
electronic component
laminated
electrode
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23058691A
Other languages
Japanese (ja)
Other versions
JP3142013B2 (en
Inventor
Nagato Omori
長門 大森
Yoshiaki Kono
芳明 河野
Yukio Sakabe
行雄 坂部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP03230586A priority Critical patent/JP3142013B2/en
Publication of JPH0574648A publication Critical patent/JPH0574648A/en
Application granted granted Critical
Publication of JP3142013B2 publication Critical patent/JP3142013B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a laminated electronic component in which a decrease in an insulating resistance can be suppressed inexpensively even under a conventional baking condition by composing at least part of ceramic sintered unit of nonreducing ceramic material and employing an antioxidative copper alloy, in which one or more types of Si, Al, Be, Mg and Zn are added, as inner electrodes. CONSTITUTION:A laminated electronic component is formed of a ceramic sintered unit 2 obtained by integrally baking a plurality of ceramic green sheets to be laminated through at least one inner electrode 1 together with the electrode l. In such a laminated electronic component, at least part of the unit 2 is formed of a nonreducing ceramic material, and as the electrode 1, an antioxidative copper alloy, in which at least one type of 0.01-2.5wt.% of Si, 10.01-16.0wt.% of Al, 0.01-4.0wt.% of Be, 0.01-0.8wt.% of Mg and 1.0-59.5wt.% of Zn is added, is used. The component is, for example, a laminated ceramic capacitor.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、積層型電子部品、特
に、内部電極とセラミックグリーンシートを重ね合わせ
て一体焼成した積層セラミックコンデンサのような積層
型電子部品に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laminated electronic component, and more particularly to a laminated electronic component such as a laminated ceramic capacitor in which internal electrodes and ceramic green sheets are superposed and integrally fired.

【0002】[0002]

【従来の技術】通常、積層セラミックコンデンサは、誘
電体セラミックと内部電極とを所定枚数互いに積層し、
両端部に一対の外部電極を設けた構成を有している。上
下に対向する内部電極間に静電容量が発生し、この静電
容量は外部電極から取り出される。
2. Description of the Related Art Normally, a laminated ceramic capacitor is formed by laminating a predetermined number of dielectric ceramics and internal electrodes on each other.
It has a structure in which a pair of external electrodes is provided at both ends. An electrostatic capacitance is generated between the internal electrodes facing each other in the vertical direction, and this electrostatic capacitance is taken out from the external electrodes.

【0003】従来、このような積層セラミックコンデン
サの製造工程において、内部電極材料としてはPd,P
t,Ag−Pd等の貴金属が使用されていた。しかしな
がら、これらの貴金属は高価であり、積層セラミックコ
ンデンサのコストダウンを妨げる大きな要因となってい
た。そこで、近年、内部電極の材料として安価な卑金属
が用いられるようになった。例えば、内部電極材料とし
て銅を用いた場合、銅は150℃以上の自然雰囲気中で
は著しく酸化し、また、融点が1083℃と低いため、
1080℃以下の中性雰囲気中で焼成されている。この
ような条件下で用いられ、特性が劣化しない誘電体セラ
ミックとしては、Pb系材料が、特開昭62−8745
5号公報、同63−17252号公報、同63−172
51号公報、同63−319241号公報に開示されて
いる。
Conventionally, in the manufacturing process of such a monolithic ceramic capacitor, Pd and P are used as internal electrode materials.
Noble metals such as t and Ag-Pd were used. However, these noble metals are expensive and have been a major factor in preventing cost reduction of the monolithic ceramic capacitor. Therefore, in recent years, an inexpensive base metal has been used as a material for the internal electrodes. For example, when copper is used as the internal electrode material, copper is significantly oxidized in a natural atmosphere at 150 ° C. or higher, and its melting point is as low as 1083 ° C.
It is fired in a neutral atmosphere at 1080 ° C or lower. As a dielectric ceramic which is used under such conditions and whose characteristics do not deteriorate, a Pb-based material is disclosed in JP-A-62-8745.
5 gazette, the same 63-17252 gazette, the same 63-172.
No. 51 and No. 63-319241.

【0004】[0004]

【発明が解決しようとする課題】前記公報に開示されて
いる材料は酸化鉛を含む誘電体セラミックであり、これ
らと内部電極となる金属銅ペーストからなる積層体を焼
成する場合、誘電体が還元されず、かつ、内部電極が酸
化されない中性雰囲気下で焼成される必要がある。誘電
体が還元されると絶縁抵抗が低下し、また内部電極が酸
化されると等価直列抵抗が増加したり、あるいは誘電体
中へ酸化銅の拡散が生じるため、いずれの場合もコンデ
ンサとしての機能を失う。
The material disclosed in the above publication is a dielectric ceramic containing lead oxide, and when a laminated body made of these and a metal copper paste to be an internal electrode is fired, the dielectric is reduced. And the internal electrodes must be fired in a neutral atmosphere that does not oxidize. Insulation resistance decreases when the dielectric is reduced, and equivalent series resistance increases when the internal electrode is oxidized, or copper oxide diffuses into the dielectric. Lose.

【0005】鉛及び銅の酸素分圧と温度の関係について
は、エル・エス・ダーケー(L.S.Darkeh)、
アール・ダブリュ・ガリー(R.W.Gurry)、ら
がフィジカル・ケミストリー・オブ・メタルズ(Phy
sical Chmistry of Metals)
(1953)で発表しており、図3に示すように、4C
u+O2=2Cu2Oの反応式で示される線より下方の領
域では銅は酸化されず、2Pb+O2=2PbOの反応
式で示される線より上方の領域では酸化鉛は還元されな
い。従って、理論的には、この二つの線間で挟まれた領
域で積層体を焼成すれば最良であるが、該領域は非常に
狭い範囲(例えば、1000℃では酸素分圧が約5×1
-7〜約8×10-8atm)であり、実際にこのような
範囲に酸素分圧をコントロールすることは生産技術的に
非常に困難である。
Regarding the relationship between the oxygen partial pressures of lead and copper and the temperature, see L. S. Darkeh,
R W Gurry, Raga Physical Chemistry of Metals (Phy)
(sical Chemistry of Metals)
(1953), as shown in Figure 3, 4C
Copper is not oxidized in a region below the line of the reaction formula of u + O 2 = 2Cu 2 O, and lead oxide is not reduced in a region above the line of the reaction formula of 2Pb + O 2 = 2PbO. Therefore, theoretically, it is best if the laminate is fired in a region sandwiched between these two lines, but that region is very narrow (for example, at 1000 ° C., the oxygen partial pressure is about 5 × 1).
It is 0 −7 to about 8 × 10 −8 atm), and it is very difficult in production technology to actually control the oxygen partial pressure within such a range.

【0006】このため生産段階において、内部電極の酸
化による等価直列抵抗の増大、誘電体中への拡散、誘電
体セラミックの還元による絶縁抵抗の低下などの不良が
発生しやすいという問題点を有していた。また、内部電
極の酸化ができるだけ発生しないような低酸素分圧雰囲
気下でバインダーのバーンアウトを実施した場合、バイ
ンダー成分の炭化現象が発生しやすい。このため、焼成
時に誘電体が残留しているカーボンにより還元され、素
子の絶縁抵抗の低下、焼結密度の低下が発生するという
問題点があった。
Therefore, in the production stage, defects such as increase in equivalent series resistance due to oxidation of internal electrodes, diffusion into the dielectric, and reduction in insulation resistance due to reduction of the dielectric ceramic are likely to occur. Was there. When the binder is burned out in a low oxygen partial pressure atmosphere in which the internal electrodes are not oxidized as much as possible, carbonization of the binder component is likely to occur. For this reason, there is a problem in that the dielectric is reduced by the remaining carbon during firing, resulting in a decrease in the insulation resistance of the element and a decrease in the sintering density.

【0007】本発明は前記の問題点を解消することを目
的とし、低コストでかつ従来の焼成条件下においても、
絶縁抵抗の低下などの不良発生を抑えられる積層型電子
部品を提供するものである。
An object of the present invention is to eliminate the above-mentioned problems, and at low cost and under conventional firing conditions,
Provided is a multilayer electronic component capable of suppressing the occurrence of defects such as a decrease in insulation resistance.

【0008】[0008]

【課題を解決するための手段】以上の課題を解決するた
め、本発明に係る積層型電子部品は、内部電極とセラミ
ックグリーンシートとを一体焼成して得られたセラミッ
ク焼結体からなり、このセラミック焼結体中の少なくと
も一部分が非還元性セラミック材料で構成されているこ
と、かつ、内部電極として、Si:0.01〜2.5w
t%、Al:0.01〜16.0wt%、Be:0.0
1〜4.0wt%、Mg:0.01〜0.8wt%又は
Zn:1.0〜59.5wt%のうち少なくとも1種類
を添加元素とする耐酸化性銅合金を用いたことを特徴と
する。
In order to solve the above problems, a laminated electronic component according to the present invention comprises a ceramic sintered body obtained by integrally firing an internal electrode and a ceramic green sheet. At least a part of the ceramic sintered body is composed of a non-reducing ceramic material, and as an internal electrode, Si: 0.01 to 2.5 w
t%, Al: 0.01 to 16.0 wt%, Be: 0.0
1 to 4.0 wt%, Mg: 0.01 to 0.8 wt% or Zn: 1.0 to 59.5 wt% using an oxidation resistant copper alloy containing at least one kind as an additive element. To do.

【0009】[0009]

【作用】高温での耐酸化性に優れた前記銅合金を内部電
極材料として用いると、焼成可能な雰囲気範囲が酸化側
に広がるため、酸素分圧コントロールが容易となるだけ
でなく、酸化が抑制されることで不必要な内部電極構成
金属のユニット内への拡散が低減できる。また、より高
酸素分圧側での焼成が可能となるため、セラミック層の
還元による絶縁抵抗の低下、あるいは誘電率の低下等の
特性劣化が防止される。
[Function] When the copper alloy having excellent resistance to oxidation at high temperature is used as an internal electrode material, the range of calcinable atmosphere expands to the oxidation side, which not only facilitates control of oxygen partial pressure but also suppresses oxidation. By doing so, unnecessary diffusion of the internal electrode constituent metal into the unit can be reduced. Further, since it becomes possible to perform firing on the side of higher oxygen partial pressure, it is possible to prevent characteristic deterioration such as reduction of insulation resistance or reduction of dielectric constant due to reduction of the ceramic layer.

【0010】さらに前記銅合金を内部電極材料として用
いた場合、セラミック層と内部電極との密着強度が向上
することで、積層型電子部品におけるデラミネーション
の発生を抑えることが可能である。
Further, when the copper alloy is used as a material for the internal electrodes, the adhesion strength between the ceramic layer and the internal electrodes is improved, so that delamination in the laminated electronic component can be suppressed.

【0011】[0011]

【実施例】以下、本発明に係る積層型電子部品の実施例
を図面を参照しつつ詳細に説明する。以下に説明する実
施例は、本発明を積層セラミックコンデンサに適応した
ものである。図1において、積層セラミックコンデンサ
は、複数個の誘電体セラミック2と、この誘電体セラミ
ック2を介して互いに積層された状態で配置された静電
容量を形成するための複数個の内部電極1と、内部電極
1の所定のものに接続された静電容量取り出しのための
一対の外部電極3とから構成されている。誘電体セラミ
ック2としては耐還元性に優れた誘電体材料が用いられ
ている。内部電極1としては安価な卑金属であり、電気
電導度が高く、また高温での耐酸化性の強い銅合金が用
いられている。外部電極3の材料としては、ニッケルも
しくは銅、またはこれらの合金、ガラスフリットを添加
した銅、または銅合金、銀、パラジウム、銀−パラジウ
ム合金等が挙げられるが積層セラミックコンデンサの使
用用途等により適宜な材料を用いることができる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a laminated electronic component according to the present invention will be described below in detail with reference to the drawings. The embodiment described below is an application of the present invention to a monolithic ceramic capacitor. In FIG. 1, a monolithic ceramic capacitor comprises a plurality of dielectric ceramics 2 and a plurality of internal electrodes 1 for forming capacitances which are arranged in a laminated state with the dielectric ceramics 2 interposed therebetween. , A pair of external electrodes 3 for extracting capacitance, which are connected to predetermined ones of the internal electrodes 1. As the dielectric ceramic 2, a dielectric material having excellent reduction resistance is used. As the internal electrode 1, a cheap base metal, a copper alloy having high electric conductivity and strong oxidation resistance at high temperature is used. Examples of the material of the external electrode 3 include nickel or copper, alloys thereof, copper added with glass frit, copper alloy, silver, palladium, silver-palladium alloy, or the like. Any material can be used.

【0012】ここで、各材料の具体例とコンデンサの製
造工程について詳述する。具体的には誘電体粉末とし
て、 92Pb(Mg1/3Nb2/3)O3−2Pb(Cu1/2W1/2)−6PbTiO3 (mol%) の3成分組成物が得られるように、PbO、MgC
3、Nb25、TiO3、及びCuO、WO3を秤量
し、ボールミルで16時間湿式混合した後、蒸発乾燥し
て混合粉末を得た。このようにして得られた粉末をジル
コニア質の匣に入れ、680〜730℃で2時間焼成し
た後、200メッシュの篩を通過するように粗粉砕して
酸化鉛を含む誘電体粉末を準備した。
Here, specific examples of each material and the manufacturing process of the capacitor will be described in detail. Specifically, a three-component composition of 92Pb (Mg 1/3 Nb 2/3 ) O 3 −2Pb (Cu 1/2 W 1/2 ) −6PbTiO 3 (mol%) was obtained as the dielectric powder. To PbO, MgC
O 3 , Nb 2 O 5 , TiO 3 , CuO and WO 3 were weighed, wet mixed in a ball mill for 16 hours and then evaporated to dryness to obtain a mixed powder. The powder thus obtained was placed in a zirconia-shaped box, baked at 680 to 730 ° C. for 2 hours, and then coarsely pulverized so as to pass through a 200-mesh sieve to prepare a dielectric powder containing lead oxide. ..

【0013】この誘電体セラミック原料粉末に、 7Li2O−42BaO−22B23−29SiO2 (mo1%) で表される組成の焼結助剤(特開昭63−151658
号公報参照)を2.5wt%添加し、ポリビニールブチ
ラール系のバインダーと有機溶媒を加えてボールミルに
て16時間湿式混合し、スラリーを調整した。続いて、
このスラリーをドクターブレード法により、厚み35μ
mのグリーンシートを成形した。
A sintering aid having a composition represented by 7Li 2 O-42BaO-22B 2 O 3 -29SiO 2 (mo1%) was added to this dielectric ceramic raw material powder (Japanese Patent Laid-Open No. 63-151658).
(Refer to Japanese Patent Laid-Open No. 2004-242242), and a polyvinyl butyral binder and an organic solvent were added and wet mixed for 16 hours in a ball mill to prepare a slurry. continue,
The thickness of this slurry is 35 μm by the doctor blade method.
m green sheet was molded.

【0014】次に、前記セラミックグリーンシート上
に、第1表に示す組成に調整した銅合金粉末からなる電
極ペーストを印刷し、内部電極を形成した。その後、図
1に示すような構成で積層し、熱圧着して積層体を得
た。
Then, an electrode paste made of copper alloy powder adjusted to have the composition shown in Table 1 was printed on the ceramic green sheet to form internal electrodes. Then, they were laminated in a structure as shown in FIG. 1 and thermocompression bonded to obtain a laminated body.

【0015】[0015]

【表1】 [Table 1]

【0016】[0016]

【表2】 [Table 2]

【0017】このようにして得られた積層体をN2雰囲
気中で350℃に加熱し、バインダーを燃焼させた後、
2、H2及びH2O、CO2、CO等の混合ガスを用いた
還元性雰囲気下、850〜1000℃で2時間焼成し
た。焼成後に焼成体の両端面に銀ペーストを塗布し、N
2雰囲気中800℃で焼き付け、外部電極を形成した。
このようにして得られた積層セラミックコンデンサの寸
法、構造は以下に示すとうりである。
The laminate thus obtained was heated to 350 ° C. in an N 2 atmosphere to burn the binder,
Firing was performed at 850 to 1000 ° C. for 2 hours in a reducing atmosphere using a mixed gas of N 2 , H 2 and H 2 O, CO 2 , CO and the like. After firing, apply silver paste to both end faces of the fired body, and
2 baked at 800 ° C. in an atmosphere to form an external electrode.
The dimensions and structure of the monolithic ceramic capacitor thus obtained are as follows.

【0018】 得られた積層セラミックコンデンサの試料について、2
5℃における1kHz、1Vrmsでの静電容量(C)
及び誘電損失(tanδ)を測定した。さらに絶縁抵抗
計を用い、50Vの電圧を2分間印加した後、絶縁抵抗
(R)を測定した。 その後、チップを樹脂で固めて研
磨し、倍率200倍の顕微鏡観察を行い、デラミネーシ
ョンの有無を検査した。
[0018] Regarding the obtained multilayer ceramic capacitor samples, 2
Capacitance (C) at 1kHz and 1Vrms at 5 ° C
And the dielectric loss (tan δ) were measured. Further, using an insulation resistance meter, after applying a voltage of 50 V for 2 minutes, the insulation resistance (R) was measured. After that, the chips were hardened with a resin, polished, and observed under a microscope at a magnification of 200 to examine the presence or absence of delamination.

【0019】また、焼成は図2に示す酸素分圧雰囲気
下、具体的には図3に示した4Cu+O2=2Cu2Oと
2Pb+O2=2PbOの反応式で示される領域の中央
に示される酸素分圧(図2中C参照)、及び4Cu+O
2=2Cu2Oの反応式で示される酸素分圧よりも0.5
桁酸化側の酸素分圧(図2中B参照)、及び1桁酸化側
の酸素分圧(図2中A参照)に雰囲気をコントロールし
て行った。その結果を第2表に示す。なお、評価にはそ
れぞれ200個の試料を用い、第2表中の値はショート
のために測定不能なユニット以外の平均値である。ま
た、第1表、第2表中試料番号に※印を付したのは本発
明品以外のものである。
The firing is carried out in an oxygen partial pressure atmosphere shown in FIG. 2, specifically, in the center of the region shown by the reaction formula of 4Cu + O 2 = 2Cu 2 O and 2Pb + O 2 = 2PbO shown in FIG. Partial pressure (see C in Fig. 2), and 4Cu + O
2 = 2 Cu 2 O 0.5 than the oxygen partial pressure shown in the reaction formula
The atmosphere was controlled to the oxygen partial pressure on the digit oxidation side (see B in FIG. 2) and the oxygen partial pressure on the digit digit oxidation side (see A in FIG. 2). The results are shown in Table 2. Note that each of the 200 samples was used for evaluation, and the values in Table 2 are average values of units other than units that cannot be measured due to a short circuit. In addition, the samples marked with * in Tables 1 and 2 are other than the products of the present invention.

【0020】[0020]

【表3】 [Table 3]

【0021】[0021]

【表4】 [Table 4]

【0022】[0022]

【表5】 [Table 5]

【0023】[0023]

【表6】 [Table 6]

【0024】[0024]

【表7】 [Table 7]

【0025】[0025]

【表8】 [Table 8]

【0026】本発明において銅合金におけるSi,A
l,Be,Mg及びZnの含有量を限定した理由は次の
通りである。第2表から明らかなように、内部電極中に
Si,Al,Be,Mg及びZnが全く含有されていな
い場合(試料番号1)、即ち従来の銅電極では雰囲気条
件Cで焼成を行っても、内部電極である銅の不必要な拡
散が生じ、誘電体絶縁抵抗値不良(抵抗値R≦1×10
8Ωの場合、あるいはショートの場合に抵抗値不良とし
た)が発生したり、また脱バインダー時の酸化膨張によ
りデラミネーションが生じる等の不良が発生した。
In the present invention, Si, A in the copper alloy
The reason for limiting the contents of 1, Be, Mg and Zn is as follows. As is clear from Table 2, when Si, Al, Be, Mg and Zn are not contained in the internal electrode (Sample No. 1), that is, the conventional copper electrode is fired under the atmospheric condition C Unnecessary diffusion of copper, which is an internal electrode, occurs, resulting in a defective dielectric insulation resistance value (resistance value R ≦ 1 × 10
In the case of 8 Ω or in the case of short circuit, the resistance value was considered to be defective), and defects such as delamination due to oxidative expansion during debinding were generated.

【0027】これに対し、内部電極中にSi,Al,B
e,Mgのうち少なくとも1種類が0.01wt%以上
(試料番号2,6,10,14)、あるいはZnが1.
0wt%以上(試料番号18)含まれた場合、銅電極の
耐酸化性が向上し、抵抗値不良、デラミネーションの発
生が抑制された。Siの含有量が2.5wt%よりも多
い場合(試料番号5,21,40)、あるいはMgの含
有量が0.8wt%よりも多い場合(試料番号16,3
4)には、逆に耐酸化性が低下し、いずれの雰囲気にお
いても内部電極の酸化膨張によりデラミネーションが発
生し、静電容量が大きく低下した。また、ショート不
良、抵抗値不良も生じた。
On the other hand, Si, Al, B in the internal electrode
At least one of e and Mg is 0.01 wt% or more (Sample Nos. 2, 6, 10, 14), or Zn is 1.
When it was contained in an amount of 0 wt% or more (Sample No. 18), the oxidation resistance of the copper electrode was improved, and the resistance value failure and delamination were suppressed. When the Si content is more than 2.5 wt% (Sample Nos. 5, 21, 40), or when the Mg content is more than 0.8 wt% (Sample Nos. 16, 3)
In 4), on the contrary, the oxidation resistance was lowered, and in any atmosphere, delamination occurred due to oxidative expansion of the internal electrodes, resulting in a large decrease in capacitance. In addition, a short circuit defect and a resistance value defect also occurred.

【0028】また、Alの含有量が16.0wt%より
も多い場合(試料番号9)、Beの含有量が4.0wt
%よりも多い場合(試料番号13)、あるいはZnの含
有量が59.5wt%よりも多い場合(試料番号20)
には、内部電極が完全に合金化しておらず玉状に凝集す
ることによる内部電極切れが生じ、これにより静電容量
が大きく低下した。またデラミネーションも発生し、シ
ョート不良も生じた。
When the Al content is more than 16.0 wt% (Sample No. 9), the Be content is 4.0 wt%.
% (Sample No. 13) or Zn content is more than 59.5 wt% (Sample No. 20)
In, the internal electrodes were not completely alloyed and aggregated in a ball shape, resulting in disconnection of the internal electrodes, which significantly reduced the capacitance. In addition, delamination also occurred and short circuit defects occurred.

【0029】以上の結果よりSi,Al,Be,Mg及
びZnの内部電極に用いる銅合金への添加元素含有量
は、それぞれ、 Si:0.01〜 2.5wt% Al:0.01〜16.0wt% Be:0.01〜 4.0wt% Mg:0.01〜 0.8wt% Zn:1.0〜 59.5wt% の範囲とすることが必要である。
From the above results, the additive element contents of Si, Al, Be, Mg and Zn in the copper alloy used for the internal electrodes are as follows: Si: 0.01 to 2.5 wt% Al: 0.01 to 16 0.0 wt% Be: 0.01 to 4.0 wt% Mg: 0.01 to 0.8 wt% Zn: 1.0 to 59.5 wt%

【0030】このように本発明に係る積層セラミックコ
ンデンサでは図3に示した酸素分圧範囲よりも高酸素分
圧で焼成を行っても、電極の酸化により発生する酸化銅
等の金属酸化物の誘電体中への拡散による素子抵抗の低
下、及びデラミネーション等の発生による容量値低下は
見られず、逆に誘電体の還元が抑制されたために特性は
向上した。また、Si,Al,Be,Mg及びZnの添
加元素による保護酸化物の生成により、密着強度が向上
しデラミネーションの発生が抑制された。
As described above, in the monolithic ceramic capacitor according to the present invention, even if firing is carried out at an oxygen partial pressure higher than the oxygen partial pressure range shown in FIG. 3, metal oxides such as copper oxide generated by the oxidation of electrodes are formed. There was no decrease in device resistance due to diffusion into the dielectric, and no decrease in capacitance due to the occurrence of delamination, etc. On the contrary, the reduction of the dielectric was suppressed and the characteristics were improved. Further, the formation of the protective oxide by the additive elements of Si, Al, Be, Mg and Zn improved the adhesion strength and suppressed the occurrence of delamination.

【0031】なお、前記実施例では内部電極を形成する
方法としてペースト化してスクリーン印刷する形成方法
を示したが、これに限定されるものではなく、蒸着法、
メッキ法等を用いても同等の効果が得られる。また、以
上の説明では本発明を積層セラミックコンデンサに適用
した実施例について説明したが、本発明は積層セラミッ
クコンデンサ以外の積層型のセラミック電子部品一般に
適応することができる。例えば、積層型のCR複合部
品、インダクタあるいはバリスタ等の任意の積層型電子
部品に本発明を適応することができる。しかも、セラミ
ック焼結体の全てが非還元性セラミック材料である必要
は必ずしもなく、少なくとも前記銅合金からなる内部電
極に接する一部分のセラミック焼結体層のみが前記のよ
うな非還元性セラミック材料で構成されておれば本発明
の効果を得ることができる。
In addition, in the above-mentioned embodiment, the forming method of forming the paste into the paste and screen-printing is shown as the method of forming the internal electrodes, but the present invention is not limited to this, and the vapor deposition method,
Even if a plating method or the like is used, the same effect can be obtained. Further, in the above description, the embodiment in which the present invention is applied to the laminated ceramic capacitor has been described, but the present invention can be applied to general laminated ceramic electronic components other than the laminated ceramic capacitor. For example, the present invention can be applied to any laminated electronic component such as a laminated CR composite component, an inductor or a varistor. Moreover, it is not always necessary that all of the ceramic sintered bodies are non-reducing ceramic materials, and only at least a part of the ceramic sintered body layers contacting the internal electrodes made of the copper alloy are made of non-reducing ceramic materials as described above. If configured, the effect of the present invention can be obtained.

【0032】[0032]

【発明の効果】以上の説明から明らかなように、本発明
によれば、内部電極材料として安価な銅合金を使用した
ため、貴金属を使用した従来の電子部品に比べて材料コ
ストを大幅に下げることができる。しかも、Si,A
l,Be,Mg,Znのうち少なくとも1種類を銅合金
に対して所定の重量比で添加したため、従来の純銅電極
に比べて耐酸化性が向上し、高酸素分圧中での焼成が可
能となり、これにより絶縁抵抗が高く、また電極界面に
生成する添加元素保護酸化物によりセラミック層との漏
れ性が向上し、デラミネーション発生率の低い、高信頼
性の積層型電子部品を提供することができる。
As is apparent from the above description, according to the present invention, since the inexpensive copper alloy is used as the material of the internal electrodes, the material cost can be remarkably reduced as compared with the conventional electronic parts using the noble metal. You can Moreover, Si, A
Since at least one of l, Be, Mg, and Zn is added to the copper alloy in a predetermined weight ratio, the oxidation resistance is improved compared to the conventional pure copper electrode, and firing in a high oxygen partial pressure is possible. Accordingly, it is possible to provide a highly reliable multilayer electronic component having a high insulation resistance, improving the leakage property with the ceramic layer by the additional element protective oxide generated at the electrode interface, and having a low delamination occurrence rate. You can

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例としての積層セラミックコン
デンサを示す断面図。
FIG. 1 is a cross-sectional view showing a monolithic ceramic capacitor as an embodiment of the present invention.

【図2】図1に示した積層セラミックコンデンサの焼成
雰囲気を示すグラフ。
FIG. 2 is a graph showing a firing atmosphere of the monolithic ceramic capacitor shown in FIG.

【図3】鉛及び銅の酸素分圧と温度との関係を示すグラ
フ。
FIG. 3 is a graph showing the relationship between oxygen partial pressure of lead and copper and temperature.

【符号の説明】[Explanation of symbols]

1…内部電極 2…誘電体セラミック 3…外部電極 1 ... Internal electrode 2 ... Dielectric ceramic 3 ... External electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 少なくとも1枚の内部電極を介在して積
層された複数枚のセラミックグリーンシートを前記内部
電極と共に一体焼成して得られたセラミック焼結体から
なる積層型電子部品において、 前記セラミック焼結体の少なくとも一部分が非還元性セ
ラミック材料で構成されており、かつ、 前記内部電極として、 Si:0.01〜 2.5wt% Al:0.01〜16.0wt% Be:0.01〜 4.0wt% Mg:0.01〜 0.8wt% Zn:1.0〜 59.5wt% のうち少なくとも1種類を添加元素とする耐酸化性銅合
金を用いたこと、 を特徴とする積層型電子部品。
1. A multilayer electronic component comprising a ceramic sintered body obtained by integrally firing a plurality of ceramic green sheets laminated with at least one internal electrode interposed therebetween, wherein the ceramic is a ceramic sintered body. At least a part of the sintered body is composed of a non-reducing ceramic material, and the internal electrodes include Si: 0.01 to 2.5 wt% Al: 0.01 to 16.0 wt% Be: 0.01. -4.0 wt% Mg: 0.01-0.8 wt% Zn: 1.0-59.5 wt% An oxidation resistant copper alloy containing at least one element as an additive element is used. Mold electronic components.
JP03230586A 1991-09-10 1991-09-10 Multilayer electronic components Expired - Lifetime JP3142013B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP03230586A JP3142013B2 (en) 1991-09-10 1991-09-10 Multilayer electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP03230586A JP3142013B2 (en) 1991-09-10 1991-09-10 Multilayer electronic components

Publications (2)

Publication Number Publication Date
JPH0574648A true JPH0574648A (en) 1993-03-26
JP3142013B2 JP3142013B2 (en) 2001-03-07

Family

ID=16910066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03230586A Expired - Lifetime JP3142013B2 (en) 1991-09-10 1991-09-10 Multilayer electronic components

Country Status (1)

Country Link
JP (1) JP3142013B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002261345A (en) * 2000-12-28 2002-09-13 Denso Corp Laminated one-body baked type electromechanical conversion element
JP2004266260A (en) * 2003-02-12 2004-09-24 Denso Corp Laminated piezoelectric element

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10164326A1 (en) 2000-12-28 2002-10-31 Denso Corp Integrally fired, layered electromechanical conversion element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002261345A (en) * 2000-12-28 2002-09-13 Denso Corp Laminated one-body baked type electromechanical conversion element
JP2004266260A (en) * 2003-02-12 2004-09-24 Denso Corp Laminated piezoelectric element
JP4635439B2 (en) * 2003-02-12 2011-02-23 株式会社デンソー Multilayer piezoelectric element and method for manufacturing the same

Also Published As

Publication number Publication date
JP3142013B2 (en) 2001-03-07

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