JPH0572243A - Measuring method of integrated circuit device - Google Patents
Measuring method of integrated circuit deviceInfo
- Publication number
- JPH0572243A JPH0572243A JP3231438A JP23143891A JPH0572243A JP H0572243 A JPH0572243 A JP H0572243A JP 3231438 A JP3231438 A JP 3231438A JP 23143891 A JP23143891 A JP 23143891A JP H0572243 A JPH0572243 A JP H0572243A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- differential amplifier
- differential
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は差動増幅器を内蔵した集
積回路装置の計測方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a measuring method of an integrated circuit device having a built-in differential amplifier.
【０００２】[0002]
【従来の技術】差動増幅回路は、整合性の良い素子を用
いて回路構成を行ない、かつ差動入力端に平衡した入力
バイアスを与えることを配慮していれば、平衡した出力
電圧が得られることと、周囲温度の変化によって特性が
変化しにくいことから、多段直結接続された増幅器を構
成するのに好都合であり、集積回路装値において多用さ
れている。しかしながら、集積回路装値内部に集積化さ
れた素子、たとえばトランジスタや抵抗等は、常に整合
性が良いとは限らず、酸化膜のエッチング精度、拡散炉
内の温度分布、拡散炉内の不純物濃度の分布等によって
多少のばらつきを有している。この素子の相対ばらつき
が、差動増幅器の動作のアンバランスに関与して来る。
特に、多段直結接続された増幅器では、初段の増幅器が
オフセット電圧を発生すると、後段の増幅器がそのオフ
セット電圧を更に増幅することから、初段増幅器の入力
オフセット電圧の特性が最も重視される。2. Description of the Related Art In a differential amplifier circuit, a balanced output voltage can be obtained by considering the circuit configuration using elements having good matching and giving a balanced input bias to differential input terminals. In addition, since it is difficult to change the characteristics due to the change of the ambient temperature, it is convenient to configure an amplifier connected in multiple stages and directly connected, and is often used in integrated circuit components. However, the elements integrated in the integrated circuit device, such as transistors and resistors, do not always have good matching, and the etching accuracy of the oxide film, the temperature distribution in the diffusion furnace, and the impurity concentration in the diffusion furnace. There is some variation depending on the distribution of. The relative variation of the elements contributes to the imbalance in the operation of the differential amplifier.
In particular, in an amplifier connected in multiple stages, when the first-stage amplifier generates an offset voltage, the latter-stage amplifier further amplifies the offset voltage. Therefore, the input offset voltage characteristic of the first-stage amplifier is most important.
【０００３】これらのことから、差動増幅器のオフセッ
ト電圧や利得等の特性は、製造過程の各段階に応じて、
ＤＣテスター、ＡＣテスターおよびＡＣ評価ユニット等
を用いて検査を行なっている。ＤＣテスターを用いたＤ
Ｃ検査は、後工程の歩留まりを高くするために、ウエハ
状態の半完成品の段階で集積回路装値の電気的特性を検
査している。従って、ＤＣテスターによる測定精度が悪
いと、後工程の歩留まりを悪化する要因となり、ＤＣ検
査工程における高精度の測定が望まれる。From these facts, the characteristics such as the offset voltage and the gain of the differential amplifier depend on each stage of the manufacturing process.
The inspection is performed using a DC tester, an AC tester, an AC evaluation unit and the like. D using a DC tester
In the C inspection, the electrical characteristics of the integrated circuit component values are inspected at the stage of a semi-finished product in a wafer state in order to increase the yield of the subsequent process. Therefore, if the measurement accuracy of the DC tester is poor, it will deteriorate the yield of the subsequent process, and high-precision measurement in the DC inspection process is desired.
【０００４】以下に従来の構成について、図３を参照し
ながら説明する。図３において、差動増幅器１の非反転
入力端子２に電圧源３を接続し、差動増幅器１の反転入
力端子４に電圧源５を接続し、差動増幅器１の入力端に
入力電圧を与える。そして、出力端子６に接続された電
圧計７で出力電圧を測定する構成にしている。A conventional configuration will be described below with reference to FIG. In FIG. 3, the voltage source 3 is connected to the non-inverting input terminal 2 of the differential amplifier 1, the voltage source 5 is connected to the inverting input terminal 4 of the differential amplifier 1, and the input voltage is applied to the input terminal of the differential amplifier 1. give. The voltmeter 7 connected to the output terminal 6 measures the output voltage.
【０００５】このように構成された、集積回路装置の計
測方法について説明する。差動増幅器１の利得を測定す
る場合、差動増幅器１の非反転入力端子２に電圧源３の
基準電圧を与え、反転入力端子４に電圧源５の電圧を与
える。そして、電圧源３の電圧を固定して、電圧源５の
電圧を可変し、差動増幅器１の出力電圧が「高」または
「低」の状態に固定されるように、電圧源５の電圧を設
定する。すなわち、差動増幅器１の出力トランジスタを
飽和状態または遮断状態にする。これは、製造工程で用
いる電圧源３，５が必ずしも安定な電圧源ではなく、周
囲の環境から電圧源３，５に多くのノイズが混入するこ
とがあり、高利得の増幅器１を測定する時、特に増幅器
１の出力電圧が不安定になり、測定値の信頼性が悪化す
るが、その悪影響を排除するためである。A measuring method of the integrated circuit device thus configured will be described. When measuring the gain of the differential amplifier 1, the reference voltage of the voltage source 3 is applied to the non-inverting input terminal 2 of the differential amplifier 1, and the voltage of the voltage source 5 is applied to the inverting input terminal 4. Then, by fixing the voltage of the voltage source 3 and varying the voltage of the voltage source 5, the voltage of the voltage source 5 is fixed so that the output voltage of the differential amplifier 1 is fixed in the “high” or “low” state. To set. That is, the output transistor of the differential amplifier 1 is brought into a saturated state or a cutoff state. This is because the voltage sources 3 and 5 used in the manufacturing process are not always stable voltage sources, and a lot of noise may be mixed into the voltage sources 3 and 5 from the surrounding environment. This is because in particular, the output voltage of the amplifier 1 becomes unstable and the reliability of the measured value deteriorates, but the adverse effect thereof is eliminated.
【０００６】たとえば、電源電圧１０Ｖ、利得１００ｄ
Ｂ、出力電圧振幅５ＶP-Pの差動増幅器の特性を測定す
る場合、非反転入力端子２に対して反転入力端子４の入
力電圧を−０.０５ｍＶ以下に設定すれば、差動増幅器
の出力状態を「高」に固定することができ、逆に、反転
入力端子４の入力電圧を０.０５ｍＶ以上に設定すれ
ば、差動増幅器の出力状態を「低」に固定することがで
きる。For example, power supply voltage 10V, gain 100d
B. When measuring the characteristics of a differential amplifier with an output voltage amplitude of 5 V PP , if the input voltage of the inverting input terminal 4 is set to -0.05 mV or less with respect to the non-inverting input terminal 2, the output state of the differential amplifier Can be fixed to "high", and conversely, if the input voltage of the inverting input terminal 4 is set to 0.05 mV or higher, the output state of the differential amplifier can be fixed to "low".
【０００７】従って、入力電圧を＋１ｍＶと−１ｍＶの
二つのレベルに設定して、差動増幅器の出力電圧が
「低」から「高」へ変化した場合は、入力オフセット電
圧が±１ｍＶ以内と判断できる。そして、入力電圧を±
１ｍＶの範囲でレベル変化させても、差動増幅器の出力
電圧が「低」または「高」の状態から変化しなければ、
入力オフセット電圧が±１ｍＶ以上と判断できる。Therefore, when the input voltage is set to two levels of +1 mV and -1 mV and the output voltage of the differential amplifier changes from "low" to "high", it is determined that the input offset voltage is within ± 1 mV. it can. And input voltage ±
If the output voltage of the differential amplifier does not change from the "low" or "high" state even if the level is changed in the range of 1 mV,
It can be judged that the input offset voltage is ± 1 mV or more.
【０００８】[0008]
【発明が解決しようとする課題】上述したように、差動
増幅器１の非反転入力端子２と反転入力端子４の間の入
力電圧を入力オフセット電圧より小さな誤差範囲内で設
定する必要がある。具体的には、電圧源３，５の電圧設
定に際して、数百μＶ以下の精度で設定する必要があ
り、極めて高精度の電圧設定が要求される。As described above, it is necessary to set the input voltage between the non-inverting input terminal 2 and the inverting input terminal 4 of the differential amplifier 1 within an error range smaller than the input offset voltage. Specifically, when setting the voltage of the voltage sources 3 and 5, it is necessary to set the voltage with an accuracy of several hundreds μV or less, and extremely high-accuracy voltage setting is required.
【０００９】しかしながら、検査設備に用いる電圧源の
設定誤差は、印加する電圧レンジに対して約±０.２％
であるため、設定電圧を２.５Ｖとした場合、設定電圧
のばらつきが最大で±５ｍＶの誤差となり、入力オフセ
ット電圧の測定に必要とされる充分な精度が得れない。
このことから、上述の従来の測定方法を用いた場合、設
定電圧のばらつき分を配慮して、設定電圧を大きめに設
定しなければ、差動増幅器１の動作が確実にならなかっ
た。このため、従来の測定方法では、差動増幅器１のオ
フセット電圧の実力が±１ｍＶ以内であっても、±１１
ｍＶの保証しかできなかった。However, the setting error of the voltage source used for the inspection equipment is about ± 0.2% with respect to the applied voltage range.
Therefore, when the set voltage is set to 2.5 V, the variation of the set voltage becomes an error of ± 5 mV at the maximum, and sufficient accuracy required for measuring the input offset voltage cannot be obtained.
Therefore, when the above-mentioned conventional measuring method is used, the operation of the differential amplifier 1 cannot be ensured unless the set voltage is set to a large value in consideration of the variation in the set voltage. Therefore, according to the conventional measurement method, even if the offset voltage of the differential amplifier 1 is within ± 1 mV, ± 11
I could only guarantee mV.
【００１０】本発明は、上記の課題を解決するもので、
入力電圧の設定精度を向上し、オフセット電圧の測定精
度を向上することを目的としている。The present invention solves the above-mentioned problems.
The purpose is to improve the setting accuracy of the input voltage and the measurement accuracy of the offset voltage.
【００１１】[0011]
【課題を解決するための手段】この目的を達成するため
に本発明の集積回路装置の計測方法は、差動増幅器の二
つの差動入力端子のうち少なくとも一方の差動入力端子
に抵抗を介して前記二つの差動入力端子に同じバイアス
電圧を与え、前記抵抗に２段階の所定電流を与え、前記
２段階の所定電流に応じた前記差動増幅器の出力電圧の
変化量を測定し、前記差動増幅器の動作の良否を判断す
ることを特徴とする集積回路装置の計測方法である。In order to achieve this object, a measuring method of an integrated circuit device according to the present invention is such that at least one differential input terminal of two differential input terminals of a differential amplifier is connected via a resistor. Apply the same bias voltage to the two differential input terminals, apply a two-step predetermined current to the resistor, and measure the amount of change in the output voltage of the differential amplifier according to the two-step predetermined current. It is a measuring method of an integrated circuit device, characterized by judging whether the operation of a differential amplifier is good or bad.
【００１２】第２の発明の集積回路装置の計測方法は、
バイアス電源回路と、二つの差動入力端が前記バイアス
電源回路の出力端に各々接続され、かつ少なくとも前記
差動入力端の一方が抵抗を介して前記バイアス電源回路
の出力端に接続された差動増幅器と、前記一方の差動入
力端に接続された外部入力端子を備えた集積回路装置を
被測定回路とし、前記抵抗の設計値と外部入力端子に与
える電流の積から推定される２段階の所定入力電圧を前
記二つの差動入力端の間に与え、前記２段階の所定入力
電圧に応じた前記差動増幅器の出力電圧の変化量を測定
し、前記差動増幅器の動作の良否を判断することを特徴
とする集積回路装置の計測方法である。A measuring method for an integrated circuit device according to the second invention is
A bias power supply circuit and two differential input terminals each connected to the output terminal of the bias power supply circuit, and at least one of the differential input terminals connected to the output terminal of the bias power supply circuit via a resistor. An integrated circuit device including a dynamic amplifier and an external input terminal connected to the one differential input terminal is used as a circuit to be measured, and two stages are estimated from a product of a design value of the resistor and a current applied to the external input terminal. Is applied between the two differential input terminals to measure the amount of change in the output voltage of the differential amplifier in accordance with the two-step predetermined input voltage to determine whether the operation of the differential amplifier is good or bad. A method for measuring an integrated circuit device, characterized by making a judgment.
【００１３】[0013]
【作用】本発明の構成により、差動増幅器の入力端子間
に接続された抵抗に所定の電流を流し、抵抗の電圧降下
で差動入力電圧の設定するため、差動入力電圧が一定に
設定される。従って、バイアス用の基準電圧源がノイズ
成分を出力するような不安定なものであっても、差動増
幅器がそのノイズ成分を増幅することはなく、そのこと
が入力電圧の設定精度を悪化する要因にならない。According to the structure of the present invention, a predetermined current is caused to flow through the resistors connected between the input terminals of the differential amplifier, and the differential input voltage is set by the voltage drop of the resistors, so that the differential input voltage is set constant. To be done. Therefore, even if the reference voltage source for bias is unstable such that it outputs a noise component, the differential amplifier does not amplify the noise component, which deteriorates the setting accuracy of the input voltage. Not a factor.
【００１４】[0014]
【実施例】以下に本発明の実施例について図面を参照し
ながら説明する。図１は本発明の一実施例にかかる集積
回路装置の計測方法を説明するための測定回路を示す構
成図である。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration diagram showing a measuring circuit for explaining a measuring method of an integrated circuit device according to an embodiment of the present invention.
【００１５】基準電圧用の電圧源３に抵抗８，９の一端
を共通接続し、抵抗８の他端に差動増幅器１の非反転入
力端子２を接続し、抵抗９の他端に反転入力端子４を接
続し、非反転入力端子２及び反転入力端子４に同じバイ
アス電圧を与える。そして、反転入力端子４に電流源１
０を接続し、抵抗９に２段階の所定電流を与え、抵抗９
の電圧降下を差動入力電圧として差動増幅器１の差動入
力端の間に与える。差動増幅器１の出力端子５に電圧計
７を接続し、差動増幅器１の出力電圧の変化量を測定す
る。One ends of resistors 8 and 9 are commonly connected to a voltage source 3 for a reference voltage, the other end of the resistor 8 is connected to a non-inverting input terminal 2 of a differential amplifier 1, and the other end of the resistor 9 is an inverting input. The terminal 4 is connected and the same bias voltage is applied to the non-inverting input terminal 2 and the inverting input terminal 4. The current source 1 is connected to the inverting input terminal 4.
0 is connected and a two-stage predetermined current is applied to the resistor 9
Is applied as a differential input voltage between the differential input terminals of the differential amplifier 1. A voltmeter 7 is connected to the output terminal 5 of the differential amplifier 1 to measure the amount of change in the output voltage of the differential amplifier 1.
【００１６】以上のように構成された本実施例の集積回
路装置の計測方法について、以下に説明する。A method of measuring the integrated circuit device of this embodiment having the above-mentioned structure will be described below.
【００１７】本実施例の計測方法を要約すると、電流源
１０で抵抗９に２段階の所定電流を与え、抵抗９に生じ
る電圧降下を差動入力電圧として差動増幅器１の反転入
力端子４と非反転入力端子２との間に与える。そして、
差動増幅器１の出力端子５の出力電圧を測定し、２段階
の入力電圧に対応した出力電圧の変化量を確認すること
で、電気的特性の良否を判定するものである。To summarize the measuring method of this embodiment, a two-stage predetermined current is applied to the resistor 9 by the current source 10 and the voltage drop occurring in the resistor 9 is used as a differential input voltage to the inverting input terminal 4 of the differential amplifier 1. It is applied to the non-inverting input terminal 2. And
The quality of the electrical characteristics is determined by measuring the output voltage of the output terminal 5 of the differential amplifier 1 and confirming the amount of change in the output voltage corresponding to the two-step input voltage.
【００１８】さらに詳しく言えば、高利得の差動増幅器
の入力オフセット電圧の測定を行う場合は、抵抗９の電
圧降下が差動増幅器１の入力オフセット電圧の最大許容
値になるように、電流源１０の電流値を正負の二つの電
流値に設定し、差動増幅器１の出力電圧の変化量を測定
する。そして、差動入力電圧の極性を切り替えても、差
動増幅器の出力電圧が「高」または「低」の状態を維持
する時は、被測定回路である差動増幅器１が不良品であ
ると判断し、逆に、差動増幅器の出力電圧が差動入力電
圧の極性の切り替えに応じて「高」または「低」の状態
に切り替る時は、差動増幅器１が良品であると判断す
る。More specifically, when the input offset voltage of the high gain differential amplifier is measured, the current source is adjusted so that the voltage drop of the resistor 9 becomes the maximum allowable value of the input offset voltage of the differential amplifier 1. The current value of 10 is set to two positive and negative current values, and the amount of change in the output voltage of the differential amplifier 1 is measured. Then, even if the polarity of the differential input voltage is switched, if the output voltage of the differential amplifier maintains the “high” or “low” state, it is determined that the differential amplifier 1 as the circuit under test is defective. On the contrary, when the output voltage of the differential amplifier switches to the “high” or “low” state according to the switching of the polarity of the differential input voltage, it is determined that the differential amplifier 1 is a good product. ..
【００１９】たとえば、電源電圧１０Ｖ、利得１００ｄ
Ｂ、最大出力電圧振幅１０ＶP-P、入力オフセット電圧
がゼロの差動増幅器の場合、非反転入力端子２に対して
反転入力端子４の入力電圧を−０.０５ｍＶ以下に設定
すれば、差動増幅器の出力状態を「高」に固定すること
ができ、逆に、反転入力端子４の入力電圧を０.０５ｍ
Ｖ以上に設定すれば、差動増幅器の出力状態を「低」に
固定することができる。For example, power supply voltage 10V, gain 100d
B, the maximum output voltage amplitude is 10 V PP , and the input offset voltage is zero, the differential amplifier can be set by setting the input voltage of the inverting input terminal 4 to -0.05 mV or less with respect to the non-inverting input terminal 2. The output state of can be fixed to "high", and conversely, the input voltage of the inverting input terminal 4 is 0.05m.
If set to V or higher, the output state of the differential amplifier can be fixed to "low".
【００２０】従って、抵抗値１００Ωの抵抗９に１０μ
Ａまたは−１０μＡの電流を与え、入力電圧を＋１ｍＶ
と−１ｍＶの二つのレベルに設定すると、入力オフセッ
ト電圧がゼロであれば、入力電圧の変化に対応して差動
増幅器の出力電圧が「低」または「高」に切り替わる。
すなわち、差動増幅器の出力電圧が「低」または「高」
に切り替われば、入力オフセット電圧が±１ｍＶ以内と
判断できる。そして、入力電圧を±１ｍＶの範囲でレベ
ル変化させても、差動増幅器の出力電圧が「低」または
「高」の状態から変化しなければ、入力オフセット電圧
が±１ｍＶ以上と判断できる。Therefore, the resistance 9 having a resistance value of 100 Ω has a resistance of 10 μm.
A or -10μA current is applied and input voltage is + 1mV
, And −1 mV, if the input offset voltage is zero, the output voltage of the differential amplifier switches to “low” or “high” in response to changes in the input voltage.
That is, the output voltage of the differential amplifier is "low" or "high".
If switched to, it can be determined that the input offset voltage is within ± 1 mV. Even if the level of the input voltage is changed in the range of ± 1 mV, the input offset voltage can be determined to be ± 1 mV or more if the output voltage of the differential amplifier does not change from the “low” or “high” state.
【００２１】次に、入力電圧の設定精度について述べる
と、抵抗８及び抵抗９の抵抗値をそれぞれ１００Ωと
し、電流源４の電流値を１０μＡとした場合、電流源の
設定精度が電圧源の設定精度と同じく±０.２％の誤差
とすると、差動入力電圧の設定が（１±０.００２）ｍ
Ｖとなり、±２μＶの誤差が生じるだけである。すなわ
ち、本実施例の設定誤差は、従来例の設定誤差±５ｍＶ
に比べて１／１０００以下のはるかに小さい値となる。
通常、差動増幅器の入力オフセット電圧は±数ｍＶであ
るから、本実施例の設定誤差は無視できる。Next, regarding the setting accuracy of the input voltage, assuming that the resistance values of the resistors 8 and 9 are 100Ω and the current value of the current source 4 is 10 μA, the setting accuracy of the current source is the setting of the voltage source. If the error is ± 0.2%, which is the same as the accuracy, the differential input voltage setting is (1 ± 0.002) m.
V, and only an error of ± 2 μV occurs. That is, the setting error of this embodiment is ± 5 mV of the setting error of the conventional example.
It is a much smaller value than 1/1000 or less.
Normally, the input offset voltage of the differential amplifier is ± several mV, so the setting error of this embodiment can be ignored.
【００２２】本実施例では、抵抗９に電流源１０から所
定の電流を与えて、差動増幅器１の差動入力電圧の設定
を行なうため、基準用の電圧源３の出力電圧が不安定で
あったり、出力電圧に雑音電圧が重複していても、差動
増幅器１の差動入力端子２,４間に不要な雑音電圧が混
入しないので、安定な測定ができる。また、仮に差動増
幅器１の差動入力端子２，４間に、数百μＶの不要な雑
音電圧が混入しても、差動増幅器１の出力電圧が出力ダ
イナミックレンジを越える程度に充分に大きな入力電圧
が印加されているため、差動増幅器１の出力電圧が
「低」または「高」の状態に固定され、差動増幅器１の
出力端子６に雑音電圧を出力する心配がほとんどない。In the present embodiment, a predetermined current is applied to the resistor 9 from the current source 10 to set the differential input voltage of the differential amplifier 1. Therefore, the output voltage of the reference voltage source 3 is unstable. Even if the output voltage or the noise voltage overlaps with the output voltage, an unnecessary noise voltage is not mixed between the differential input terminals 2 and 4 of the differential amplifier 1, so that stable measurement can be performed. Further, even if an unnecessary noise voltage of several hundred μV is mixed between the differential input terminals 2 and 4 of the differential amplifier 1, the output voltage of the differential amplifier 1 is large enough to exceed the output dynamic range. Since the input voltage is applied, the output voltage of the differential amplifier 1 is fixed in the “low” or “high” state, and there is almost no concern about outputting a noise voltage to the output terminal 6 of the differential amplifier 1.
【００２３】次に、差動増幅器１の利得を測定する場合
について説明する。たとえば、電源電圧１０Ｖ、利得４
０ｄＢ、最大出力電圧振幅１０ＶP-Pの差動増幅器の場
合、抵抗８及び抵抗９の抵抗値をそれぞれ１ｋΩとし、
電流源１０から±１０μＡを抵抗９に与え、非反転入力
端子２に対して反転入力端子４の入力電圧を−１０ｍＶ
に設定すれば、差動増幅器の出力電圧は６Ｖになり、逆
に、反転入力端子４の入力電圧を１０ｍＶに設定すれ
ば、差動増幅器の出力電圧は４Ｖになる。このように、
電流源１０の電流レベルを２水準に振って、入力電圧の
変動量と出力電圧の変動量との比を求める。すなわち、
電流源１０で設定される差動入力電圧の変化量ΔＶINを
変化させ、そのときの出力端子６の出力電圧の変化量Δ
ＶOUTを測定し、出力電圧と入力電圧の変化量の比ΔＶ
OUT／ΔＶINを演算すれば、差動増幅器１の利得が求め
られ、差動増幅器１の利得を測定することができる。Next, the case of measuring the gain of the differential amplifier 1 will be described. For example, power supply voltage 10V, gain 4
In the case of a differential amplifier having 0 dB and a maximum output voltage amplitude of 10 V PP , the resistance values of the resistors 8 and 9 are 1 kΩ,
Applying ± 10 μA from the current source 10 to the resistor 9, the input voltage of the inverting input terminal 4 is -10 mV with respect to the non-inverting input terminal 2.
If the input voltage at the inverting input terminal 4 is set to 10 mV, the output voltage of the differential amplifier becomes 4V. in this way,
By swinging the current level of the current source 10 to two levels, the ratio between the fluctuation amount of the input voltage and the fluctuation amount of the output voltage is obtained. That is,
The change amount ΔV IN of the differential input voltage set by the current source 10 is changed, and the change amount Δ of the output voltage of the output terminal 6 at that time is changed.
V OUT is measured and the ratio of the amount of change in the output voltage to the input voltage ΔV
By calculating OUT / ΔV IN , the gain of the differential amplifier 1 can be obtained, and the gain of the differential amplifier 1 can be measured.
【００２４】この場合、差動増幅器１の出力トランジス
タ（図示せず）が活性状態で動作しているため、差動増
幅器１の入力端子間に雑音電圧が混入しやすくなるが、
入力端子２と４の間に容量を付加すれば、差動増幅器１
の出力端子６に雑音電圧が出力されず、出力電圧を安定
に測定することができる。In this case, since the output transistor (not shown) of the differential amplifier 1 operates in the active state, noise voltage is easily mixed between the input terminals of the differential amplifier 1, but
If a capacitance is added between the input terminals 2 and 4, the differential amplifier 1
Since no noise voltage is output to the output terminal 6 of the output voltage, the output voltage can be stably measured.
【００２５】すなわち、本実施例の集積回路装置の計測
方法では、差動増幅器１の入力オフセット電圧の測定だ
けでなく、差動増幅器１の利得の測定にも十分に応用で
き、高精度で安定な測定ができる。That is, the measuring method of the integrated circuit device of this embodiment can be applied not only to the measurement of the input offset voltage of the differential amplifier 1 but also to the measurement of the gain of the differential amplifier 1, and it is highly accurate and stable. You can make various measurements.
【００２６】なお、本実施例は抵抗８，９の抵抗値のバ
ランスを保った最適の測定系を示したが、入力電流が小
さい差動増幅器の測定を行なう時には、必ずしも抵抗
８，９の抵抗値のバランスを保つ必要がなく、抵抗９を
通じて反転入力端子４にバイアス電流を与える際、抵抗
９での電圧降下が小さければ、抵抗８を短絡しても支障
がない。また、本発明の非反転入力端子２と反転入力端
子４との接続を置き換えても同様の効果があることは言
うまでもない。Although the present embodiment has shown an optimum measuring system in which the resistance values of the resistors 8 and 9 are balanced, the resistance of the resistors 8 and 9 is not always required when measuring a differential amplifier having a small input current. It is not necessary to keep the balance of values, and when a bias current is applied to the inverting input terminal 4 through the resistor 9 and the voltage drop across the resistor 9 is small, there is no problem even if the resistor 8 is short-circuited. Needless to say, the same effect can be obtained by replacing the connection between the non-inverting input terminal 2 and the inverting input terminal 4 of the present invention.
【００２７】次に、本発明の第２の実施例について説明
する。集積回路装値内部に集積化された被測定回路は、
入力用外部端子または出力用外部端子のうち、いずれか
１個の外部端子が一つの回路ブロックに接続される場合
が多く、２個以上の外部端子が一つの回路ブロックに接
続されることは少ない。従って、被測定回路の直接的な
電気的特性を測定することが困難である。Next, a second embodiment of the present invention will be described. The circuit under test integrated inside the integrated circuit component is
Of the input external terminals or the output external terminals, any one external terminal is often connected to one circuit block, and two or more external terminals are rarely connected to one circuit block. .. Therefore, it is difficult to measure the direct electrical characteristics of the circuit under test.
【００２８】第２の実施例の目的は、このような不都合
を排除するもので、間接的な電気的特性の測定であって
も、精度の高い差動増幅器の入力オフセット電圧の計測
方法を提供することにある。The purpose of the second embodiment is to eliminate such inconvenience, and to provide a highly accurate method of measuring an input offset voltage of a differential amplifier even when measuring an indirect electrical characteristic. To do.
【００２９】図２は本発明の第２の実施例の構成を示
す。図２に示す被測定回路である差動増幅器１は、集積
回路装値１１の内部に内蔵されており、差動増幅器１の
非反転入力端子２及び反転入力端子４に各々同じ抵抗値
の内部抵抗１２、１３の一端が接続され、内部抵抗１
２、１３の他端はバイアス電源回路１４の一端に接続さ
れたものが一般的である。内部抵抗１２は、差動増幅器
１の入力端子間にオフセット電圧が発生しないように、
入力バイアス電圧のバランスを保つために設けられるも
のであって、オフセット電圧特性を重視しない場合、差
動増幅器１の入力インピーダンスが高い場合には、設計
上の選択的事項で内部抵抗１２，１３をアンバランスに
したり、内部抵抗１２を除去したりすることがある。FIG. 2 shows the configuration of the second embodiment of the present invention. The differential amplifier 1 which is the circuit to be measured shown in FIG. 2 is incorporated in the integrated circuit device 11, and the non-inverting input terminal 2 and the inverting input terminal 4 of the differential amplifier 1 each have the same resistance value. One ends of resistors 12 and 13 are connected, and internal resistor 1
The other ends of 2 and 13 are generally connected to one end of a bias power supply circuit 14. The internal resistor 12 prevents the offset voltage from being generated between the input terminals of the differential amplifier 1,
The internal resistors 12 and 13 are provided to maintain the balance of the input bias voltage, and when the offset voltage characteristic is not emphasized, or when the input impedance of the differential amplifier 1 is high, the internal resistors 12 and 13 are selected as a matter of design choice. It may be unbalanced or the internal resistor 12 may be removed.
【００３０】そして、バイアス電源回路１４の他端はＧ
ＮＤ用外部端子１５が接続され、バイアス電源回路１４
と差動増幅器１は電源用外部端子１６とＧＮＤ用外部端
子１５との間に電源電圧が与えられることで、これらの
回路が動作する構成になっている。外部端子１７とＧＮ
Ｄ用外部端子１５との間に内部抵抗１８が接続され、内
部抵抗１２,１３及び１８は同一基板上に同一拡散層も
しくは同一のシリコン多結晶層で形成された抵抗であ
る。そして、外部入力端子１９は反転入力端子４に接続
され、出力端子６は差動増幅器１の出力端に直接に接続
されたものか、あるいは、別種の増幅器、スイッチ回路
等の電子回路を介して間接的に接続されたものであって
もよい。第２の実施例の被測定回路は、以上のように破
線で示された集積回路装値１１の内部に構成されてい
る。The other end of the bias power supply circuit 14 is G
The ND external terminal 15 is connected to the bias power supply circuit 14
The differential amplifier 1 is configured such that these circuits operate when a power supply voltage is applied between the power supply external terminal 16 and the GND external terminal 15. External terminal 17 and GN
An internal resistor 18 is connected between the D external terminal 15 and the internal resistors 12, 13 and 18 are resistors formed of the same diffusion layer or the same silicon polycrystal layer on the same substrate. The external input terminal 19 is connected to the inverting input terminal 4 and the output terminal 6 is directly connected to the output terminal of the differential amplifier 1, or via an electronic circuit such as another type of amplifier or switch circuit. It may be indirectly connected. The circuit under test of the second embodiment is configured inside the integrated circuit device value 11 indicated by the broken line as described above.
【００３１】そして、第２の実施例の測定系の回路は、
電圧源２０が電源用外部端子１６とＧＮＤ用外部端子１
５との間に接続され、電流源１０が外部入力端子１９を
介して内部抵抗１３の一端に接続され、電圧計７が差動
増幅器１の出力端子６と接地電位との間に接続された構
成となっている。The circuit of the measurement system of the second embodiment is
The voltage source 20 includes the power supply external terminal 16 and the GND external terminal 1
5, the current source 10 is connected to one end of the internal resistor 13 via the external input terminal 19, and the voltmeter 7 is connected between the output terminal 6 of the differential amplifier 1 and the ground potential. It is composed.
【００３２】以上のように、差動増幅器１及び入力バイ
アス回路が集積回路装値内部に集積化された第２の実施
例の集積回路装置の計測方法について、以下に説明す
る。The measuring method of the integrated circuit device of the second embodiment in which the differential amplifier 1 and the input bias circuit are integrated in the integrated circuit device as described above will be described below.
【００３３】入力バイアス回路が集積回路装置内部に集
積化された場合の入力オフセット電圧を計測する第１の
方法は、内部抵抗１３が設計値どうりに作り込まれるも
のと仮定して計測する方法である。これは、外部入力端
子１９に印加される電流値と内部抵抗１３の設計値との
積が、差動増幅器１の入力オフセット電圧の最大許容値
になるように、電流源１０から外部入力端子１９に印加
される電流を設定し、電流源１０の電流の極性を正負二
つの値に切り替え、差動増幅器１の出力電圧の変化量を
測定する。そして、差動入力電圧の極性を切り替えて
も、差動増幅器の出力電圧が「高」または「低」の状態
を維持する時は、被測定回路である差動増幅器１が不良
品であると判断し、逆に、差動増幅器の出力電圧が差動
入力電圧の極性の切り替えに応じて「高」または「低」
の状態に切り替る時は、差動増幅器１が良品であると判
断する。The first method of measuring the input offset voltage when the input bias circuit is integrated inside the integrated circuit device is a method of measuring assuming that the internal resistance 13 is made to be a designed value. Is. This is because the product of the current value applied to the external input terminal 19 and the design value of the internal resistor 13 becomes the maximum allowable value of the input offset voltage of the differential amplifier 1 from the current source 10 to the external input terminal 19. Is set, the polarity of the current of the current source 10 is switched between two positive and negative values, and the amount of change in the output voltage of the differential amplifier 1 is measured. Then, even if the polarity of the differential input voltage is switched, if the output voltage of the differential amplifier maintains the “high” or “low” state, it is determined that the differential amplifier 1 as the circuit under test is defective. Judgment, conversely, the output voltage of the differential amplifier is "high" or "low" depending on the polarity switching of the differential input voltage.
When switching to the state of, it is judged that the differential amplifier 1 is a good product.
【００３４】この計測方法では、出来上がった抵抗１３
のばらつきに測定精度が決定され、製造工程が安定して
いれば、抵抗の製造ばらつきである±１５％程度の精度
が期待できる。According to this measuring method, the finished resistance 13
If the measurement accuracy is determined by the variation of the resistance and the manufacturing process is stable, the accuracy of about ± 15%, which is the manufacturing variation of the resistance, can be expected.
【００３５】差動増幅器１の出力端から出力端子６の間
に他の電子回路が接続されている場合、出力電圧が変化
しない動作不良があったとき、差動増幅器１と他の電子
回路の回路のない、何れの動作不良かを特定できない
が、差動増幅器１の動作不良であっても、他の電子回路
の動作不良であっても、集積回路装値全体として不良品
であるから、不良と判断する。従って、差動増幅器１の
出力端が出力端子６に直接接続されていなくても、入力
オフセット電圧を計測するのに支障がない。In the case where another electronic circuit is connected between the output terminal of the differential amplifier 1 and the output terminal 6, when there is a malfunction in which the output voltage does not change, the differential amplifier 1 and the other electronic circuit do not operate. Although it is not possible to specify which operation failure without a circuit, whether the operation failure of the differential amplifier 1 or the operation failure of another electronic circuit is a defective product as a whole integrated circuit component value, Judge as defective. Therefore, even if the output terminal of the differential amplifier 1 is not directly connected to the output terminal 6, there is no problem in measuring the input offset voltage.
【００３６】しかしながら、前述の第１の計測方法で
は、内部抵抗１３の抵抗値が定かではなく、拡散工程等
の製造工程でイレギュラーが発生した場合、必ずしも、
±１５％のばらつき内に収まるとは限らないため、測定
値の信頼性がよくない。However, in the first measuring method described above, the resistance value of the internal resistance 13 is not clear, and when irregularities occur in the manufacturing process such as the diffusion process, it is not always necessary.
Since it does not always fall within the variation of ± 15%, the reliability of the measured value is not good.
【００３７】第２の計測方法の目的は、拡散工程等の製
造工程でイレギュラーが発生した場合でも、所望のばら
つき範囲内の入力オフセット電圧を保証する計測方法を
提供することにある。An object of the second measuring method is to provide a measuring method that guarantees an input offset voltage within a desired variation range even if irregularities occur in the manufacturing process such as the diffusion process.
【００３８】第２の計測方法では、前述の第１の計測方
法に加えて、外部端子１７とＧＮＤ用外部端子１５との
電圧−電流特性を測定することで、外部端子１７とＧＮ
Ｄ用外部端子１５との間に接続され、内部抵抗１３と同
じ拡散層で形成された内部抵抗１８を測定し、内部抵抗
１８が抵抗の製造ばらつきである±１５％の範囲内に収
まっているものを選択する。In the second measuring method, in addition to the above-described first measuring method, the voltage-current characteristics of the external terminal 17 and the GND external terminal 15 are measured, so that the external terminal 17 and the GND are
The internal resistance 18 connected to the D external terminal 15 and formed of the same diffusion layer as the internal resistance 13 is measured, and the internal resistance 18 is within ± 15% which is a manufacturing variation of the resistance. Select one.
【００３９】すると、同じ拡散層で形成された抵抗同士
は±２％程度のばらつき範囲内に収まるから、第２の計
測方法ではほぼ±１５％の測定精度で入力オフセット電
圧の測定値が保証される。Then, since the resistors formed of the same diffusion layer are within the variation range of about ± 2%, the measurement value of the input offset voltage is guaranteed with the measurement accuracy of about ± 15% in the second measuring method. It
【００４０】[0040]
【発明の効果】以上のように本発明は、被測定回路の差
動増幅器に入力バイアスを与える抵抗に２段階の所定電
流を流し、抵抗の端子間電圧を差動入力端子間に与える
から、差動入力端に一定の入力電圧が与えられ、差動入
力端に雑音電圧が混入しにくく、差動増幅器の出力電圧
が安定に測定され、差動増幅器の電気的特性が高精度に
測定できる。As described above, according to the present invention, a two-stage predetermined current is supplied to a resistor for applying an input bias to a differential amplifier of a circuit under test, and a voltage between terminals of the resistor is applied between differential input terminals. A constant input voltage is applied to the differential input terminals, noise voltage hardly mixes into the differential input terminals, the output voltage of the differential amplifier is measured stably, and the electrical characteristics of the differential amplifier can be measured with high accuracy. ..
【図１】本発明の一実施例における集積回路装置の計測
方法を説明するための測定回路図FIG. 1 is a measurement circuit diagram for explaining a measuring method of an integrated circuit device according to an embodiment of the present invention.
【図２】本発明の第２の実施例の集積回路装置の計測方
法を説明するための測定回路図FIG. 2 is a measurement circuit diagram for explaining a measuring method of an integrated circuit device according to a second embodiment of the present invention.
【図３】従来における集積回路装置の計測方法を説明す
るための測定回路図FIG. 3 is a measurement circuit diagram for explaining a conventional method for measuring an integrated circuit device.
１ 差動増幅器 ２ 非反転入力端子 ３,５,２０ 電圧源 ４ 反転入力端子 ６ 出力端子 ７ 電圧計 ８,９ 抵抗 １０ 電流源 １１ 集積回路装置 １２,１３,１８ 内部抵抗 １４ バイアス電源回路 １５ ＧＮＤ用外部端子 １６ 電源用外部端子 １９ 外部入力端子 1 differential amplifier 2 non-inverting input terminal 3,5,20 voltage source 4 inverting input terminal 6 output terminal 7 voltmeter 8,9 resistance 10 current source 11 integrated circuit device 12,13,18 internal resistance 14 bias power supply circuit 15 GND External terminal 16 External power terminal 19 External input terminal
Claims (2)
れ抵抗を介して同じバイアス電圧を与えるとともに、前
記抵抗の一方に２段階の所定電流を与え、前記所定電流
に応じた前記差動増幅器の出力電圧の変化量を測定し
て、前記差動増幅器の動作の良否を判定することを特徴
とする集積回路装置の計測方法。1. A differential amplifier having the same bias voltage applied to two differential input terminals via resistors respectively, and one of said resistors supplied with a predetermined current in two stages, said differential current corresponding to said predetermined current. A method of measuring an integrated circuit device, comprising: measuring the amount of change in the output voltage of an amplifier to determine whether the operation of the differential amplifier is good or bad.
前記バイアス電源回路の出力端に各々接続され、かつ少
なくとも前記差動入力端の一方が抵抗を介して前記バイ
アス電源回路の出力端に接続された差動増幅器と、前記
一方の差動入力端に接続された外部入力端子を備えた集
積回路装置を被測定回路とし、前記抵抗の設計値と外部
入力端子に与える電流の積から推定される２段階の所定
入力電圧を前記二つの差動入力端の間に与え、前記２段
階の所定入力電圧に応じた前記差動増幅器の出力電圧の
変化量を測定し、前記差動増幅器の動作の良否を判断す
ることを特徴とする集積回路装置の計測方法。2. A bias power supply circuit and two differential input terminals are respectively connected to the output terminals of the bias power supply circuit, and at least one of the differential input terminals is an output terminal of the bias power supply circuit via a resistor. An integrated circuit device having a differential amplifier connected to the external input terminal and an external input terminal connected to the one differential input terminal is used as a circuit under test, and the product of the design value of the resistor and the current applied to the external input terminal The estimated two-step predetermined input voltage is applied between the two differential input terminals, the change amount of the output voltage of the differential amplifier is measured according to the two-step predetermined input voltage, and the differential amplifier is measured. A method for measuring an integrated circuit device, comprising determining whether the operation of the device is good or bad.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3231438A JPH0572243A (en) | 1991-09-11 | 1991-09-11 | Measuring method of integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3231438A JPH0572243A (en) | 1991-09-11 | 1991-09-11 | Measuring method of integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0572243A true JPH0572243A (en) | 1993-03-23 |
Family
ID=16923549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3231438A Pending JPH0572243A (en) | 1991-09-11 | 1991-09-11 | Measuring method of integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0572243A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012247341A (en) * | 2011-05-30 | 2012-12-13 | Tokai Rika Co Ltd | Detection apparatus and current sensor |
| JP2013183399A (en) * | 2012-03-05 | 2013-09-12 | Handotai Rikougaku Kenkyu Center:Kk | Offset voltage correction circuit for dynamic comparator, and dynamic comparator circuit using the same |
| KR20150007246A (en) * | 2013-07-10 | 2015-01-20 | 페어차일드 세미컨덕터 코포레이션 | Differential measurements with a large common mode input voltage |
-
1991
- 1991-09-11 JP JP3231438A patent/JPH0572243A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012247341A (en) * | 2011-05-30 | 2012-12-13 | Tokai Rika Co Ltd | Detection apparatus and current sensor |
| JP2013183399A (en) * | 2012-03-05 | 2013-09-12 | Handotai Rikougaku Kenkyu Center:Kk | Offset voltage correction circuit for dynamic comparator, and dynamic comparator circuit using the same |
| KR20150007246A (en) * | 2013-07-10 | 2015-01-20 | 페어차일드 세미컨덕터 코포레이션 | Differential measurements with a large common mode input voltage |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7064535B2 (en) | Measurement circuit with improved accuracy | |
| US5959463A (en) | Semiconductor test apparatus for measuring power supply current of semiconductor device | |
| JP2003098010A (en) | Device for measuring temperature of electronic circuit | |
| JPH0572243A (en) | Measuring method of integrated circuit device | |
| CN113702710A (en) | Resistance test circuit and resistance test method | |
| US6968249B2 (en) | Current measuring circuit for measuring drive current to load | |
| KR0140949B1 (en) | Semiconductor integrated circuit device | |
| US4733173A (en) | Electronic component measurement apparatus | |
| CN113702711A (en) | Resistance test circuit and resistance test method | |
| JP3011095B2 (en) | Semiconductor integrated circuit device having self-diagnosis function | |
| JPH0794683A (en) | Semiconductor integrated circuit device having self-diagnostic function | |
| JP3143036B2 (en) | Resistivity measurement circuit | |
| JP4909192B2 (en) | Capacitor capacity measuring device | |
| JPH09243715A (en) | Method of measuring voltage of integrated circuit device | |
| JP3147486B2 (en) | Semiconductor element measurement circuit | |
| JPS6347065Y2 (en) | ||
| JPS60253883A (en) | Constant current load/constant voltage applied current measuring apparatus | |
| JPH05196678A (en) | Electric-circuit testing apparatus | |
| JPH04240571A (en) | Method for measuring voltage difference between terminals of semiconductor device | |
| JP2948633B2 (en) | Method for measuring voltage of semiconductor device | |
| JPH1123664A (en) | Measuring circuit of semiconductor device | |
| JPH07183346A (en) | Semiconductor testing device | |
| JPH05281269A (en) | Current/voltage conversion circuit | |
| JP2919312B2 (en) | Inspection method for semiconductor device | |
| JPH04244974A (en) | Measurement of semiconductor integrated circuit |