JPH056861A - Control apparatus of semiconductor manufacture - Google Patents

Abstract

PURPOSE:To enhance the yield of the title apparatus by a method wherein an irregularity in a current-amplification factor due to an irregularity in the layer resistance value of a wafer is minimized. CONSTITUTION:The layer resistance value of a base region before an emitter diffusion operation is measured at each wafer; it is stored in a hysteresis file 8 together with the identification number of the wafer. On the other hand, a data indicating the relationship between the layer resistance value and the diffusion time is stored in a diffusion-time file 6. In the emitter diffusion operation, the identification number of the wafer is input to a host computer 5 on the side of a diffusion apparatus 2; the host computer 5 reads out the layer resistance value of the wafer from the hysteresis file 8 together with the input identification number; the diffusion time with reference to the layer resistance value is read out from the diffusion-time file 6; the diffusion condition of the diffusion apparatus 2 is set.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing control apparatus used for controlling a semiconductor device manufacturing process, and more particularly for controlling a diffusion process.

[0002]

2. Description of the Related Art Conventionally, in a diffusion process, diffusion was performed by setting a constant emitter diffusion time for each product regardless of the base layer resistance value before diffusion. The conventional technique will be described with reference to FIG. 3, Table 1 and Table 2. The current amplification factor, which is an extremely important characteristic factor in transistor characteristics, is
2 is determined by the base layer resistance value R _S and the base width W _B. That is, as shown in Table 1, it is known that the current amplification factor decreases as the layer resistance value decreases, and the current amplification factor increases as the layer resistance value increases.

[0003]

[Table 1]

[0004]

[Table 2] Further, as shown in Table 2, when the diffusion time is short, the emitter depth X _jE becomes shallow and the current amplification factor becomes small, and when the diffusion time is long, the emitter depth X _jE becomes deep and the current amplification factor becomes large. It is also known to have a positive correlation. Therefore, the constant emitter diffusion time means the constant emitter depth X _jE , and the base width W _B also becomes constant accordingly. This is
This causes a great adverse effect on the transistor that the current amplification factor also varies due to the variation in the base layer resistance value R _S of the base 12.

[0005]

As described above, in the prior art, since the emitter depth and the base width are constant, the current amplification factor varies due to the variation in the layer resistance value of the base, and the yield decreases. There is.

It is an object of the present invention to provide a semiconductor manufacturing control apparatus capable of minimizing the variation of the current amplification factor and improving the yield by eliminating the above-mentioned drawbacks.

[0007]

According to the present invention, in a semiconductor manufacturing control apparatus having means for controlling an impurity diffusion step in a diffusion apparatus, the measurement is performed before a predetermined impurity diffusion for each wafer on which a semiconductor element is formed. A layer resistance storage means for storing a layer resistance value of a predetermined region of a wafer, a diffusion condition storage means for storing a diffusion condition including a relationship between the layer resistance value and a diffusion time, and a wafer to be diffused by the diffusion device, And a diffusion condition setting unit for reading the layer resistance value of the wafer from the layer resistance storage unit and reading the diffusion time for the layer resistance value from the diffusion condition storage unit to set the diffusion condition of the diffusion device. And

[0008]

The layer resistance storing means stores the layer resistance value of the base measured for each wafer together with the wafer identification number. On the other hand, the diffusion condition storage means stores the diffusion condition including the relation between the base layer resistance value and the diffusion time. Then, the diffusion condition setting means reads the layer resistance value of the wafer from the layer resistance storage means by inputting the wafer identification number for the wafer to be diffused by the diffusion device next, and determines the diffusion time for the layer resistance value. It is read from the diffusion condition storage means and the diffusion condition of the diffusion device is set.

Therefore, since the diffusion time is set based on the layer resistance value for each wafer, it is possible to minimize the variation in the current amplification factor of the transistor and improve the yield.

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

The present embodiment is a semiconductor manufacturing control apparatus equipped with means for controlling the impurity diffusion step in the diffusion apparatus 2, which is a feature of the present invention.
The data input / output device 3, the communication line 7, the host computer 5, and the history as a layer resistance storing means for storing the layer resistance value of the base region in the wafer measured before the diffusion of the emitter impurity for each wafer together with the wafer number. The file 8, the diffusion time file 6 as the diffusion condition storing means for storing the diffusion condition including the relation between the layer resistance value and the diffusion time, and the wafer to be diffused by the diffusion device, the layer resistance of the wafer from the history file 8 A data input / output device 4, a host computer 5, and a communication line 7 as a diffusion condition setting means for reading a value, reading a diffusion time for the layer resistance value from the diffusion time file 6 and setting the diffusion condition of the diffusion device 2. Is equipped with.

Next, the operation of this embodiment will be described with reference to the flow chart shown in FIG. In FIG. 2, step S
1 to step S3 is the work of the previous stage, and step S4
Up to step S8 is the work of the latter stage.

First, the wafer is sent to the step of measuring the layer resistance value. The layer resistance measuring device 1 measures the layer resistance value, inputs the measured value together with the wafer identification number from the data input / output device 3 (step S1), and transmits it to the host computer 5 through the communication line 7 (step S1). S2). The transmitted data is stored in the history file 8 as a wafer processing history. Next, the wafer is sent to the diffusion process. Here, if a wafer identification number is input via the data input / output device 4 (step S4),
Sent to the host computer 5 via the communication line 7,
The host computer 5 uses the identification number to create the history file 8
To read the layer resistance value (step S5),
The diffusion time file 6 is searched based on the layer resistance value, and the desired diffusion time is read (step S6). The host computer 5 sets a desired spreading time in the spreading device 2 via the communication line 7 and the data input / output device 4 (steps S7 and S8).

[0015]

As described above, according to the present invention, by varying the diffusion time, it is possible to minimize the variation in the current amplification factor due to the variation in the layer resistance value, and to reduce the number of elements having defective characteristics. Further, there is an effect that the yield can be improved and the efficiency of the diffusion work can be improved.

Therefore, according to the present invention, it is possible to obtain the semiconductor manufacturing control apparatus which can improve the quality of the semiconductor device and reduce the manufacturing cost, and the effect thereof is great.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a flowchart showing the operation.

FIG. 3 is an explanatory diagram of factors that determine a current amplification factor of a transistor.

[Explanation of symbols]

12 base S1~S8 step R _S layer resistance W _B base width X _jE emitter depth first layer resistance measuring device 2 diffusers 3,4 data input-output device 5 a host computer 6 diffusion time file 7 communication line 8 history file 11 emitter

Claims (1)

Claim: What is claimed is: 1. A semiconductor manufacturing management apparatus comprising means for managing an impurity diffusion process in a diffusion apparatus, wherein a wafer measured before a predetermined impurity diffusion for each wafer on which a semiconductor element is formed. The layer resistance storage means for storing the layer resistance value of a predetermined area, the diffusion condition storage means for storing the diffusion condition including the relationship between the layer resistance value and the diffusion time, and the layer resistance for the wafer to be diffused by the diffusion device. And a diffusion condition setting unit configured to read the layer resistance value of the wafer from the storage unit, read the diffusion time corresponding to the layer resistance value from the diffusion condition storage unit, and set the diffusion condition of the diffusion device. Semiconductor manufacturing control equipment.