JPH0568321A - Automatic monitor for digital protective relay - Google Patents

Abstract

PURPOSE:To simplify the circuit constitution and cheapen the price and elevate the accuracy and detect the inferiority of the analog input circuit of a digital protective circuit without stopping the protective relay function. CONSTITUTION:This device is equipped with a superimposing circuit 24, which superimposes the signal Eref for monitoring outputted in optional cycles from a monitoring signal circuit 23 on the system input different in frequency, an A/D converter 12, which coverts the analog signal outputted from this superimposing circuit 24 into a digital signal, a digital filter, which abstracts only the data relevant to the monitoring signal Eref from the output of this A/D converter 12, and a monitor, which monitors the magnitude of the output of this digital filter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic monitoring device for a digital protective relay which automatically detects a malfunction of an analog signal input section of a digital relay.

[0002]

2. Description of the Related Art As a conventional monitoring apparatus of this type, Japanese Patent Laid-Open No. 53-53
There is what was shown in FIG. 7 and FIG. 8 of -6855. First, as an example of the conventional device, the number 1 in FIG.
Is a power transmission line, 2 is a CT, and 3 is a PT, which are connected to the input contacts S ₁ and S ₁ ′ of the input switching device 8, respectively. Reference numeral 4 is a simulated power transmission line, which is provided with an inspection power source 5, a CT 7, and a reactor 6. The CT 7 and the reactor 6 are respectively connected to the input contacts S ₂ , S ₂ ′ of the input switching device 8. The switching contacts S and S ′ of the input switching device 8 are guided to the digital arithmetic processing section 9 through A / D converters 11 and 12, respectively.

Next, the operation of FIG. 7 will be described. First,
When inspecting the input switching device 8, the CT of the power transmission line 1
2, the current and voltage obtained by PT3 are switched by the input switching device 8 to the current and voltage obtained from the simulated power transmission line 4, that is, the input contacts S ₂ and S ₂ ′ of the inspection input. The current and voltage of the simulated transmission line 4 is the power source 5 for inspection.
Supplied from the A / D converters 11 and 12.

The magnitudes of the current and the voltage are changed by the CT 7 and the tap of the reactor 6, respectively. That is, the current and the voltage flowing through the input switching device 8 are converted into digital quantities by the A / D converters 11 and 12, respectively, and are guided to the digital arithmetic processing section 9.

Normally, the output of the digital arithmetic processing unit 9 is
The transmission line 1 is guided to the trip circuit TR and cut off by the breaker or the like. During inspection,
The digital arithmetic processing unit 9 compares the A / D converted value of the inspection input digitally converted by the A / D converters 11 and 12 with a reference value prepared in advance, and when the comparison result does not match, an alarm circuit The output signal is given to AM.

Next, the second conventional example shown in FIG. 8 will be described. In the figure, the same parts as those in FIG. 7 are designated by the same reference numerals. Reference numerals 13 and 14 are memory circuits. Further, the CT 2 provided on the power transmission line 1 and one input contact S of the input switching device 8
Between ₁ and respectively between the PT3 and the other input contact S ₁ input switching device 8 'A / D converter 11 and 12
Is provided.

Further, the input contacts S ₂ , S of the input switching device 8
The output sides of the memory circuits 13 and 14 are connected to ₂ ', respectively. The output side of the switching contacts S, S'is directly connected to the digital arithmetic processing section 9, and the memory circuits 13, 14 store digital data as inspection simulation inputs in advance.

Next, the operation will be described. First, when performing an inspection, change the switching contacts S and S'of the input switching device 8 to the contact S.
By switching from the ₁ , S ₁ ′ side to the contacts S ₂ , S ₂ ′ side, the digital data in the memory circuits 13, 14 are connected to the digital arithmetic processing section 9 via the input switching device 8. Then, compared with the reference value prepared in advance,
If the comparison results do not match, an output signal is given to the alarm circuit AM.

[0009]

Since the conventional automatic monitoring device for the digital protective relay is constructed as described above, it has the following problems.

First, in the apparatus of FIG. 7, in order to provide a simulated transmission line, a power source, a reactor, a CT, etc. are required, and peripheral devices for inspection are large, and the current and voltage values of the transmission line are increased during inspection. Cannot be guided to the digital arithmetic processing unit, the protection relay function is temporarily stopped during the inspection period, and if a system fault occurs in the transmission line during this period, it cannot be detected and the transmission line cannot be protected. Further, regarding the inspection accuracy, since the inspection input power source is a commercial power source, the voltage is not constant and highly accurate inspection cannot be performed.

Next, in the apparatus shown in FIG. 8, since the inspection input is provided in the subsequent stage of the A / D converter or the like, it is impossible to detect a defect in a portion before the A / D converter. Further, since both FIG. 7 and FIG. 8 are the method of performing the inspection at a constant cycle, even if a defect occurs in the input switching device, a system accident may occur before the detection thereof, which is not preferable as a whole. There were problems such as.

The present invention has been made to solve the above-mentioned problems, and has a simple circuit configuration, is inexpensive and has high accuracy, and does not stop the protection relay function, and an analog input circuit of a digital protection relay. The purpose is to detect defects.

[0013]

An automatic monitoring device for a digital protective relay according to the present invention includes a monitoring signal circuit for outputting a monitoring signal having a frequency different from that of a system input at an arbitrary cycle, the system input and the monitoring. A superimposing circuit for superimposing a use signal, an A / D converter for converting an analog signal output from the superimposing circuit into a digital signal, and extracting only data related to the monitoring signal from the output of the A / D converter. It is composed of a digital filter and a monitoring unit that monitors the magnitude of the output of the digital filter.

[0014]

The automatic protection device for a digital protective relay according to the present invention can monitor a failure of the analog input circuit of the protective relay while performing the system protection operation by the extraction output of the digital filter.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. First, in FIG. 1, 9A is a reset signal means which is provided in the digital arithmetic processing section 9 and controls the ON / OFF of the reset signal 32. Also, the monitoring signal circuit 23
Is controlled by the reset signal 32 and outputs the monitoring signal E _ref at an arbitrary cycle. The monitoring signal E _ref is input to the filter 24 together with the PT and CT inputs 21 (abbreviated as PCT input) from the system that are insulated and level-converted by the input transformer 22.

Here, the PT and CT inputs 21I _S are input signals input from the PT3 and CT2 of the power transmission line 1 described with reference to FIGS. 6 and 7, and will be hereinafter abbreviated to the PCT input 21.
This will be described as I _S. The filter 24 operates so that the monitoring signal E _ref is superimposed on the PCT input 21 and a value obtained by adding the PCT input 21I _S and the monitoring signal E _ref is obtained as an output side signal.

The output of the input transformer 22 is converted from a current signal to a voltage signal by a resistor provided on the output side, and then sample-held (abbreviated as S for short) via a filter 24.
(Hereinafter referred to as “H”) 25, it is held for a certain period of time at an arbitrary predetermined constant period. Next, a multiplexer (abbreviated as MPX) 26 is used for the sample hold 2 described above.
The voltage signal held in 5 is sequentially switched to the A / D converter 1
Lead to 2. The input data converted into a digital quantity by the A / D converter 12 is processed by the digital calculation processing section 9. Reference numeral 31 is an alarm output notifying the result of defect detection.

FIG. 2 shows an example of the monitoring signal circuit 23. The signal waveform data stored in the memory 42 is output to the D / A converter 43 at an arbitrary cycle to monitor AC. An output signal is obtained. By changing the output frequency of the oscillator 41, an AC signal of an arbitrary frequency can be D / A
It can be obtained from the converter 43.

Next, the operation will be described. First, the counter 40 counts up one by one with the clock of the oscillator 41. For example, when the number of outputs is eight, the binary expression "00000000" to "11111111" is counted, and the decimal expression "0" to "255" is counted. The actual number of outputs is matched with the number of addresses of the memory 42. The memory 42 uses the output of the counter 40 as an address, and outputs digital data written in advance corresponding to the address to the D / A converter 43.

The D / A converter 43 converts the digital data from the memory 42 into analog data according to a certain rule, and this becomes the monitoring signal E _ref . Here, the monitoring signal E _ref can have an arbitrary waveform by the digital data written in the memory 42, and can have an arbitrary signal frequency by the frequency of the oscillator 41.

A reset signal 32 for resetting the count value of the counter to "0" is input to the counter 40. When the reset signal 32 is output from the reset means 9A of the digital arithmetic processing section 9, the output of the counter 40 is output. Becomes "00000000". Thus counter 40
When the output of "0" becomes "0", the address of the memory 42 becomes "0".
Then, by setting the digital data written in advance at the address 0 of the memory 42 to "0", D /
The output of the A converter 43 outputs a "0" voltage. When the reset signal 32 is continuously input, the output of the counter 40 remains "0", so that the D / A converter 43 outputs a DC voltage of zero voltage, so that the output is not output.

The waveform and frequency of the monitoring signal E _ref are determined by the digital data written in the memory and the frequency of the oscillator 41 as described above, but the write data in the memory 42 does not change and the oscillator 41 does not change. By using an oscillator 41 such as a crystal oscillator that hardly changes the oscillation frequency, it is possible to obtain a highly accurate monitoring signal E _ref without fluctuations in waveform and frequency.

Regarding the component cost of FIG. 2, the oscillator 4
1 can be shared with the crystal oscillator included in the digital arithmetic processing unit 9 shown in FIG.

The digital arithmetic processing section 9 is mainly composed of a microprocessor and has a crystal oscillator for its operation. Further, the memory 42 may have a relatively small capacity. Here, the D / A converter 43 may be of a low speed of about 8 bits, and as a result, the configuration shown in FIG.
Compared with the simulated power transmission line 4 shown in FIG.

FIG. 3 is a PC of the filter 24 shown in FIG.
It shows the addition portion of the T input 21 and the monitoring signal E _ref . The PCT input 21 and the monitoring signal E _ref are connected to the operational amplifier 43 through the input resistors R _S 41 and R _r 42, respectively. The output of the operational amplifier 43 is the feedback resistor R _f.
It is fed back to the input side by 44. The output E _{ad of} this circuit can be generally expressed by the following equation (1).

[0026]

[Equation 1]

As described above, the addition of two signals by the operational amplifier can be realized at a very low cost with a simple circuit.

Prior to the description of the operation of the present invention in FIG. 1, the basic input signal processing for detecting the system fault of the digital protection relay will be described.

First, in order to detect a failure in the power system, P
The voltage / current signal PCT input 21I _S is taken in from T and CT, and signal conversion processing is performed to a form that can be processed by the digital arithmetic processing unit 9. The input transformer 22 level-converts these signals into values suitable for the full scale of the A / D converter 12 when the voltage and current values of the power system become maximum. The secondary voltage level of the input transformer 22 is input to the analog filter 24.

In the digital relay, the comprehensive filter characteristics required from various relay characteristics are realized by a combination of digital processing and analog processing. The filter 24 is mainly intended to remove high-frequency components above the folding frequency. Further, in the digital relay, the frequency band necessary for the relay characteristics is taken into consideration, and the filter 24 attenuates the frequency components higher than the folding frequency to a level that can be completely ignored, and the input signal after passing through the filter 24 is sampled by the SH25. Then, it is converted into a digital value and processed.

The sampling frequency is based on the sampling theorem and the like, and because of the calculation processing capacity of the CPU and the ease of data processing of the relay calculation algorithm, the electrical angle of the normal system frequency is 30 °, that is, 600 Hz (50 Hz).
System) and 720 Hz (60 Hz system).

Next, since the sample hold 25 requires sampling data at the same time from the relay calculation algorithm, the sample hold 25 is provided in all the input channels as shown in FIG. Hold until A / D conversion is completed. In this way, the input signal of the power system is processed, and the digital arithmetic processing unit 9 performs relay arithmetic.

The operation of the automatic protection apparatus for a digital protective relay according to the present invention will be described below based on the above-mentioned configuration and input signal processing.

First, in order to prevent the monitoring signal E _ref from being constantly output from the digital arithmetic processing section 9 to the monitoring signal circuit 23, the reset signal 32 is reset signal means 9A.
Is being output. Then, the digital arithmetic processing unit 9
Program processing signal of any cycle, for example, 1 per day
A monitoring signal E _ref is output from the monitoring signal circuit 23 to check whether or not the operation of the analog input section is normal once per hour. This monitoring signal E _ref is the PCT
It is applied to the filter 24 in a form of being superimposed on the input 21, and is applied and input only when the reset signal 32 is not present.

Here, the magnitude of the monitoring signal E _ref is PC
In the case of the full scale of the T input 21, for example, the CT input, the level is sufficiently low with respect to the maximum fault current. this is,
If the level of the monitoring signal E _ref is the same as the maximum value of the PCT input 21, the maximum input after the filter 24 is P
Since the CT input 21 and the monitoring signal E _ref are added, P
This is twice the maximum value of the CT input, which is a constraint on the input range design (dynamic range design) for correctly operating the circuit from a minute input to a large input from the system.

On the other hand, if the magnitude of the monitoring signal E _ref is too small, it is difficult to detect the gain change of the filter 24. Further, it is not preferable to constantly apply the monitoring signal E _ref , because the power system is monitored and protected while the dynamic range is always restricted. Therefore, the monitoring signal E _ref is applied only when it is desired to automatically check whether or not the digital relay itself is normal.

Monitoring signal E _ref superimposed as described above
Passes through the filter 24, SH25, MPX26, and A /
The digital value is converted by the D converter 12. A / D
The digital data obtained by the converter 12 is A / D-converted by sampling at a convenient cycle according to the above-described relay algorithm, generally, at every 30 electrical degrees of the system frequency. These digital data are subjected to the following processing by the digital arithmetic processing unit 9 and the filter 2
The circuit failure from 4 to the A / D converter 12 is detected. That is,

[0038] (A) and the case of extracting a monitoring signal component and PCT input 21 to the digital data output of the A / D converter 12 and the monitor signal E _{re f} is superimposed, without being affected by the PCT input 21 In order to monitor the input circuit, it is necessary to extract the monitoring signal E _ref component. The extraction method when the frequency of the monitoring signal E _ref is set to four times the system frequency will be described below as an example. The frequency characteristic of the digital filter for adding the data in which the electrical angle of the system frequency is 180 ° out of phase can be expressed by the following equation (2).

[0039]

[Equation 2]

Then, the signal of the system frequency is removed, and the frequency signal of the monitoring signal E _ref is doubled and extracted.

FIG. 4 is a graphic representation of the above equation (2). As can be seen from FIG. 4, if the monitoring signal frequency is set to twice the system frequency, the same processing can be used for extraction, and if the processing method is changed, another frequency can be used.

(B) In the case of detecting a defect from the magnitude of the monitoring signal The frequency of the monitoring signal E _ref extracted by the process of (A) is four times the system frequency in this example. On the other hand, the sampling cycle, that is, the cycle of A / D conversion is an electrical angle of 30 ° of the system frequency, so the sampling frequency is 12 times the system frequency, and the sampling theorem determines the magnitude of the monitoring signal. It can be calculated from the data. When detecting a defect between the filter 24 and the A / D converter 12 based on the calculated magnitude of the monitoring signal, a method of comparing with a specified value prepared in advance in the digital arithmetic processing unit 9 and a plurality of inputs There is a method of comparing monitoring signals extracted from the signals, both of which are effective.

By the above processing, the defect of the input circuit can be detected, but for the data used for the relay calculation, it is necessary to remove the monitoring signal E _ref and extract the system frequency component, that is, the PCT input 21. Yes, data that has undergone the following processing is used for relay calculation. Here, as an example, a case will be described in which the monitoring signal E _ref frequency is set to four times the system frequency, as in the above example.

(C) When extracting the PCT input component: The monitoring signal frequency component (system frequency 4 times) is removed, and P
In order to extract the CT input component, digital filter processing represented by the following equation (3) is performed.

[0045]

[Equation 3]

Then, the monitoring signal E _ref is removed, and the system frequency component, that is, the PCT input 21 is extracted by √2 times. FIG. 5 is a graphic representation of the above formula (3), but it is also possible to apply the same principle to various monitor signal frequencies and use digital filters having different formulas.

By performing the above-mentioned processes (A), (B) and (C), the filter 24 from the filter signal E _ref to A
It is possible to detect a defect in the analog input circuit that reaches the / D converter 12 and suppress the influence of superimposing the monitoring signal E _ref to perform relay calculation.

When the check by the monitoring signal E _ref of the analog input circuit is completed, the digital arithmetic processing section 9 outputs the reset signal 32 to the monitoring signal circuit 23 so as not to output the monitoring signal E _ref again. Then, the processes (A) and (B) for extracting the monitoring signal E _ref described above are not executed. Of course, it goes without saying that the reset signal 32 is continuously output to the monitoring signal circuit 23 until the next check time.

As described above, in the digital arithmetic processing section 9, the monitoring signal E _ref is controlled when the analog input circuit from the filter 24 to the A / D converter 12 is controlled by controlling the output of the monitoring signal circuit 23. When the check is unnecessary, the monitoring signal E _ref is locked and only normal protection relay calculation is processed. In other words, the monitoring signal E _{re f}
It is possible to check the analog input section only for a required time by reducing the restriction on the input full scale due to the superposition of the above and the increase in the function of extracting and checking the monitoring input in the digital arithmetic processing section 9.

FIG. 6 shows functional blocks of the digital processing section 9. In FIG. 6, 12 is an A / D converter, 61 to 6
4 is a digital processing unit 9, 61 is a digital filter for performing the above [A] process, 62 is a monitoring unit for performing the above [B] process, 63 is a digital filter for performing the above [C] process, and 64 is This is a relay calculation unit that performs a normal relay calculation that protects the system from the extracted output of the digital filter 63. The output of the relay computing unit 64 is supplied to a trip circuit (not shown) that trips a circuit breaker of the power transmission line, and the output of the monitoring unit 62 is an alarm circuit (not shown) that warns of a defect in the analog input unit. Needless to say, it will be supplied to.

The monitoring signal frequency is 4 of the system frequency.
As mentioned above, the frequency is not limited to double, but it cannot be the same as the system frequency. The reason is that the system frequency component and the monitoring signal frequency component cannot be removed or extracted. If the monitoring signal frequency is equal to or higher than the folding frequency according to the sampling theorem, it is almost removed by the filter 24 and cannot be extracted.

Further, in the above-mentioned embodiments, the example in which the memory and the D / A converter are combined is shown as the monitoring signal circuit, but a signal output having an output level and a frequency arbitrarily determined in advance is used. Any one can be used as long as it can be obtained. For example, a Wien bridge oscillator, a circuit combining a rectangular wave and a low-pass filter, or the like can be considered.

[0053]

As described above, according to the present invention, the reset signal means controlled by the program processing signal of the digital arithmetic processing unit is provided, the reset signal is stopped when necessary, and the supervisory signal is applied to the input circuit. Since the A / D conversion data is monitored by the digital arithmetic processing unit, there are restrictions on the input range design (dynamic range design) for proper circuit operation from a minute input to a large input and for monitoring. It is possible to reduce the increase of the input extraction and check functions, and it is possible to monitor all analog input circuits from the filter to the A / D converter without stopping the original protection function while the monitoring signal is being input. effective.

Further, the present invention can be applied not only to the constant monitoring method but also to the conventional inspection method of applying the electric inspection input, and since the magnitude and frequency of the monitoring signal can be made highly accurate, it is possible to detect the failure. It is not necessary to consider the fluctuation of the monitoring signal, and highly accurate defect detection can be performed. There is an effect that large-scale equipment such as a simulated transmission line is not necessary and the cost is low.

[Brief description of drawings]

FIG. 1 is a block diagram of a digital protection relay showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a monitoring signal circuit of FIG.

FIG. 3 is a circuit diagram of an adder of a PCT input and a monitor signal, similarly.

FIG. 4 is a frequency characteristic diagram of a digital filter in the digital processing unit.

FIG. 5 is a frequency characteristic diagram of a digital filter in the digital processing unit.

FIG. 6 is a functional block diagram of a digital processing unit.

FIG. 7 is a block diagram of a conventional inspection device.

FIG. 8 is a configuration diagram of a conventional inspection device.

[Explanation of symbols]

 9 Digital Operation Processing Section 9A Reset Signal Means 12 A / D Converter 23 Monitoring Signal Circuit 24 Filter 25 Sample Hold 26 Multiplexer 32 Reset Signal 40 Counter 41 Oscillator 42 Memory 43 D / A Converter

Claims (1)

[Claims] 1. A monitoring signal circuit for outputting a monitoring signal having a frequency different from that of a system input at an arbitrary cycle, a superposition circuit for superposing the system input and the monitoring signal, and an analog signal output by the superposition circuit. A to digital signal
A digital protection comprising: an A / D converter, and a monitor for monitoring the magnitude of the output of the digital filter, which extracts only the data related to the control signal from the output of the A / D converter. Automatic monitoring device for relays.