JPS61121714A - Automatic monitor device for digital protective relay - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an automatic monitoring device for a digital protective relay that automatically detects malfunction of an analog signal input section of a digital relay.

[Conventional technology]

Conventionally, there has been a monitoring device of this type as shown in FIGS. 6 and 7 described in Japanese Patent Publication No. 53-6855.

First, as an example of a conventional device, in FIG. 6, 1 is a power transmission line, 2 is a CT, and 3 is a PT, which are connected to the input contacts S1 and 81' of the input switching device 8, respectively.

4 is a simulated power transmission line, and 5. is a power source for inspection. A CT 7 and a reactor 6 are provided. The CT 7 and reactor 6 are connected to input contacts S2 and S2' of an input switching device 8, respectively. Switching contact s of input switching device 8
, s' through A/D converters 1 and 12, respectively,
It is led to a digital arithmetic processing section 9.

Next, the operation shown in FIG. 6 will be explained. First, when inspecting the input switching device 8, CT2 of the power transmission line 1. The input switching device 8 switches the current and voltage obtained from PT3 to the current and voltage obtained from the simulated feed tfN4, that is, to the input contact 82° 82' side of the inspection input. The current and voltage of the simulated power transmission line 4 are supplied from the power supply 5 for inspection,
/D converters 1 and 12. The magnitudes of the current and voltage are changed by the taps of the CT 7 and the reactor 6, respectively. That is, the input switching device 8
The current and voltage flowing through are converted into digital quantities by A/D converters 11 and 12, respectively, and guided to a digital arithmetic processing section 9.

Normally, the output of the digital arithmetic processing section 9 is led to a trip circuit TR, and the power transmission line 1 is cut off by a breaker or the like. At the time of inspection, the digital arithmetic processing unit 9 compares the A/D conversion value of the inspection input digitally converted by the A/D converters 1 and 12 with a reference value prepared in advance, and determines whether the comparison results match. If not, an output signal is given to the alarm circuit AM.

Next, a second conventional example shown in FIG. 7 will be explained. In the figure, the same parts as in FIG. 6 are designated by the same reference numerals. 13.
14 is a memory circuit. Also, between c'1'2 provided in the power transmission Ml and one input contact S1 of the input switching device 8, and between PT3 and the other input contact 8 of the input switching device 8.
1', A/D converters 1 and 12 are provided, respectively. In addition, the input contact S2 of the input switching device 8,
The outputs of the memory circuits 13 and 14 are respectively connected to S2'. The output sides of the switching contacts s and s' are directly connected to the digital arithmetic processing section 9, and the memory circuit 13. ．． 14 stores in advance digital data as inspection simulation input.

Next, the operation will be explained. First, when performing an inspection, change the switching contacts s and s' of the input switching device 8 to contact S+,
By switching from the St' side to the contacts S2 and 82', the digital data in the memory circuits 13 and 14 is connected to the digital arithmetic processing section 9 via the input switching device 8. Then, it is compared with a reference value prepared in advance, and if the comparison result does not match, an output signal is given to the alarm circuit AM.

[Problem that the invention seeks to solve]

Since the conventional automatic monitoring device for a digital protective relay as described above is configured as described above, it has the following problems.

First, the device shown in Figure 6 simulates power transmission! In order to install fM, a power supply, reactor, CT, etc. are required, which results in major damage to peripheral equipment for inspection, and during inspection, the current and voltage values of the power transmission line cannot be led to the digital processing unit, so inspection is difficult. During this period, the protection relay function will be temporarily suspended, and if a system fault occurs on the power transmission line during this period, it will not be possible to detect this and protect the power transmission line. Furthermore, regarding inspection accuracy, since the inspection input power source is a commercial power source, the voltage is not constant, making it impossible to perform highly accurate inspections.

Next, in the apparatus shown in FIG. 7, since the inspection input is provided after the A/D converter, it is not possible to detect defects in parts before the A/D converter. Furthermore, since both Figures 6 and 7 are inspected at regular intervals, even if a defect occurs in the input switching device, there is a possibility that a system failure may occur before the defect is detected, so it is necessary to eliminate the entire system. This technology allows high-precision monitoring input signals to be used when there are no power system failures.
Digital protection with a simple circuit configuration, low cost, high accuracy, and no downtime for the protection relay function is achieved by applying the signal to the analog input section for an arbitrary period of time and monitoring whether the monitoring input signal is correctly A/D converted. The purpose is to provide an automatic relay monitoring device.

In addition, various methods have been implemented to detect failures in analog input circuits by monitoring the voltage input of the grid, in particular, where an input signal that is always above a certain value is always given, but when inputting current, etc., the input signal is always constant. In input circuits where the above input signals cannot be expected, it is necessary to forcibly apply some kind of input to detect faults in the analog input circuit.The present invention monitors this input application method and its input signals to detect faults. The aim is to propose a new device for detection processing as well.

[Means for solving problems]

The automatic monitoring device for a digital protective relay according to the present invention is a monitoring device that inputs and applies a monitoring signal together with a system inspection input signal to the filter of the digital protective relay only during the period when the digital protective relay is monitored and inspected at arbitrarily set intervals. A signal circuit for monitoring is provided, and a digital processing unit executes the arithmetic processing results of the A/D conversion data for failure analysis outputted through the filter, sample hold, and multiplexer, and the monitoring signal is applied. A monitoring signal is extracted only during the period when
This system automatically detects defects in the A/D converter.

[For production]

In this invention, the main aim is to always input information from the grid to the digital relay as an input signal and to constantly check the operating status of the analog input section, and the frequency of the monitoring signal Eref is set to n times the grid frequency. By setting the frequency to , the failure analysis rate of the analog input section is improved. Therefore, in combination with the high frequency accuracy achieved by using an oscillator, the reliability of detecting defects in the analog input section is greatly improved.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. First, in FIG. 1, the output signal Er of the monitoring signal circuit 23
ef is the PT and CT input 21 (hereinafter abbreviated as P
CT input) is connected to the filter 24. Here, PT, C'T input 21 and 3 are PT3 and CT2 of the power transmission line 1 explained in FIGS. 6 and 7 above.
This is an input signal input from the PCT input 21 (hereinafter, abbreviated as PCT input 21). Filter 24 is PCT
It operates so that the monitoring signal Eref f is superimposed on the human power 21 and the sum of the PCT input 21 S and the monitoring human power Eraf is obtained as an output signal.

The output of the input quadrature transformer 22 is converted from a current signal to a voltage signal by a resistor provided on the output side, and then passed through a filter 24 and held by a sample hold 25 at a predetermined arbitrary constant period for a certain period of time. Ru. Next, the multiplexer 26 sequentially switches the voltage signals held in the sample hold 25 to the A/D converter 12.
lead to. The input data converted into digital quantities by the A/D converter 12 is subjected to arithmetic processing by the digital arithmetic processing section 9. Reference numeral 31 is an alarm output that notifies the result of defect detection. 32 is a monitoring signal circuit 23
This is a reset signal that controls 1 so that the output is stopped and not output. (Hereinafter, the sample hold 25 will be abbreviated as "SR".
(The multiplexer 26 is abbreviated as "MPX.") FIG. 2 shows an example of the monitoring signal circuit 23.
The signal waveform data stored in the memory 42 is outputted to the D/A converter 43 at an arbitrary period to obtain an AC output signal for monitoring, thereby simplifying the output frequency of the excavator 41. Accordingly, an AC signal of any frequency can be obtained from the D/A converter 43.

Next, its operation will be explained. First, the counter 40 counts up one by one using the clock of the oscillator 41.

For example, if the output is 8, the binary representation is "ooo"
ooooo' to "11111111", and counts from 0" to "255' in decimal notation.The actual number of outputs matches the number of addresses in the memory 42.Memory 4
2 uses the output of the counter 40 as an address, and outputs digital data written in advance corresponding to the address to the D/D.
Output to A converter 43. D/A converter 43 is memory 4
The digital data from 2 is converted into analog data according to certain rules, and this becomes the monitoring signal Eref.

Here, the monitoring signal Eref can have an arbitrary waveform depending on the digital data written in the memory 42, and can also have an arbitrary signal frequency depending on the frequency of the oscillator 41.

A reset signal 32 that resets the counted value of the counter to "0" is input to the counter 40. When this reset signal 32 is input, the output of the counter 40 is "oooo".
oooooo". Thus, when the output of the counter 40 becomes "0", the address of the memory 42 becomes "0", and by setting the digital data written in advance to address 0 of the memory 42 to "0". , D/A converter 4
The output of the counter 40 outputs a voltage of '0'. This is because if the reset signal 32 continues to be input, the output of the counter 40 remains at '0', so the D/A converter 43 outputs zero voltage direct current. The waveform 2 frequency of the monitoring signal Er a r is determined by the digital data written in the memory and the frequency of the oscillator 41 as described above, but the written data in the memory 42 By using the memory 42, the oscillation frequency of the excavator, crystal oscillator, etc. does not change, and the oscillation frequency hardly changes.

A highly accurate monitoring signal Eref without frequency fluctuation can be obtained. Regarding the component cost shown in FIG. 2, the oscillator 41 is actually the digital arithmetic processing section 9 shown in FIG.
Can be shared with the crystal oscillator included in The digital arithmetic processing section 9 is mainly composed of a microprocessor, and is equipped with a crystal oscillator for its operation. Also,
The memory 42 may have a relatively small capacity. Here D/A
The converter 43 may be of a low speed of about 8 bits, and as a result, the configuration shown in FIG. 2 can be constructed at a much lower cost than the simulated power transmission line 4 shown in FIG. 6.

In addition, FIG. 3 shows the input 2 at the PC of the filter 24 in FIG.
1 and the monitoring signal Eref are added. The PCT input 21 and the monitoring signal V ref are connected to the operational amplifier 43 through input resistors R54i and Rr42, respectively. The output of the operational amplifier 43 is the return resistor Rr4
4 is fed back to the input side. The output Ead of this circuit can generally be expressed by equation (11).

Ead = Rf x (Es/R, + ”ref/R
r) --(1) However, Es is the voltage value of the PCT input 21.

As described above, addition of two signals using an operational amplifier can be realized at extremely low cost using a simple circuit.

Next, before entering into a description of the operation of the present invention in FIG. 1, basic input signal processing for detecting a system fault in a digital protection relay will be explained.

First, in order to detect a failure in the power system, P T , C
A voltage/current signal PCT input 21 Is is received from T and undergoes signal conversion processing to a form that can be processed by the digital arithmetic processing section 9. The input transformer 22 converts these signals into A/D when the voltage and current values of the power system are at their maximum.
The level is converted to a value suitable for the full scale of the converter 12. This input voltage level of the second order of the input voltage transformer 222 is inputted to the analog filter 24. In digital relays, comprehensive filter characteristics required from various relay characteristics are realized by a combination of digital processing and analog processing.

The main purpose of the filter 24 is to remove harmonic components higher than the aliasing frequency. Furthermore, in one digital relay, considering the frequency band necessary for relay characteristics, the filter 24 attenuates frequency components higher than the aliasing frequency to a completely negligible extent, and the input signal after passing through the filter 24 is sampled at 5H25. Then, convert it to a digital value and process it. Based on the sampling theorem, the processing power of the CPU, and the ease of data processing using the relay calculation algorithm, the sampling frequency is usually set to 30 degrees electrical angle of the system frequency, that is, 600Hz (50R).
720 Hz (60Hz system). Next, the sample hold 25 requires sampling data at the same time from the relay calculation algorithm, so as shown in FIG.
/ Retained until D conversion is completed. In this way, the input signal of the power system is processed, and the digital arithmetic processing unit 9 performs relay calculation.

Based on the above-described configuration and input signal processing, the operation of the digital protection relay IM and device automatic monitoring device according to the present invention will be described below.

First, a reset signal 32 is outputted from the digital arithmetic processing section 9 in order to prevent output signals from being outputted to the constant monitoring signal circuit 23. Then, in the program processing of the digital arithmetic processing section 9, a monitoring signal Erer indicating whether the analog input section is normal or not is sent from the monitoring signal circuit 23 at an arbitrary period, for example, once a day or once every hour. Output. This monitoring signal Eref is superimposed on the PCT input 21 and applied to the filter 24, and is inputted only when the reset signal 32 is not present. Here, the magnitude of the monitoring signal Erer is the full scale of the POT input 21, for example, CT
In the case of large input, the level should be sufficiently low compared to the maximum fault current. This means that if the level of the monitoring signal ErtJ is
If it is the same as the maximum value of the T input 21, the maximum input after the filter 24 is the PCT input 21 and the monitoring signal Erer.
is added, so it is twice the maximum value of the PCT input 21, which becomes a constraint on input range design (dynamic range design) for correct circuit operation from small inputs to large inputs from the system. On the other hand, if the magnitude of the monitoring signal Eref is made too small, it becomes difficult to detect changes in the gain of the filter 24 and the like. Also.

If the monitoring signal Eref is constantly applied, the power system will be monitored and protected while the above-mentioned dynamic range is constantly constrained, which is not preferable. Therefore, the monitoring signal Erer is applied only when it is desired to automatically check whether the digital relay itself is normal.

The monitoring signal Eref superimposed as described above passes through the filter 24.5H25 and MPX26, and is sent to the A/D converter 12.
is converted into a digital value by

The digital data from the A/D converter 12 is sampled at a convenient period, generally every 30 degrees of electrical angle of the grid frequency, based on the relay algorithm mentioned above.
/D conversion. These digital data are subjected to the following processing by the digital arithmetic processing section 9.
A circuit failure in the A/D converter 12 is detected from the filter 24. That is, (A) When extracting a monitoring signal component, the PCT input 21 and the monitoring signal E r e f are superimposed on the digital data output of the A/D converter 12, and the signal is not affected by the PCT input 21. In order to monitor the input circuit without any noise, it is necessary to extract the monitoring signal Eref component. Taking the frequency of the monitoring signal Eref as an example, the system frequency 4
The extraction method when the amount is doubled will be explained below. The frequency characteristic of a digital filter that adds data whose phase is shifted by 180 degrees in electrical angle of the system frequency can be expressed by equation (2).

G = 21 cos −l ・・・・・・・・・
......(2) However, G: Output multiple for input n: Multiple of filter input signal frequency for system frequency In equation (2), system frequency (n = 1), monitoring signal frequency (n = 4) The result of applying is the system frequency
(n=1)=-G=21cos-1=04π Monitoring signal frequency (n=4)-・G=21cos-
1=2, the system frequency signal is removed, and the frequency signal of the monitoring signal Ever is extracted at twice the frequency.

FIG. 4 is a graphical representation of equation (2). As can be seen from FIG. 4, if the monitoring signal frequency is twice the system frequency, it can be extracted by the same processing, and it is also possible to change the processing method and use another frequency.

(B) When detecting defects based on the magnitude of the monitoring signal The monitoring signal Eraf frequency extracted by the process in (A) above is set to four times the system frequency in this example.

On the other hand, the sampling period, that is, the A/D conversion period, is 30 degrees electrical angle of the grid frequency, so the sampling frequency is 12 times the grid frequency, and according to the sampling theorem, the magnitude of the monitoring signal can be sampled. It can be calculated based on data.

Based on the calculated magnitude of the monitoring signal, the filters 24 to A
/ When detecting a defect between the D converters 12, there are two methods: a method of comparing with a specified value prepared in advance in the digital arithmetic processing section 9, and a method of comparing between monitoring signals extracted from a plurality of input signals. Yes, both are valid.

Through the above processing, it is possible to detect faults in the input circuit with OT function, but for the data used for relay calculation, the monitoring signal Eref is removed, and the system frequency component, that is, POT
Since it is necessary to extract the input 21, the data subjected to the following processing is used for relay calculation. Here, as an example, a case will be described in which the monitoring signal Eraf frequency is set to four times the system frequency, similar to the above-mentioned example.

(C) When extracting PCT input components, remove the monitoring signal frequency component (4 times the system frequency),
In order to extract the PCT input component, digital filter processing expressed by equation (3) is performed.

However, G: Output multiple for human power Ill: Multiplier of filter human power signal frequency for system frequency Applying system frequency (n = 1) and monitoring signal frequency (n = = 4) to equation (3), the result is as follows, and monitoring The system frequency component, that is, P
The CT input 21 is extracted by multiplying by seven. Although FIG. 5 is a graphical representation of the above-mentioned equation (3), it is also possible to consider a digital filter that uses a similar principle and is applied to the frequency of the monitoring signal, but has a different mathematical equation.

By performing the above processes (A), (B), and (C), defects in the analog input circuit from the filter 24 to the A/D converter 12 are detected using the monitoring signal Kraf,
In addition, relay calculation can be performed while suppressing the influence of superimposing the monitoring signal Eref. When the check using the monitoring signal Eref iC of the analog input circuit is completed, the digital arithmetic processing section 9 outputs a reset signal 32 to the monitoring signal circuit 23 so as not to output the monitoring signal Eraf again. Then, the above-mentioned process of extracting the monitoring signal Eref (A), (B) k
Make sure it doesn't run.

Of course, it goes without saying that the reset signal 32 continues to be output to the monitoring signal circuit 23 until the time of the next check. As explained above, the digital arithmetic processing unit 9 controls the output of the monitoring signal circuit 23 and checks the analog input circuit from the filter 24 to the A/D converter 12 using the monitoring signal Erer when necessary. , When checking is not necessary, lock the monitoring signal Eref and perform normal maintenance.
l Process only IJ Schiller calculations. In other words, the limitation of input full scale due to the superimposition of the monitoring signal Eref and the increase in the ability to extract and check the monitoring input performed by the digital arithmetic processing section 9 are reduced, and the analog input section is checked only for the necessary time. can do.

As mentioned above, the monitoring signal frequency is not limited to four times the grid frequency, but cannot be the same as the grid frequency. The reason is that it is not possible to remove or extract the system frequency component and the monitoring signal frequency component. If the monitoring signal frequency is still higher than the folding frequency according to the sampling theorem, most of the signal will be removed by the filter 24, and therefore extraction will not be possible.

Further, in the above embodiment, an example was shown in which a memory and a D/A converter were combined as a monitoring signal circuit, but it is not possible to obtain a signal output with an arbitrarily determined output level and frequency. It can be of any kind. for example,
Possible examples include a Wien bridge oscillator or a circuit that combines a square wave and a low-pass filter.

Furthermore, although the period for monitoring is arbitrary, it may be a fixed period or a method in which monitoring is performed only during human operation. Also,
The presence or absence of output of the monitoring signal Kref was controlled by the output from the digital arithmetic processing unit, but even with another timer,
A similar effect can be obtained even if a separate device is used for inspection and monitoring.

〔Effect of the invention〕

As described above, the present invention has the following advantages: (1) It is possible to detect defects in all input circuits from filters to A/D converters.

(2) Even if input cannot always be expected, such as a large CT input, monitoring is possible by making the monitoring signal M folds.

(3) The monitoring signal is applied and added when necessary, and its A
/ Since the D conversion data is monitored, the protection relay function operates even while the monitoring signal is being input, so there is no period when the original protection function is stopped.

(4) Since the magnitude and frequency of the monitoring signal can be made highly accurate, there is no need to consider fluctuations in the monitoring signal when detecting defects, and defects can be detected with high accuracy.

(5) Furthermore, the present invention can be applied not only to a constant monitoring method but also as a method for applying electric test input in a conventional inspection method, and has the effect of (4) above.

(6) There is no need for costly equipment such as a simulated power transmission line, and the overall cost is reduced. In particular, since the monitoring signal is superimposed from the filter manually, the addition circuit is extremely simple as shown in Figure 3, and the monitoring signal generation circuit has an operational amplifier level (±10V) output as shown in Figure 2. This has advantages such as eliminating the need for an amplification circuit or the like.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a digital protective relay showing an embodiment of the present invention, Fig. 2 is a block diagram of a monitoring signal circuit shown in Fig. 1, and Fig. 3 is the same (addition circuit for PCT input and monitoring signal). Figures 4 and 5 are frequency characteristic diagrams of the digital filter in the digital signal processing section, and Figures 6 and 7 are
The figure is a configuration diagram of a conventional inspection device. 12 is an A/D converter, 23 is a monitoring signal circuit, 24
is a filter, 25 is a sample hold, 26 is a multiplexer, 9 is a digital processing unit, 32 is a reset signal, 40 is a counter, 41 is an oscillator, 42 is a memory,
43 is a D/A converter. Patent Applicant: Mitsubishi Electric Corporation Figure 4 Figure 5 Apparatus 3, Relationship with the case of the person making the amendment Patent Applicant Address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Mitsubishi Electric Corporation Representative Hitoshi Katayama Department 5, Part 5 of the specification subject to amendment Column 6 of the Detailed Description of the Invention, the description of the contents of the amendment, is amended as follows.

Claims (4)

[Claims] (1) Analog amounts of voltage and current obtained from the system are input to a filter, the output of the filter is sampled and held for a certain period of time based on the sampling frequency, and the sample and hold value is switched by a multiplexer.A/D converter A monitoring signal circuit for receiving a reset signal output from the digital arithmetic processing section in a digital protective relay of the type in which the signal is converted into a digital signal by a digital processing section and then inputted to a digital processing section at a subsequent stage for arithmetic processing. ,
An analog signal of a predetermined frequency from the monitoring signal circuit is input as a monitoring signal to the input terminal of the filter together with the voltage and current analog amounts from the system, and the reset signal is normally given to the monitoring signal circuit for monitoring. The signal is stopped, and only when checking the operation of the analog input section of the digital relay, the reset signal from the digital processing section is stopped and a monitoring signal is output, and the A/ 1. An automatic monitoring device for a digital protective relay, characterized in that the output signal of the D converter is computed by the digital arithmetic processing section to detect a defect. (2) The configuration of the monitoring signal circuit includes a counter that uses an oscillator clock signal as a counting input signal, receives counting start and stop control operations based on a reset signal from a digital arithmetic processing section, and a bit output of the counter. 2. The automatic monitoring device for a digital protective relay according to claim 1, comprising a memory as an input and a D/A converter for converting the output of the memory into an analog signal as a monitoring signal. (3) The output frequency of the monitoring signal output from the monitoring signal circuit is n times the system voltage and current frequency (n≧1)
Claim 1 characterized in that
Automatic monitoring device for digital protective relays as described in . (4) The circuit configuration of the monitoring signal circuit includes a memory, D
Claim 1, characterized in that the invention is comprised of an analog oscillator such as a Wien bridge oscillator, a combination circuit of a rectangular wave and a low-pass filter, etc., which generates a frequency at an output level arbitrarily set in advance, instead of the /A converter. Automatic monitoring device for digital protective relays as described in .