JPH0567954A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0567954A JPH0567954A JP3229007A JP22900791A JPH0567954A JP H0567954 A JPH0567954 A JP H0567954A JP 3229007 A JP3229007 A JP 3229007A JP 22900791 A JP22900791 A JP 22900791A JP H0567954 A JPH0567954 A JP H0567954A
- Authority
- JP
- Japan
- Prior art keywords
- input
- semiconductor device
- circuit
- signal
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electronic Switches (AREA)
- Logic Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体装置に関わり、
特に、他の半導体集積回路と相互に信号のやり取りを行
う為の一端子双方向入出力回路を有する半導体装置に関
する。BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device,
In particular, the present invention relates to a semiconductor device having a one-terminal bidirectional input / output circuit for exchanging signals with other semiconductor integrated circuits.
【0002】[0002]
【従来の技術】従来の技術で半導体集積回路をシステム
の一部として相互に信号のやり取りを行う場合は、半導
体集積回路から信号を出力する為に必要なドライバ−等
を構成する出力回路と、同システムの他の半導体集積回
路などからの信号を半導体集積回路内部に入力する為に
レベル合わせを行う入力回路とを一対で構成する入出力
双方向セルを構成し、出力ドライバ−にはトランスファ
−ゲ−トの機能を持たせる事により、入力と出力の状態
の切り替えを行っていた。あるいは、入力回路と出力回
路の両者にトランスファ−ゲ−トを構成し、交互にトラ
ンスファ−ゲ−トを切り替える事で半導体集積回路の外
部信号と、半導体集積回路内部の信号がコンテンション
する事を防ぎ、実現していた。2. Description of the Related Art In the prior art, when a semiconductor integrated circuit is used as a part of a system to exchange signals with each other, an output circuit which constitutes a driver or the like necessary for outputting a signal from the semiconductor integrated circuit, An input / output bidirectional cell is constructed by a pair of an input circuit for performing level adjustment so as to input a signal from another semiconductor integrated circuit of the system into the semiconductor integrated circuit, and a transfer is provided to the output driver. By providing the gate function, the input and output states were switched. Alternatively, by configuring a transfer gate in both the input circuit and the output circuit and alternately switching the transfer gate, the external signal of the semiconductor integrated circuit and the signal inside the semiconductor integrated circuit are contended. It was prevented and realized.
【0003】[0003]
【発明が解決しようとする課題】しかし、上記の方法で
はトランスファ−ゲ−トをON、OFFに動作させる事
により信号を入力、出力に切り替えていたので、入力側
の信号を確実に定めていなければ、MOS形のトランジ
スタなどの場合は、トランジスタゲ−トが浮いてしまう
事があり貫通電流が流れすぎて、トランジスタ自体を破
壊しかねない。この欠点はICの設計者が、回路の論理
確認シミュレ−ションなどで入力と出力の信号切り替え
を行い半導体集積回路の一端子双方向セルの入出力の信
号状態を確認していた。However, in the above method, since the signal is switched between input and output by operating the transfer gate on and off, the signal on the input side must be reliably determined. For example, in the case of a MOS type transistor, the transistor gate may float and a through current may flow too much, which may damage the transistor itself. This drawback is that the designer of the IC confirms the input / output signal state of the one-terminal bidirectional cell of the semiconductor integrated circuit by switching the input and output signals by the logic confirmation simulation of the circuit.
【0004】[0004]
【課題を解決するための手段】本発明の半導体装置は、
一端子双方向セルの入力側にプルダウン抵抗を接続する
事で、ICに無入力の状態が発生しても、IC入力側の
トランジスタゲ−トがフロ−ティング状態になる事を防
止し、トランジスタゲ−トに電流が流れるのを防ぎ、ト
ランジスタの破壊を防ぐ事を特徴とする。The semiconductor device of the present invention comprises:
By connecting a pull-down resistor to the input side of the one-terminal bidirectional cell, even if there is no input state in the IC, the transistor gate on the IC input side can be prevented from entering the floating state, It is characterized by preventing current from flowing to the gate and preventing transistor breakdown.
【0005】[0005]
【実施例】図1は本発明の半導体装置の構成図である。
図中1は出力側最終段の出力バッファである。コントロ
−ル端子付きでコントロ−ル端子をLにする事でON
し、Hにする事でOFFに、あるいは、コントロ−ル端
子をHにする事でONし、Lにする事でOFFに切り替
える事によって、ON状態の時は、IC内部の信号をI
C外部へ出力し、OFF状態の時にはICの内部へ外部
信号を入力する為のバッファである。図中2は入力側の
バッファである。図中1がOFF状態の時に、IC外部
の信号とIC内部のレベル合わせを行う。図中3は本発
明の半導体装置のプルダウン抵抗部である。図中4が不
本意に無入力状態になり図中1が無入力状態時にこの抵
抗を介してHレベルが入力される。図中5はIC内部に
結線されている。1 is a block diagram of a semiconductor device of the present invention.
In the figure, 1 is an output buffer at the final stage on the output side. It has a control terminal and is turned on by setting the control terminal to L.
Then, by turning it to H, it turns off, or by turning the control terminal to H, it turns on, and by turning it to L, it switches to off.
This is a buffer for outputting to the outside of C and for inputting an external signal to the inside of the IC when in the OFF state. In the figure, 2 is an input side buffer. When 1 in the figure is in the OFF state, the signal outside the IC and the level inside the IC are adjusted. In the figure, 3 is a pull-down resistor portion of the semiconductor device of the present invention. When 4 in the figure is unintentionally in the non-input state and 1 in the figure is in the no-input state, the H level is input through this resistor. In the figure, 5 is connected inside the IC.
【0006】[0006]
【発明の効果】本発明は以上述べた様に一端子双方向セ
ルの入力側回路に於て、プルダウン抵抗を付ける事で、
システムとして構成した後で誤った方法で使用されても
ICの入力側トランジスタを破壊する事を防ぐ事ができ
る。これにより、設計時に行っていた回路の論理確認シ
ミュレ−ションなどで入力と出力の信号切り替えを行い
半導体集積回路の一端子双方向セルの入出力の信号状態
を確認するなどの一端子双方向セルの微妙なタイミング
設計がある程度軽減される事になる。As described above, the present invention provides a pull-down resistor in the input side circuit of a one-terminal bidirectional cell.
It is possible to prevent the input side transistor of the IC from being destroyed even if it is used in an incorrect way after being configured as a system. This enables the one-terminal bidirectional cell to check the input / output signal status of the one-terminal bidirectional cell of the semiconductor integrated circuit by switching the input and output signals by the logic confirmation simulation of the circuit that was performed at the time of design. The delicate timing design of will be reduced to some extent.
【図1】一端子双方向セルの構成図をしめした説明図で
ある。FIG. 1 is an explanatory diagram showing a configuration diagram of a one-terminal bidirectional cell.
1・・・コントロ−ル端子付き出力バッファ 2・・・ 入力バッファ 3・・・ 入力回路保護用プルダウン抵抗 4・・・ 入出力パッド 5・・・ 内部回路接続結線 1 ... Output buffer with control terminal 2 ... Input buffer 3 ... Input circuit protection pull-down resistor 4 ... Input / output pad 5 ... Internal circuit connection wiring
Claims (1)
入出力セルと内部初段トランジスタ間に、プルダウン抵
抗を設けることを特徴とする半導体装置。1. A semiconductor device in which a pull-down resistor is provided between a one-terminal bidirectional input / output cell and an internal first-stage transistor in a semiconductor integrated circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3229007A JPH0567954A (en) | 1991-09-09 | 1991-09-09 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3229007A JPH0567954A (en) | 1991-09-09 | 1991-09-09 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0567954A true JPH0567954A (en) | 1993-03-19 |
Family
ID=16885302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3229007A Pending JPH0567954A (en) | 1991-09-09 | 1991-09-09 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0567954A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06350429A (en) * | 1993-06-04 | 1994-12-22 | Mitsubishi Electric Corp | Signal input/output circuit for semiconductor integrated circuit |
JP2004173307A (en) * | 2004-01-28 | 2004-06-17 | Renesas Technology Corp | Signal input/output circuit for semiconductor integrated circuit |
-
1991
- 1991-09-09 JP JP3229007A patent/JPH0567954A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06350429A (en) * | 1993-06-04 | 1994-12-22 | Mitsubishi Electric Corp | Signal input/output circuit for semiconductor integrated circuit |
JP2004173307A (en) * | 2004-01-28 | 2004-06-17 | Renesas Technology Corp | Signal input/output circuit for semiconductor integrated circuit |
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